CN1494141A - 半导体器件 - Google Patents

半导体器件 Download PDF

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CN1494141A
CN1494141A CNA031602142A CN03160214A CN1494141A CN 1494141 A CN1494141 A CN 1494141A CN A031602142 A CNA031602142 A CN A031602142A CN 03160214 A CN03160214 A CN 03160214A CN 1494141 A CN1494141 A CN 1494141A
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conductor
semiconductor device
semiconductor chip
lead
wire
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CN100336214C (zh
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���뽫��
西嶋将明
田中毅
上田大助
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

本发明提供一种半导体器件，包括半导体芯片、密封所述半导体芯片的模塑树脂、以及从所述模塑树脂的内部一直延伸到外部的多条导体引线。所述导体引线的配置于所述模塑树脂内的部分形成内部端子部，配置于所述模塑树脂外的部分形成外部端子部。所述半导体芯片的电极和所述导体引线的内部端子部相连接。所述导体引线中的至少一条的所述内部端子部，形成至少一部分比所述外部端子部的宽度窄的电感元件部。树脂封装内形成的电感元件具有稳定的特性，将高频特性的稳定性提高。

Description

半导体器件
技术领域
本发明涉及在微波、X频带或Ku频带区域中使用的半导体器件的安装用封装的改进。
背景技术
现在正要求用于对微波、X频带、Ku频带区域中使用的高频器件进行安装的半导体安装用封装小型化、低成本化和高性能化。例如，12GHz频带的接收系统中使用的低噪声放大器用HEMT(High ElectronMobility Transistor)器件的安装用封装，已知图7A和图7B所示的四管脚树脂封装结构(例如参照日本特开平9-213826号公报)。
图7A是半导体器件的俯视图，图7B是剖面图。将源极用引线2、栅极用引线3和漏极用引线4成整体地埋入，成形预模塑树脂(premold resin)1。源极用引线(lead)2具有位于预模塑树脂1的凹部7内的管芯垫部(die pad portion)2a、内部端子部2b、及位于预模塑树脂1外的外部端子部2c。在管芯垫2a上，使用导电性粘结剂10接合HEMT芯片5。栅极用引线3和漏极用引线4在垂直于源极用引线2的方向上延伸，内端相邻于HEMT芯片5。源极用引线2、栅极用引线3和漏极用引线4按引线框架的方式与预模塑树脂1一起成形。在成形后从框架(未图示)上分离。
源极用引线2与HEMT芯片5的源极(未图示)由键合线6a进行电连接。HEMT芯片5的栅极和漏极(未图示)与栅极用引线3和漏极用引线4分别由键合线6b、6c进行电连接。如图7B所示，在预模塑树脂1的侧壁的上端面，使用粘结剂8粘结盖9，将凹部7密封。
上述半导体器件中的HEMT芯片5和键合线(bonding wire)6a～6c的连接部的结构示于图8A和图8B。图8A是俯视图，图8B是剖面图。在HEMT芯片5的上表面上形成的源电极布线11、栅电极布线12和漏电极布线13上，分别连接键合线6b～6c。
图9A、图9B分别表示上述现有例的四管脚树脂封装中安装HEMT器件而构成的半导体器件的电路图和史密斯圆图(Smith chart)。在图9A中，11a是源极，12a是栅极，而13a是漏极。图9B的史密斯圆图是图示复数阻抗(R+j*X)的图。水平线上表示纯电阻部分(R圆内R≥0)。上半部分表示电感性电抗成分(X＞0)，下半部分表示电容性电抗成分(X＜0)。左端为0Ω(短路)，右端为∞Ω(开路)，中心为50Ω。
图9A所示的源极电感器14在图7A、图7B的结构中，相当于将键合线6a、与源极用引线2的从键合线6a的连接位置到源极用引线2的外部端子部2c端为止的部分合并的电感成分。这样，在现有例中，使用键合线6a来构成电感元件，由此，调整Gopt(最佳增益匹配电感)和Γopt(最小噪声匹配电感)。即，如图9B所示，通过使Gopt(最佳增益匹配电感)和Γopt(最小噪声匹配电感)接近，匹配于50Ω附近。
如以上那样，在现有例的四管脚树脂封装中，作为源极电感器14使用键合线6a。因此，如果在安装时键合线6a的长度有偏差，则在包含12GHz频带的微波、X频带、Ku频带区域中，如图9B所示，HEMT器件的Gopt(最佳增益匹配电感)和Γopt(最小噪声匹配电感)产生偏差。其结果，产生高频特性、特别是增益、噪声的特性变动增大，损害性能的稳定，因良品率下降而导致成本高的问题。
发明内容
本发明的目的在于提供一种半导体器件，在树脂封装内形成的电感元件有稳定的特性，容易获得电感匹配，可提高高频特性的稳定性。
本发明的半导体器件包括：半导体芯片；密封所述半导体芯片的模塑树脂；以及从所述模塑树脂的内部一直延伸到外部的多条导体引线。所述导体引线的配置于所述模塑树脂内的部分形成内部端子部，配置于所述模塑树脂外的部分形成外部端子部。所述半导体芯片的电极和所述导体引线的内部端子部相连接。所述导体引线中的至少一条的所述内部端子部，形成至少一部分比所述外部端子部的宽度窄的电感元件部。
根据本发明的半导体器件，通过配置于树脂封装内的多条导体引线中的至少一条形成宽度窄的电感元件部，可以获得稳定的电感成分。因此，容易获得电感匹配，可以提高高频特性的稳定性。
优选所述电感元件部有曲折的平面形状。
具有所述电感元件部的所述导体引线，优选具有与所述半导体芯片的下表面重叠的重叠部，在所述重叠部与所述半导体芯片连接。而且，所述半导体芯片的电极和所述导体引线的重叠部，优选通过在所述半导体芯片上形成的通孔中的导体来连接。所述导体引线的重叠部可以形成安装了所述半导体芯片的管芯垫部。
可以将具有所述电感元件部的导体引线，连接到形成于所述半导体芯片上的场效应晶体管的源极、或双极晶体管的发射极。或者，也可以将具有所述电感元件部的导体引线，连接到在所述半导体芯片上形成的场效应晶体管的栅极或漏极、或双极晶体管的基极或集电极。至少一条导体引线具有扼流圈电感或匹配元件的功能。
附图说明
图1A是除去表示本发明实施方式1的半导体器件盖的俯视图，图1B是该半导体器件的剖面图；
图2是该半导体器件中使用的源极用引线的俯视图；
图3A是表示该半导体器件中的半导体芯片和源极用引线的连接结构的俯视图，图3B是其剖面图；
图4A是本发明实施方式1的半导体器件的电路图，图4B是该半导体器件的史密斯圆图；
图5是除去表示本发明实施方式2的半导体器件盖的俯视图；
图6A是本发明实施方式3的半导体器件的俯视图，图6B是该半导体器件的剖面图，图6C是该半导体器件的电路图；
图7A是除去表示现有例的半导体器件盖的俯视图，图7B是该半导体器件的剖面图；
图8A是表示该半导体器件中的半导体芯片和源极用引线的连接结构的俯视图，图8B是剖面图；以及
图9A是该半导体器件的电路图，图9B是该半导体器件的史密斯圆图。
具体实施方式
以下，参照附图详细地说明本发明实施方式的半导体器件。
(实施方式1)
图1A是实施方式1的具有四管脚树脂封装结构的半导体器件的俯视图。图1B是沿图1A的A-A′线的剖面图。图2是表示装入该半导体器件中的源极用引线的平面形状的示意图。
预模塑树脂1将源极用引线20、栅极用引线3和漏极用引线4成整体埋入成形。源极用引线20有位于预模塑树脂1的凹部7内的管芯垫(die pad)部20a、内部端子部20b、以及位于预模塑树脂1外的外部端子部20c。在管芯垫部20a上，使用导电性粘结剂接合HEMT芯片21。栅极用引线3和漏极用引线4在垂直于源极用引线20的方向上延伸，内端配置在HEMT芯片21的附近。源极用引线20、栅极用引线3和漏极用引线4以引线框架的方式与预模塑树脂1同时成形。在成形后从框架(未图示)中分离。
如图1A所示，源极用引线20的内部端子部20b在预模塑树脂1的内壁和管芯垫部20a之间，形成作为曲折型导体线的源极用曲折线。形成了这样的源极用曲折线的源极用引线20的整体形状示于图2。形成于内部端子部20b的曲折线比外部端子部20c和管芯垫部20a的宽度窄，在外部端子部20c和管芯垫部20a之间摆动(蛇行)配置。这样形成的曲折线构成电感元件。
如图1B所示，源极用引线20与HEMT芯片21的源极(未图示)，通过在HEMT芯片21的厚度方向上形成的通孔(via hole)21a的导体进行电连接。因此，在本实施方式中，在HEMT芯片21和源极用引线20的连接上，不使用键合线。HEMT芯片21的栅极和漏极(未图示)与栅极用引线3和漏极用引线4，分别通过键合线6b、6c进行电连接。而且，在预模塑树脂1的侧壁的上端面，使用粘结剂8粘结盖9，将凹部7密封。
上述半导体器件中的HEMT芯片21、源极用引线20和键合线6b及6c的连接部的结构示于图3A和图3B。图3A是俯视图，图3B是剖面图。HETM芯片21的上表面上形成的源电极布线11，通过通孔21a的导体与源极用引线20连接。另一方面，栅电极布线12和漏电极布线13分别与键合线6b和6c连接。
图4A、图4B分别表示在上述四管脚树脂封装中安装HEMT器件而构成的半导体器件的电路图和史密斯圆图。在图4A中，11a是源极，12a是栅极，13a是漏极。源极电感器22在图1A、图1B的结构中，相当于通孔21a和源极用引线20的从与通孔21a连接的位置至源极用引线20的外部端子部20c的外端为止的分布常数线路的电感成分。
在本实施方式中，内部端子部20b中形成的源极用曲折线有助于作为主要的电感成分。内部端子部20b与现有例中形成了源极电感器的键合线相比，长度稳定。因此，可以避免在现有例的情况下安装时产生的长度偏差。其结果，如图4B所示，可抑制HEMT器件的Gopt和Γopt的偏差，抑制增益、噪声的特性偏差，提高良品率，实现低成本。
同时，使Gopt和Γopt接近并匹配于50Ω附近，可以兼顾实现高增益和低噪声特性。
再有，源极用引线20不一定必须有管芯垫部20a。例如，内部端子部20b的内端部有与HEMT芯片21的重叠部，在该重叠部上内部端子部20b与通孔21a连接即可。
此外，内部端子部20b不一定必须形成曲折线。也就是说，通过形成比外部端子部20c宽度窄的内部端子部20b，可提供有效的电感成分。对于这样的例子，在实施方式2中说明。
(实施方式2)
图5是表示实施方式2的半导体器件的俯视图。在实施方式1中，如图1A所示，与源极用引线20的管芯垫20a连接的内部端子部20b构成为源极用曲折线，而在本实施方式中，不是曲折型而是直的。
如图5所示，源极用引线23配置在管芯垫23a和预模塑树脂1的侧壁之间，具有宽度比外部端子部23c窄的内部端子部23b。这样，通过使宽度变窄，来增加导体引线的电感成分，可获得与源极用曲折线20b同样的效果。
(实施方式3)
下面参照图6A～图6C说明实施方式3的半导体器件。图6A是除去一部分树脂封装来表示半导体器件的俯视图，图6B是沿图6A的B-B′线的剖面图，图6C是该半导体器件的电路图。在本实施方式中，具有电感元件部的导体引线，与HEMT芯片的栅极和漏极连接。
如图6A、图6B所示，在管芯垫30上搭载HEMT芯片31。在HEMT芯片31的周围，配置源极用引线32、漏极用引线33、以及栅极用引线34，通过键合线35分别连接到HEMT芯片31的源极、漏极和栅极(未图示)。
在漏极用引线33上，形成第1电感36和第2电感37。从第1和第2电感36、37之间，将输出用引线端子38分支。在栅极用引线34上，形成第3电感39和第4电感40。从第3和第4电感39、40之间，将输入用引线端子41分支。第1～第4电感36、37、39、40形成曲折型。
以上的各元件被密封树脂42密封，源极用引线32、漏极用引线33和栅极用引线34的端部从密封树脂42中露出，作为各自外部端子部，而形成源极端子32a、漏极端子33a、及栅极端子34a。输出用引线端子38和输入用引线端子41的端部也从密封树脂42中露出。
第1电感36、第3电感39具有作为扼流圈电感或匹配元件的功能。第2电感37、第4电感40具有作为匹配元件的功能。
在本实施方式中，也可以将电容性元件、电感性元件、或电阻元件(芯片部件等)连接在引线上。例如，在源极用引线32等器件的接地端子上连接的引线和第1电感36之间，连接配置芯片电容部件。另外，在第3电感39、第2电感37、第4电感40的某一个之间，或在与除此以外的引线部之间也可以连接配置片式电容部件。这样的片式电容部件的连接配置也适用于实施方式1、2的情况。
再有，在以上的实施方式中，作为半导体芯片，即使是安装HEMT芯片以外的场效应晶体管、双极晶体管的情况，也可采用各实施方式的结构，可获得与上述同样的效果。

Claims (8)

1.一种半导体器件，包括：半导体芯片；密封所述半导体芯片的模塑树脂；以及从所述模塑树脂的内部一直延伸到外部的多条导体引线；所述导体引线的配置于所述模塑树脂内的部分形成内部端子部，配置于所述模塑树脂外的部分形成外部端子部，所述半导体芯片的电极和所述导体引线的内部端子部相连接，其特征在于：
所述导体引线中的至少一条的所述内部端子部，形成至少一部分比所述外部端子部的宽度窄的电感元件部。
2.如权利要求1所述的半导体器件，其中，所述电感元件部有曲折的平面形状。
3.如权利要求2所述的半导体器件，其中，具有所述电感元件部的所述导体引线，具有与所述半导体芯片的下表面重叠的重叠部，在所述重叠部与所述半导体芯片连接。
4.如权利要求3所述的半导体器件，其中，所述半导体芯片的电极和所述导体引线的重叠部，通过在所述半导体芯片上形成的通孔中的导体来连接。
5.如权利要求3所述的半导体器件，其中，所述导体引线的重叠部形成安装了所述半导体芯片的管芯垫部。
6.如权利要求1所述的半导体器件，其中，具有所述电感元件部的导体引线，连接到在所述半导体芯片上形成的场效应晶体管的源极、或双极晶体管的发射极。
7.如权利要求1所述的半导体器件，其中，具有所述电感元件部的导体引线，连接到在所述半导体芯片上形成的场效应晶体管的栅极或漏极、或双极晶体管的基极或集电极。
8.如权利要求1所述的半导体器件，其中，至少一条导体引线具有扼流圈电感或匹配元件的功能。
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