CN1417842A - 半导体装置及其制造方法、电路板和电子设备 - Google Patents
半导体装置及其制造方法、电路板和电子设备 Download PDFInfo
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- CN1417842A CN1417842A CN02149862A CN02149862A CN1417842A CN 1417842 A CN1417842 A CN 1417842A CN 02149862 A CN02149862 A CN 02149862A CN 02149862 A CN02149862 A CN 02149862A CN 1417842 A CN1417842 A CN 1417842A
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- Engineering & Computer Science (AREA)
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Abstract
本发明提供一种操作性优异且能够实现小型化和高集成化的半导体装置及其制造方法、电路板以及电子设备。上述半导体装置的制造方法包括:(a)将具有激活面的半导体芯片(10)的激活面面向上述基板(20),通过粘接剂(24)向基板(20)挤压,由此在上述半导体芯片(10)的侧面上形成由上述粘接剂(24)构成的粘接部(25),(b)从与上述激活面相反的上述半导体芯片(10)的面,同时磨削半导体芯片(10)和粘接部(25)。
Description
技术领域
本发明涉及一种半导体装置及其制造方法、电路板和电子设备。
背景技术
作为实现半导体装置的小型化和高集成化的方法,已经知道磨削半导体芯片使之变薄的方法。半导体芯片中被磨削的是与电路元件形成的面(所谓的激活面)相反的那一面。磨削变薄后的半导体芯片被安装于基板上。
但是,磨削变薄的半导体芯片容易破碎,有时在向基板安装之前的制造工序中半导体芯片已经破碎。或者是在基板上接合薄半导体芯片时,由于接合工具的挤压,半导体芯片被弯曲。
发明内容
本发明是为了解决上述问题,其目的在于,提供一种操作简单并且能够实现小型化和高集成化的半导体装置及其制造方法、电路板和电子设备。
本发明之1的半导体装置的制造方法包括:(a)将具有激活面的半导体芯片的上述激活面面向上述基板,通过粘接剂向上述基板挤压,由此在上述半导体芯片的侧面上形成由上述粘接剂构成的粘接部,(b)从与上述激活面相反的上述半导体芯片的面同时磨削上述半导体芯片和上述粘接部。
根据本发明,是在基板上固定半导体芯片之后在基板上磨削半导体芯片使之变薄。由此,向基板上安装时使用的半导体芯片是进行磨削使之变薄之前的具有充分厚度的半导体芯片。因此,安装时半导体芯片不会破碎。另外,因为向基板挤压是磨削之前的半导体芯片,所以能够防止半导体芯片卷曲。
本发明之2的半导体装置制造方法中上述粘接剂可以为导电填料分散而成的各向异性导电材料。
本发明之3的半导体装置制造方法中,包括:(a)将具有激活面1的半导体芯片1的上述激活面1面向基板,通过粘接剂1向上述基板挤压,由此在上述半导体芯片1的侧面上形成由上述粘接剂1构成的粘接部1,(b)将具有激活面2的半导体芯片2的上述激活面2面向基板,通过粘接剂2向上述基板挤压,由此在上述半导体芯片2的侧面上形成由上述粘接剂1构成的粘接部2,(c)从与上述激活面1相反的上述半导体芯片1的面同时磨削上述半导体芯片1、上述半导体芯片2、上述粘接部1和上述粘接部2。
根据本发明,是在基板上固定半导体芯片1和2之后在基板上磨削各个半导体芯片使之变薄。由此,向基板上安装时的半导体芯片是进行磨削使之变薄之前的具有充分厚度的半导体芯片1和2。因此,安装时半导体芯片1和2不会破碎。另外,因为向基板挤压是磨削之前的半导体芯片1和2,所以能够防止每个半导体芯片卷曲。另外,因为能够统一磨削多个半导体芯片,生产率提高。
本发明之4的半导体装置制造方法中,在上述(a)工序之前,可以在上述基板上一体设置粘接上述半导体芯片1的上述粘接剂1和粘接上述半导体芯片2的上述粘接剂2。
本发明之5的半导体装置是由上述方法制得。
本发明之6的半导体装置包括:形成配线图形的基板、具有激活面且上述激活面与上述基板相向的半导体芯片、电连接上述半导体芯片和上述配线图形的电极、覆盖上述半导体芯片的侧面并由粘接剂构成的被覆部,其中,从上述基板上面至上述被覆部上面为止的厚度与从上述基板的上面至上述半导体芯片上面为止的厚度几乎相等。
根据本发明,被覆部形成于半导体芯片的侧面上,使被覆部与半导体芯片的面成为同一面。即,从基板上面至被覆部上面为止的厚度与从基板上面至半导体芯片上面为止的厚度几乎相等。这里,从基板上面至半导体芯片上面为止的厚度是指从基板上面至半导体芯片的侧面和被覆部相互接触部分的半导体芯片的上面为止的距离。另外,从基板的上面至被覆部的上面为止的厚度是指从基板上面至上述半导体芯片侧面和被覆部相接触部分的被覆部的上面为止的距离。
由此,能够防止水分或微细的垃圾等进入半导体装置内部。另外,例如被覆部由粘接剂构成时,在包含半导体芯片侧面的区域上设置粘接剂,同时磨削半导体芯片和粘接剂,从而能够使半导体装置对负荷保持高的耐承受性(机械强度)的同时变薄半导体装置的厚度。即,通过覆盖半导体芯片的全部侧面,能够增加半导体芯片和粘接剂之间的接触面积,所以,能够提高半导体芯片在半导体装置受到冲击等时所具有的耐性。由此,例如即使没有在半导体装置的上面设置粘接剂,也能够有效地将半导体芯片固定在基板上,并可使半导体装置厚度小。
本发明之7的半导体装置包括:形成配线图形的基板、具有激活面且上述激活面与上述基板相向,并与上述配线图形电连接的半导体芯片、电连接上述半导体芯片和上述配线图形的电极、覆盖上述半导体芯片的侧面并由粘接剂构成的被覆部,上述被覆部是通过粘接剂使上述激活面面向上述基板,并向上述基板挤压上述半导体芯片,以在上述半导体芯片的侧面上形成由上述粘接剂构成的粘接部,然后磨削上述半导体芯片中的与上述激活面相反的那一侧面,同时研磨上述粘接部而形成。
根据本发明,能够防止水分或微细的垃圾等进入半导体装置内部。另外,在半导体芯片的侧面上设置粘接部,同时磨削半导体芯片和粘接部,从而能够使半导体装置对负荷保持高的耐承受性(机械强度)的同时变薄半导体装置的厚度。即,例如通过覆盖半导体芯片的全部侧面,能够增加半导体芯片和粘接剂之间的接触面积,所以,能够提高半导体芯片在半导体装置受到冲击等时所具有的耐性。由此,例如即使没有在半导体装置的上面设置粘接剂,也能够有效地将半导体芯片固定在基板上,并可使半导体装置厚度小。
本发明之8的半导体装置中,上述粘接剂可以是导电填料分散而成的各向异性导电材料。
本发明之9的电路板是载有上述半导体装置。
本发明之10的电子设备具有上述半导体装置。
附图说明
图1A和图1B为表示本发明实施例的半导体装置的制造方法的图。
图2为表示本发明实施例的半导体装置的制造方法的图。
图3为表示本发明实施例的半导体装置的图。
图4为用于说明本发明变形例的半导体装置的制造方法的图。
图5为表示安装本发明实施例的半导体装置的电路板的图。
图6为表示具有本发明实施例的半导体装置的电子设备的图。
图7为表示具有本发明实施例的半导体装置的电子设备的图。
具体实施方式
下面,参照附图详细说明本发明的实施例。但是,本发明并不限于下述的实施例。
图1A至图2为表示本发明实施例的半导体装置的制造方法的图,图3为表示本发明实施例的半导体装置的图。本实施例中准备半导体芯片10和基板20。
大多数半导体芯片10的形状为长方体,但并不限于长方体形状,其形状决定于切断半导体晶片时的形状。在半导体芯片10上形成多个焊盘12(电极)。焊盘12是在半导体芯片10上形成的电路元件的外部电极,是由铝或铜等材料薄薄地形成。多个焊盘12是在半导体芯片10的电路元件形成的面上形成。更详细地说,焊盘12多数形成在半导体芯片10的面的端部(例如沿着相向的2个边的端部)。
常常在每个焊盘12上形成凸出14。利用钢球撞击(ball bump)法、电镀法、非电解镀层法等形成凸出14。通过在焊盘12上形成突起状的凸出14,实现半导体芯片10和基板20之间的电连接。另外,常常是,避开焊盘12的至少一部,在半导体芯片10上形成钝化膜(未图示)。
可以由有机系或无机系中的任意材料形成基板20,也可以由上述这些的复合材料形成基板20。作为由有机材料形成的基板20例如有由聚酰亚胺树脂构成的弹性基板。另外,由无机系材料形成的基板20例如有陶瓷基板或玻璃基板。作为有机系和无机系材料的复合结构例如有玻璃环氧基板。另外,作为基板20,可以使用多层基板或组合型基板。
在基板20上形成有配线图形。配线图形22是多个配线22围成一定的形状而构成的。多个配线中的任意配线具有与凸出14之间的电连接部(例如接合部)。
如图1A和图1B中所示,说明将半导体芯片10固定于基板20上的工序。更详细的说,是通过粘接剂24,将半导体芯片10固定于基板20上的工序。
首先,如图1A中所示,将基板20设置在载物台30上。在基板20上设有粘接剂24。向粘接剂24给予一定能量时(热或光等),粘接剂24产生粘接力。例如在用热能引发粘接力的情况下,作为粘接剂24可以使用热固化性树脂,也可以使用热可塑性树脂。如图所示,粘接剂24可以设在基板20上面或者设在半导体芯片10上。
如图1A所示,半导体芯片10是将形成焊盘12(凸出14)的面面向基板20而设置。即通过刀具32,将半导体芯片10中的形成焊盘12的面的相对面向基板20方向挤压。
本实施例中,通过向基板20挤压半导体芯片10,在基板20上固定半导体芯片10,同时实现凸出14和配线图形22之间的电连接。或者是在两者之间实施不产生电连接的挤压,将半导体芯片10固定在基板20上。这种情况下,进行完后述的磨削工序后可以进一步将半导体芯片40(参照图3)向基板20挤压,实现凸出14和配线图形22之间的电连接。
本实施例中,使用各向异性导电材料作为粘接剂24。各向异性导电材料是向绝缘性粘接剂(粘合剂)中分散导电填料26后得到的材料,有时也可以向其中加入分散剂(硅胶系填料等)。作为粘合剂经常使用热固化性树脂。各向异性导电材料可以是薄片状的各向异性导电膜,也可以是糊膏状的各向异性导电糊膏。通过导电填料26在半导体芯片10的凸出14和基板20的配线图形22之间的压碎,实现两者之间的电连接。
如图1B所示,向半导体芯片10的方向下降刀具32,并向基板20的方向挤压半导体芯片10。例如,用刀具32挤压半导体芯片10约10~20秒。粘接剂24的粘接力是通过热能而获得时,边按压半导体芯片10,边加热。这时,可以通过刀具32加热半导体芯片10,或者是可以通过载物台30加热基板20。
通过向基板20挤压半导体芯片10,将一部分粘接剂24排向半导体芯片10的外侧。由此,在半导体芯片10的侧面上形成由一部分粘接剂24所构成的粘接部25。本实施例中的挤压工序中,因为半导体芯片10较厚(例如厚度约为600μm-700μm),所以粘接部25常常是设在低于半导体芯片10的挤压面(基板20的相对面)的位置。由此,在挤压工序中难以在刀具32上附着粘接剂24(更具体地说是粘接部25)。即,在挤压工序中,没有必要在刀具32和半导体芯片10之间夹杂用于防止粘接剂24(更具体地说是粘接部25)附着的薄片(例如氟树脂薄膜)。因此,不会出现刀具32的挤压力被薄片吸收的情况,能够可靠地将刀具32的挤压力传送至半导体芯片10。或者粘接部25可以设在比半导体芯片10的挤压面高的位置上。在这种情况下,能够可靠地将半导体芯片10固定在基板20上。另外,磨削之前的粘接部25的高度设置得比磨削之后的半导体芯片40(参照附图3)的高度要高。
由此,能够将半导体芯片10固定在基板20上。本实施例中,因为在半导体芯片10的侧面上也设置粘接剂24,所以能够更加可靠地固定半导体芯片10和基板20。另外,本实施例中可以用树脂等粘接剂或者树脂密封等,重新将半导体芯片10固定在基板20上。
然后如图2所示,磨削固定在基板20上的半导体芯片10。更详细地说,磨削半导体芯片10中的与基板20相对的那一侧(激活面的相反面)。这时,同时磨削设置在半导体芯片10侧面上的粘接部25。例如,将基板20放置在载物台上并贴附带子(UV带子等)34保持,用设置于磨削刀具36上的磨刀石等磨削半导体芯片10和粘接部25。在上述情况下,即使通过磨削,在半导体芯片10的横向(平行于基板20的面的方向)上产生应力,因为由粘接部25恰好地阻挡住其应力,所以能够防止半导体芯片10从基板20剥落。
磨削过程中产生磨削屑。因为在本实施例中,将半导体芯片10载置于基板20之后进行磨削,所以能够防止磨削屑进入到两者之间的电连接部(凸出14和配线图形22之间的连接部)中。由此,能够抑制半导体装置的电连接不良现象。
如图3所示,由上述方法能够制造薄型的半导体装置1。本实施例的半导体装置具有半导体芯片40和基板20。本实施例的半导体装置包括由上述半导体装置的制造方法得到的结构。半导体40是薄薄地磨削半导体10后形成的。半导体芯片40的厚度可以是约50μm左右。半导体芯片40具有半导体芯片40的上面42和半导体芯片40的侧面44,半导体芯片40的上面42的相对面(下面)由粘接剂24连接在基板20上。
粘接剂24具有在半导体芯片40的侧面上形成的被覆部28。被覆部28在半导体芯片40的侧面44上具有与半导体芯片40的上面42成为一面的部分。换句话说,半导体装置1的上面通过半导体芯片40的上面42和被覆部28的上面29,构成平坦的面。即从基板20的上面27至半导体芯片40的上面42为止的厚度和从基板20的上面27至被覆部28的上面29为止的厚度设置得几乎相等。这里,从基板20的上面27至半导体芯片40的上面42为止的厚度是指从基板20的上面27至半导体芯片40的侧面44和被覆部28相互接触部分的半导体芯片40的上面42为止的距离。另外,从基板20的上面27至被覆部28的上面29为止的厚度是指从基板20的上面27至上述半导体芯片40的侧面和被覆部28相接触部分的被覆部28的上面29为止的距离。或者可以除半导体芯片40的上面42之外,在半导体芯片40的各个面上粘合设置粘接剂24。
由此,因为与半导体芯片40的面成为一个面地将被覆部28设置在半导体芯片40的侧面44上,所以能够提高半导体装置的耐湿性。即能够尽量防止水分或微细的垃圾等进入到半导体装置内部。并且,通过在半导体芯片40的上面42和侧面44中的侧面44上设置粘接剂24(具体地说是粘接部25),同时磨削半导体芯片10和粘接剂24(具体地说是粘接部25),能够使半导体装置对负荷保持高的耐承受性(机械强度)的同时变薄半导体装置的厚度。即,通过全部覆盖半导体芯片40的侧面44,能够增加半导体芯片40和粘接剂24之间的接触面积,所以能够提高半导体芯片40在半导体装置受到冲击等时所具有的耐性。由此,例如即使没有在半导体装置的上面42上设置粘接剂24,能够有效地将半导体芯片40固定在基板20上,并可使半导体装置厚度小。
如图3所示,半导体装置1还包括外部元件50。外部元件50通过未图示的通孔与配线图形22电连接,并设置在与半导体芯片10相反的基板20侧上。外部元件50可以是焊锡球,也可以经过印刷图形、反流工序而形成。
根据本实施例的半导体装置,能够通过操作优异的制造方法提供薄型且高集成的半导体装置。
(变形例)
图4为本实施例的变形例的半导体装置的制造方法说明图。本变形例中,在一个基板20上固定若干个半导体芯片10,然后统一磨削多个半导体芯片10。
基板20具有多个用于载置半导体芯片10的区域。基板20中多个用于载置半导体芯片10的区域,可以成矩阵状排列设置。
粘接剂24可以设置成一体,使其包括载置基板20中半导体芯片10的多个区域。由此,能够简单地设置粘接剂24。另外,如图4中所示设置了薄片状(薄膜状)的粘接剂24。
在基板20上固定多个半导体芯片10之后,统一磨削多个半导体芯片10。更详细地说,连同粘接剂24(具体是上述粘接部)磨削多个与基板20相反的半导体芯片10面。这时,可以是统一一同磨削基板20上的半导体芯片10,也可以一同磨削其中的两个以上。由此,能够同时变薄多个半导体芯片10,所以生产率高。另外,因为多个半导体芯片10是排列在与之电连接的基板20上,所以能够省去由于磨削而重新排列半导体芯片10的麻烦。
然后,切削切断基板20上的每个半导体芯片10,制得上述半导体装置1。根据本变形例,除了上述效果之外,还具有能够提供生产率高的生产方法的效果。
图5中表示了安装了本实施例的半导体装置(包括变形例)的电路板100。电路板100通常使用例如玻璃环氧基板等有机系基板。在电路板100中由铜等所构成的配线图形形成期望的电路,通过机械连接上述配线图形和半导体装置的外部元件,实现它们之间的电连接。
另外,作为使用本发明的半导体装置的电子设备,分别在图6和图7中表示了笔记本电脑200和移动电话。
Claims (15)
1、一种半导体装置的制造方法,包括:(a)将具有激活面的半导体芯片的上述激活面面向基板,通过粘接剂向上述基板挤压,以在上述半导体芯片的侧面上形成由上述粘接剂构成的粘接部,(b)从与上述激活面相反的上述半导体芯片的面,同时磨削上述半导体芯片和上述粘接部。
2、根据权利要求1所述的半导体装置的制造方法,其中,上述粘接剂为导电填料分散而成的各向异性导电材料。
3、一种半导体装置的制造方法,包括:(a)将具有激活面1的半导体芯片1的上述激活面1面向基板,通过粘接剂1向上述基板挤压,由此在上述半导体芯片1的侧面上形成由上述粘接剂1构成的粘接部1,(b)将具有激活面2的半导体芯片2的上述激活面2面向基板,通过粘接剂2向上述基板挤压,由此在上述半导体芯片2的侧面上形成由上述粘接剂2构成的粘接部2,(c)从与上述激活面1相反的上述半导体芯片1的面同时磨削上述半导体芯片1、上述半导体芯片2、上述粘接部1和上述粘接部2。
4、根据权利要求3所述的半导体装置的制造方法,其中,上述粘接剂1和粘接剂2为导电填料分散而成的各向异性导电材料。
5、根据权利要求3或4所述的半导体装置的制造方法,其中,在上述(a)工序之前,在上述基板上一体设置粘接上述半导体芯片1的上述粘接剂1和粘接上述半导体芯片2的上述粘接剂2。
6、根据权利要求1或2所述的半导体装置的制造方法制造得到的半导体装置。
7、根据权利要求3或4所述的半导体装置的制造方法制造得到的半导体装置。
8、一种半导体装置,包括:形成配线图形的基板、具有激活面且上述激活面与上述基板相向的半导体芯片、电连接上述半导体芯片和上述配线图形的电极、覆盖上述半导体芯片的侧面并由粘接剂构成的被覆部,其中从上述基板上面至上述被覆部上面为止的厚度与从上述基板的上面至上述半导体芯片上面为止的厚度几乎相等。
9、根据权利要求8所述的半导体装置,其中,上述粘接剂为导电填料分散而成的各向异性导电材料。
10、一种半导体装置,包括:形成配线图形的基板;具有激活面且上述激活面与上述基板相向,并与上述配线图形电连接的半导体芯片;电连接上述半导体芯片和上述配线图形的电极;覆盖上述半导体芯片的侧面并由粘接剂构成的被覆部,其中上述被覆部是通过粘接剂使上述激活面面向上述基板,并向上述基板挤压上述半导体芯片,以在上述半导体芯片的侧面上形成由上述粘接剂构成的粘接部,然后磨削上述半导体芯片中的与上述激活面相反的那一侧面,同时研磨上述粘接部而形成。
11、根据权利要求10所述的半导体装置,其中,上述粘接剂为导电填料分散而成的各向异性导电材料。
12、装有权利要求8或9所述的半导体装置的电路板。
13、装有权利要求10或11所述的半导体装置的电路板。
14、具有权利要求8或9所述的半导体装置的电子设备。
15、具有权利要求10或11所述的半导体装置的电子设备。
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JP2001344176A JP2003152021A (ja) | 2001-11-09 | 2001-11-09 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP2001344176 | 2001-11-09 |
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CN100459080C (zh) * | 2003-07-11 | 2009-02-04 | 索尼化学株式会社 | 电气部件的安装方法和安装装置 |
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JP2007013716A (ja) * | 2005-06-30 | 2007-01-18 | Kyocera Kinseki Corp | 圧電発振器の製造方法 |
US7867878B2 (en) * | 2007-09-21 | 2011-01-11 | Infineon Technologies Ag | Stacked semiconductor chips |
DE102009060480A1 (de) * | 2009-12-18 | 2011-06-22 | Schweizer Electronic AG, 78713 | Leiterstrukturelement und Verfahren zum Herstellen eines Leiterstrukturelements |
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JPH063819B2 (ja) * | 1989-04-17 | 1994-01-12 | セイコーエプソン株式会社 | 半導体装置の実装構造および実装方法 |
US5121190A (en) * | 1990-03-14 | 1992-06-09 | International Business Machines Corp. | Solder interconnection structure on organic substrates |
US5656862A (en) * | 1990-03-14 | 1997-08-12 | International Business Machines Corporation | Solder interconnection structure |
US5136365A (en) * | 1990-09-27 | 1992-08-04 | Motorola, Inc. | Anisotropic conductive adhesive and encapsulant material |
KR100280762B1 (ko) * | 1992-11-03 | 2001-03-02 | 비센트 비.인그라시아 | 노출 후부를 갖는 열적 강화된 반도체 장치 및 그 제조방법 |
DE69426347T2 (de) * | 1993-09-29 | 2001-05-17 | Matsushita Electric Ind Co Ltd | Verfahren zum Montieren einer Halbleiteranordnung auf einer Schaltungsplatte und eine Schaltungsplatte mit einer Halbleiteranordnung darauf |
JP3400877B2 (ja) * | 1994-12-14 | 2003-04-28 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
US5659203A (en) * | 1995-06-07 | 1997-08-19 | International Business Machines Corporation | Reworkable polymer chip encapsulant |
US5682066A (en) * | 1996-08-12 | 1997-10-28 | Motorola, Inc. | Microelectronic assembly including a transparent encapsulant |
US5903056A (en) * | 1997-04-21 | 1999-05-11 | Lucent Technologies Inc. | Conductive polymer film bonding technique |
US6081997A (en) * | 1997-08-14 | 2000-07-04 | Lsi Logic Corporation | System and method for packaging an integrated circuit using encapsulant injection |
US6074895A (en) * | 1997-09-23 | 2000-06-13 | International Business Machines Corporation | Method of forming a flip chip assembly |
US6495083B2 (en) * | 1997-10-29 | 2002-12-17 | Hestia Technologies, Inc. | Method of underfilling an integrated circuit chip |
US6248614B1 (en) * | 1999-03-19 | 2001-06-19 | International Business Machines Corporation | Flip-chip package with optimized encapsulant adhesion and method |
US6528408B2 (en) * | 2001-05-21 | 2003-03-04 | Micron Technology, Inc. | Method for bumped die and wire bonded board-on-chip package |
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2001
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CN100459080C (zh) * | 2003-07-11 | 2009-02-04 | 索尼化学株式会社 | 电气部件的安装方法和安装装置 |
CN101350324B (zh) * | 2003-07-11 | 2010-09-01 | 索尼化学株式会社 | 电气部件的安装方法 |
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