CN1396658A - 半导体集成电路 - Google Patents
半导体集成电路 Download PDFInfo
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- CN1396658A CN1396658A CN02130390A CN02130390A CN1396658A CN 1396658 A CN1396658 A CN 1396658A CN 02130390 A CN02130390 A CN 02130390A CN 02130390 A CN02130390 A CN 02130390A CN 1396658 A CN1396658 A CN 1396658A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/027—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in fuses
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
- G11C17/165—Memory cells which are electrically programmed to cause a change in resistance, e.g. to permit multiple resistance steps to be programmed rather than conduct to or from non-conduct change of fuses and antifuses
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50008—Marginal testing, e.g. race, voltage or current testing of impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
- H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
提供了一种识别微调错误的方法。一根熔丝连接到输出端和电位为VDD或VSS电平的端子之间,固定微调错误时的输出电压。或者,当微调操作错误时,在VDD和VSS之间形成短路,这样就会造成很大的电流,由此可以很容易地对错误进行检测。
Description
发明领域
本发明涉及一种用来识别微调(trimming)故障的半导体集成电路。
背景技术
图8所示的是一个常规的微调的实例。下面这里将介绍一下常规的微调。在图8中,截断熔丝821,端子811和负电源VSS之间的电阻对应电阻841。进一步,如果熔丝821没有截断的话,端子811和负电源VSS之间的电阻对应电阻841和842的合成电阻。图8电路中,端子811的电压由这个电阻值和电阻843的电阻值的比值控制。
在常规的微调中,如果不执行微调,那么得到的就是一个不符合要求的产品。但是有一种可能,不需要执行微调而提供符合要求的产品取决于测试有效电压的范围。在这种情况下,即使激光辐射到这个位置,切断了熔丝,这样因为微调校准位置的偏移不能够进行微调,或者是出现类似的情况时,在测试时仍然可能提供符合要求的产品。另外,还存在一种令人担心的问题,那就是激光辐射到错误的位置会影响产品的长期可靠性,所以,不符合要求的产品应该被正确识别。
发明内容
为了解决上面描述的问题,本发明的目的是提供一种半导体集成电路,该电路的一个结构用模拟的熔丝根据微调错误的情况下的输出来识别故障。如上构成的半导体集成电路有一个优点,就是可以根据输出是否固定为VSS或者VDD来判断微调是成功的还是失败的。进一步,如果没有执行微调,正电源和负电源之间出现短路时采用这样的结构,这样,可以通过检查消耗的电流就可以判断微调是成功的还是失败的。
附图说明
图1是本发明的一个CMOS电路的结构图;
图2是本发明的一个CMOS电路的结构图;
图3是本发明的一个CMOS电路的结构图;
图4是本发明的一个CMOS电路的结构图;
图5是本发明的一个CMOS电路的结构图;
图6是本发明的一个CMOS电路的结构图;
图7是本发明的一个CMOS电路的结构图;
图8所示的是一个常规的微调机构的结构图的实例;
图9是本发明的一个微调机构的版图实例;
图10是本发明的微调机构的电路图;
图11是本发明的一个微调机构的设计实例。
具体实施方式
下文中,将参照附图对本发明的实施例进行描述。图1到图7所示的是根据本发明的CMOS电路结构的实例。
图1是显示本发明的实施例的图,其中,熔丝121的一端接在CMOS电路100的输出和输出端111之间,熔丝的另外一端则接到晶体管131上。在图1中,如果微调操作正常,熔丝121被截断,输出端111的电压由CMOS电路100决定。在微调发生错误的情况下,当一个信号输入到检测端112使晶体管131导通时,输出端111通过熔丝121连接到了负电源电压VSS上,这样输出端111的电压就变成了VSS。于是,这样可以检测微调错误。
图2是显示本发明的另一个实施例的图,其中,熔丝221的一端接到CMOS电路200的输出和输出端211之间,熔丝221的另外一端接到晶体管231上。在图2中,如果微调操作正常,熔丝221被截断,输出端211的电压由CMOS电路200来决定。在微调发生错误的情况下,当一个信号输入到检测端212使得晶体管231导通时,输出端211就通过熔丝221连接到正电源电压VDD上,这样输出端211的电压就变成了VDD。于是,这样可以检测微调错误。
图3是显示本发明的另一个实施例的图,在图中,晶体管331和熔丝321串连到CMOS电路300的输出和输出端311之间。在图3中,如果微调操作正常,熔丝321被截断,输出端311的电压由CMOS电路300决定。在微调发生故障的情况下,当一个信号输入到检测端312使得晶体管331导通时,输出端311通过熔丝321连接到负电源电压VSS上,这样输出端311的电压就变成了VSS。于是,这样可以检测微调错误。
图4是显示本发明的另一个实施例的图,其中,晶体管431和熔丝421串连到CMOS电路400的输出和输出端411之间。在图4中,如果微调操作正常,熔丝421被截断,输出端411的电压由CMOS电路400决定。在微调发生故障的情况下,当一个信号输入到检测端412使得晶体管431导通时,输出端411通过熔421连接到正电源电压VDD上,这样输出端411的电压就变成了VDD。于是,这样可以检测微调错误。
图5中,如果微调操作正常,熔丝521被截断,没有电流流过晶体管531。在微调发生故障的情况下,当一个信号输入到检测端512使得晶体管531导通时,晶体管中将有电流流过。于是,这样可以检测微调错误。
图6中,如果微调操作正常,熔丝621被截断,没有电流流过晶体管631。在微调发生故障的情况下,当一个信号输入到检测端612使得晶体管631导通时,晶体管中将有电流流过。于是,这样可以检测微调错误。
在图7中,如果微调操作正常,熔丝721或722被截断,这样,晶体管731和732中就不会有电流。在微调发生故障的情况下,当多个信号输入到检测端712和713使得晶体管731和732分别导通时,这样,会有电流流过。于是,这样可以检测微调错误。
图9和图10是一个设计实例和一个对应的电路图。在图9中,依照对准951进行激光微调。如果对主要的熔丝921和922微调操作正常,检测错误的熔丝923也须被截断。相反,由于杂质的存在或者类似的原因,使得激光微调不按照定位调整执行,在主要的熔丝921和922的微调不正确的情况下,也不截断用于错误检测的熔丝。于是,这样可以检测微调错误。
而且,当多个芯片按照图11所示的准线进行对准时,在发生位置偏移的情况下,主要熔丝的微调的成败主要是通过错误检测熔丝来判断。
本发明可以依照上面描述的实施例来实现,并且提供如下的作用:当微调操作发生故障时,输出端的电压固定为电源电压;通过流过的大电流就可以易于检测到微调错误;于是,微调操作不正确的电路就可以被区别出来。
Claims (9)
1、一种CMOS电路,包含有:
设有熔丝微调结构的第一CMOS电路;
设有第一源极、第一栅极和第一漏极的第一MOS晶体管,第一源极连接到电源电压上,第一栅极与第一测试信号端相连;
第一熔丝,熔丝一端接到晶体管漏极,另外一端接到第一CMOS电路的输出端。
2、依据权利要求1的CMOS电路,其中连接到第一源极的电源电压是负电源电压。
3、依据权利要求1的CMOS电路,其中连接到第一源极的电源电压是正电源电压。
4、一种CMOS电路,包含:
设有熔丝微调结构的第一CMOS电路;
设有第一源极、第一栅极和第一漏极的第一MOS晶体管,第一漏极连接到第一CMOS电路的输出端,第一栅极与第一测试信号端相连;
第一熔丝,熔丝一端连接第一源极,另外一端与电源电压相连。
5、依据权利要求4的CMOS电路,其中与第一根熔丝相连的电源电压是负电源电压。
6、依据权利要求4的CMOS电路,与第一熔丝相连的电源电压是正电源电压。
7、一种CMOS电路,包含:
设有熔丝微调结构的第一CMOS电路;
设有第一源极、第一栅极和第一漏极的第一MOS晶体管,第一源极与正电源电压相连,第一栅极与第一测试信号端相连;
第一熔丝,熔丝的一端连接到第一漏极,另一端与负电源电压相连。
8、一种CMOS电路,包含:
设有熔丝微调结构的第一CMOS电路;
设有第一源极、第一栅极和第一漏极的第一MOS晶体管,第一源极与电源电压相连,第一栅极与第一测试信号端相连;
第一熔丝,熔丝的一端连接到第一漏极,另一端与正电源电压相连。
9、一种CMOS电路,包含:
设有熔丝微调结构的第一CMOS电路;
设有第一源极、第一栅极和第一漏极的第一MOS晶体管,第一源极与负电源电压相连,第一栅极与第一测试信号端相连;
设有第二源极、第二栅极和第二漏极的第二MOS晶体管,第二源极与正电源电压相连,第二栅极与第二测试信号端相连;
第一熔丝,它的一端连接到第一漏极上;和
第二熔丝,它的一端连接到第二漏极,另一端与第一熔丝的另一端相连。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP204757/2001 | 2001-07-05 | ||
JP2001204757A JP2003023085A (ja) | 2001-07-05 | 2001-07-05 | 半導体集積回路 |
Publications (1)
Publication Number | Publication Date |
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CN1396658A true CN1396658A (zh) | 2003-02-12 |
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ID=19041177
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Application Number | Title | Priority Date | Filing Date |
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CN02130390A Pending CN1396658A (zh) | 2001-07-05 | 2002-07-05 | 半导体集成电路 |
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US (2) | US6774702B2 (zh) |
JP (1) | JP2003023085A (zh) |
CN (1) | CN1396658A (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101350226B (zh) * | 2007-07-20 | 2011-09-07 | 中芯国际集成电路制造(上海)有限公司 | 验证检测设备检测结果是否正确的方法 |
CN101252119B (zh) * | 2008-03-25 | 2012-07-04 | 上海宏力半导体制造有限公司 | Mos器件的特性测量结构 |
CN103178824A (zh) * | 2013-03-18 | 2013-06-26 | 西安华芯半导体有限公司 | 一种能够实现部分模块电源关断的集成电路及关断方法 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4364515B2 (ja) * | 2003-01-09 | 2009-11-18 | Okiセミコンダクタ株式会社 | ヒューズレイアウト,及びトリミング方法 |
US7459956B2 (en) * | 2004-05-05 | 2008-12-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Storing information with electrical fuse for device trimming |
JP2007067340A (ja) * | 2005-09-02 | 2007-03-15 | Nec Electronics Corp | 半導体集積回路装置およびそのテスト方法 |
US9224566B2 (en) * | 2009-12-11 | 2015-12-29 | Fairchild Semiconductor Coporation | Fuse driver circuits |
US20200373109A1 (en) * | 2019-05-21 | 2020-11-26 | Rosemount Aerospace, Inc. | Fuse assembly and method of making |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4995004A (en) * | 1989-05-15 | 1991-02-19 | Dallas Semiconductor Corporation | RAM/ROM hybrid memory architecture |
JPH1166893A (ja) * | 1997-08-22 | 1999-03-09 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP2001156255A (ja) * | 1999-11-25 | 2001-06-08 | Oki Electric Ind Co Ltd | 半導体集積回路 |
JP2002208294A (ja) * | 2001-01-12 | 2002-07-26 | Toshiba Corp | リダンダンシーシステムを有する半導体記憶装置 |
-
2001
- 2001-07-05 JP JP2001204757A patent/JP2003023085A/ja active Pending
-
2002
- 2002-07-03 US US10/188,685 patent/US6774702B2/en not_active Expired - Lifetime
- 2002-07-05 CN CN02130390A patent/CN1396658A/zh active Pending
-
2004
- 2004-05-05 US US10/839,512 patent/US20040207455A1/en not_active Abandoned
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101350226B (zh) * | 2007-07-20 | 2011-09-07 | 中芯国际集成电路制造(上海)有限公司 | 验证检测设备检测结果是否正确的方法 |
CN101252119B (zh) * | 2008-03-25 | 2012-07-04 | 上海宏力半导体制造有限公司 | Mos器件的特性测量结构 |
CN103178824A (zh) * | 2013-03-18 | 2013-06-26 | 西安华芯半导体有限公司 | 一种能够实现部分模块电源关断的集成电路及关断方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2003023085A (ja) | 2003-01-24 |
US6774702B2 (en) | 2004-08-10 |
US20040207455A1 (en) | 2004-10-21 |
US20030006466A1 (en) | 2003-01-09 |
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