CN1280882C - 用于超大规模集成的多层铜互连的方法 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 49
- 239000010949 copper Substances 0.000 title claims description 62
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims description 56
- 229910052802 copper Inorganic materials 0.000 title claims description 55
- 230000010354 integration Effects 0.000 title claims description 14
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 101
- 239000002184 metal Substances 0.000 claims abstract description 85
- 229910052751 metal Inorganic materials 0.000 claims abstract description 84
- 238000004519 manufacturing process Methods 0.000 claims abstract description 23
- 150000004706 metal oxides Chemical class 0.000 claims abstract 100
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 claims description 75
- 229960004643 cupric oxide Drugs 0.000 claims description 29
- 238000006243 chemical reaction Methods 0.000 claims description 20
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical group [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 15
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical group [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 14
- 230000004888 barrier function Effects 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 9
- 229910052763 palladium Inorganic materials 0.000 claims description 8
- 229910052697 platinum Inorganic materials 0.000 claims description 7
- 239000011248 coating agent Substances 0.000 claims description 6
- 238000000576 coating method Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 6
- HBEQXAKJSGXAIQ-UHFFFAOYSA-N oxopalladium Chemical compound [Pd]=O HBEQXAKJSGXAIQ-UHFFFAOYSA-N 0.000 claims 6
- MUMZUERVLWJKNR-UHFFFAOYSA-N oxoplatinum Chemical compound [Pt]=O MUMZUERVLWJKNR-UHFFFAOYSA-N 0.000 claims 6
- 229910003445 palladium oxide Inorganic materials 0.000 claims 6
- 229910003446 platinum oxide Inorganic materials 0.000 claims 6
- 230000001131 transforming effect Effects 0.000 claims 5
- 238000000206 photolithography Methods 0.000 abstract description 3
- 238000001459 lithography Methods 0.000 abstract description 2
- 238000007772 electroless plating Methods 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 15
- 238000005229 chemical vapour deposition Methods 0.000 description 11
- 239000013078 crystal Substances 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 8
- 229910052760 oxygen Inorganic materials 0.000 description 7
- 229910000431 copper oxide Inorganic materials 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- 239000005751 Copper oxide Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 239000002243 precursor Substances 0.000 description 4
- POILWHVDKZOXJZ-ARJAWSKDSA-M (z)-4-oxopent-2-en-2-olate Chemical compound C\C([O-])=C\C(C)=O POILWHVDKZOXJZ-ARJAWSKDSA-M 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 238000003795 desorption Methods 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 238000007540 photo-reduction reaction Methods 0.000 description 3
- 238000004549 pulsed laser deposition Methods 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- YRAJNWYBUCUFBD-UHFFFAOYSA-N 2,2,6,6-tetramethylheptane-3,5-dione Chemical group CC(C)(C)C(=O)CC(=O)C(C)(C)C YRAJNWYBUCUFBD-UHFFFAOYSA-N 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000005728 strengthening Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 229910000906 Bronze Inorganic materials 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- VVTSZOCINPYFDP-UHFFFAOYSA-N [O].[Ar] Chemical compound [O].[Ar] VVTSZOCINPYFDP-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- BTFJIXJJCSYFAL-UHFFFAOYSA-N arachidyl alcohol Natural products CCCCCCCCCCCCCCCCCCCCO BTFJIXJJCSYFAL-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000010974 bronze Substances 0.000 description 1
- 239000006227 byproduct Substances 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 238000007665 sagging Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 210000005239 tubule Anatomy 0.000 description 1
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Abstract
一种制造集成电路的方法,该方法利用金属氧化物薄膜(220)作为籽晶层以在集成电路中建立多层互连结构。在晶片(210)上淀积金属氧化物薄膜(220),按与金属线图形(215)对应的图形利用标准光刻以暴露金属氧化物膜(220)。该金属氧化物膜(220)转化为金属层(240),然后通过选择性CVD或者化学镀可在转化的氧化膜(260)上淀积金属膜(250)。然后以利用通孔光刻的类似工艺制造通孔(280)。继续该工艺直到制造出期望的多层结构。
Description
发明领域
本发明涉及集成电路的制造。具体地说,本发明涉及使用氧化铜薄膜作为籽晶层,用于在集成电路中形成多层互连结构。
发明背景
集成电路(IC)微型化的快速发展导致产生了更密集和更精细布置的具有更好性能的芯片。为了提高高级IC的性能,互连系统逐渐从铝薄膜转变为铜薄膜。与传统上使用的材料铝相比,铜具有更多的优点,这些优点对于提高集成电路的性能是至关重要的。首先,铜具有比铝低得多的表面电阻率。这样,对于承载相同量的电流来说,铜线能够做得比铝线更窄更薄。因此,使用铜线可得到更高的集成密度。而且,更窄更薄的导电线降低了内层和内线电容,对于电路来说这就可以实现更高的速度和更少的泄漏(bleed over),最后,铜具有比铝更好的抗电迁移性。因此,当金属线变得更薄并且电路被更密集地组装时,在ICs中使用铜提供了更高的可靠性。
在所提出的制造铜互连的几个方法中,最有前途的方法是镶嵌(Damascene)工艺。在使用该方法中,沟槽和通路形成在覆盖层介质中,然后在一个步骤中将金属淀积到沟槽和孔中,接着通过化学机械平坦化(CMP)工艺来除去不想要的表面金属。这样在沟槽和孔中留下想要的金属,以及用于后续加工的平整表面。
然而,在上述CMP工艺中,尤其对于通路来说,除去了99%以上淀积的铜。单独从铜方面来看,是非常浪费且昂贵的。此外,在CMP工艺过程中过量地消耗了制造消耗品,例如衬垫和浆料。这些制造副产品的处置足以引起对环境的关注,以确保一个更可行的方法。因此,非常希望实现不使用CMP工艺的铜金属化。通过化学镀或者化学气相淀积(CVD)法选择淀积铜提供了一种“非CMP”的金属化技术。例如,在名称为“用于ULSI的选择性非电镀多层铜金属化”MicronDocket No.99-0715的在先未决申请(在此引入作为参考)中描述了一种利用化学选择沉积铜的制造多层互连结构的方法。在该方法中,非常薄的Pd或者Cu膜形成“岛结构”或者仅3-10nm厚的连续薄膜。
发明内容
在本发明的一个方面中,在晶片上制造包括金属线和通孔的多层铜互连。首先,在晶片上淀积氧化铜薄籽晶层。通过标准的光刻术限定金属线图形之后,利用紫外线光致还原法使曝光的氧化铜转化为铜。然后,利用化学镀或者化学气相淀积(CVD)法淀积铜膜,从而提供平整表面。在下一步,利用常规的方法例如通孔光刻术制造通孔,按与第一层类似的方式淀积第二氧化铜层。与第一铜层一样,为后续层提供平整表面。
结果,通过重复这些工序可制成具有所期望多个金属层的多层互连结构,而不需要CMP工艺。使用氧化铜代替铜作为籽晶层的一个最大优点是潜在的高IC生产率。如果使用纯铜籽晶层,根据晶片暴露于空气的时间长短,在晶片的表面上可能形成天然氧化铜。这样会产生可再制性的问题,除非进行去除氧化铜的附加步骤。
附图的简要描述
图1-5的截面图示出用于制造超大规模集成的多层金属互连的例示方法。
图6是本发明的替换实施例的截面图。
本发明的详细描述
根据本发明的例示方法,下面将描述制造用于超大规模(ULSI)集成的多层金属互连的方法。建议使用氧化铜薄膜作为籽晶层来制造所期望的多层互连结构。先前,在名称为“导电材料构图方法”(MicronDocket No.99-0671)和“从集成互连除去氧化铜”(美国专利申请No.09/484,683)的共同转让专利申请(在此引入作为参考)中描述了使用氧化铜作为籽晶层制造化学淀积的铜线。
下面充分详细地示出和描述了本发明的实施例,从而以使本领域的普通技术人员能够完成和实施本发明,所提供的实施例仅用来例证和教导本发明的原理,而不是限制本发明。这样,在避免使本发明不清楚的适当描述中,该说明书可能省略某些本领域技术人员公知的信息。
图1-5显示了集中地并按顺序截取的多个截面图,这些截面图说明了制造用于ULSI的多层互连的例示方法。如图1所示,该方法从半导体晶片210开始。应理解该半导体晶片210可以处于制造的任何阶段。在半导体晶片210的表面上淀积10-30nm厚的氧化铜薄层220。虽然这里公开了使用铜和氧化铜制造多层互连,但是应理解其它的金属和它们的氧化物(例如铂和钯)也非常适用于所公开的方法。
在例示的实施例中,可以使用各种技术淀积氧化铜层220,包括CVD、电离-磁控管溅射技术、DC磁控管自溅射技术、等离子蒸发、等离子增强CVD、金属有机微波等离子CVD、来自二叔戊酰甲烷铜的CVD和脉冲激光淀积,但并不限于这些技术。
例如,V.F.Drobny等人在“Thin Solid Films”第61卷,NO.1,89-98(1979)中报道(在此引入作为参考),在氧-氩混合物中的反应溅射产生氧化铜薄膜,该氧化铜薄膜具有通过改变排放物中氧的分压而控制的参数范围。最近,A.Parretta等人在“PhysicaStatus Solidi A”,第155卷,No.2,399-404(1996)(在此引入作为参考)中研究了通过反应RF磁控管溅射制备的氧化铜膜的电和光特性,并得出结论:可以通过控制氧分压得到单相Cu2O和CuO。Parretta发现Cu2O膜的典型电阻率为43欧姆-cm,比纯铜至少高6个数量级。
在另一种技术中,如K.Santra等人在“Thin Solid Films”第213卷,No.2,226-9(1992)(在此引入作为参考)中所报道的,在恒定氧压力下通过等离子放电,利用蒸发金属铜在基片上淀积氧化铜膜。“所淀积”的一价氧化物在退火之后变相为二价氧化物。而且,如H.Holzsuch等人在Applied Physics A,Vol.A51,No.6,486-90(1990)(在此引入作为参考)中所报导的,使用乙酰丙酮化铜作为前体,通过增强CVD来淀积氧化铜膜。Holzsuch发现基片温度的增加使淀积的相从Cu2O+CuO改变为Cu。在高于500℃的温度,淀积速度高,但薄膜主要是金属铜。而且,B.Wisniesky等人在Journal de Physique,Vol.1,No.C2,389-95(1991)(在此引入作为参考)中介绍了作为创新技术的微波增强CVD,以允许使用乙酰丙酮化铜的易挥发的金属有机前体在铜的不同价态的低温下直接制备。但是请注意,合理的选择工艺参数例如微波功率、基片温度以及氧化剂气体N2O或者O的混合物允许金属铜、Cu2O或者CuO的形成。
近来,在由T.Mruyama在“太阳能材料和太阳能电池”,第56卷,No.1,85-92(1998)(在此引入作为参考)中报导的另一种方法中,通过常压CVD法从二叔戊酰甲烷铜和氧来制备多晶氧化铜薄膜。最近,Y.Matsuura等人在“Applied Optics”,Vol.38,No.9,1700-3(1999)(在此引入作为参考)中报导,在CVD工艺中使用乙酰丙酮化铜作为前体,在涂银玻璃细管的内侧淀积氧化铜介质膜。可以发现该氧化铜淀积物具有耐化学品和耐热的性能。
最后,在此再引入两种淀积氧化铜的其它方法作为参考。M.Shurr等人近来在“Thin Solid Films”,Vol.342,No.1-2,266-9(1999)中报导,利用有机前体由朗缪尔-勃拉吉特(L-B)多层膜来制备CuO的超薄膜,其中L-B多层膜由二十烷醇铜(Cu-arachidate)构成,通过热脱附(desorption)或UV脱附除去有机成份。R.Leuchtner等人在“外延氧化薄膜II,材料研究协会论文集学报”,Vol.401,551-56(1995)中报导了用于生长氧化铜膜的另一种技术。这里,使用铜金属或者氧化铜靶通过脉冲激光淀积(PLD)法生长氧化铜膜。在某些条件下,在450℃得到外延CuO膜。
参考图2,如上所述,在晶片210上淀积氧化铜的薄层220之后,使用第一光致抗蚀剂层230通过标准光刻术限定金属线图形215。仔细选择光致抗蚀剂层230的厚度,以便与金属线215的厚度匹配。参考图3,然后依照常规的或者以后开发的工艺,包括例如在名称为“导电材料构图方法”,Micro Docket No.99-0671的共同未决和共同转让的专利申请中描述的方法(这里引入作为参考),通过UV光致还原方法就地将曝光的氧化铜220转化为铜层240。通过选择性的CVD或者化学镀,选择性地淀积铜膜250到期望的厚度。在这些步骤之后,不使用CMP而为后续步骤提供平整表面255。
如图4所示,还可以制造通孔280。与如上所述淀积第一氧化铜层220的方式类似,在第一光致抗蚀剂层230和铜层250上淀积第二氧化铜籽晶层260。然后,利用其厚度与通路280的长度对应的光致抗蚀剂层270进行通孔光刻。现在参考图5,如上所述,利用UV光致还原法原地将曝光的氧化铜290转化为铜。通过选择性CVD或者化学镀,选择性地淀积铜膜295到所期望的厚度。再仔细选择第二光致抗蚀剂层270的厚度,以便与通孔280长度匹配。与前面一样,在这些步骤之后,不使用CMP而为后续步骤提供平整表面297。
通过以任何顺序重复前面的工序,能够制造想要的多层,以便形成多层互连结构。
在图6所示的可替换实施例中,前述工艺可以与氧化铜层220和第一光致抗蚀剂层230中埋置的铜层250之间的绝缘层300结合。该绝缘层300可以由在如上所述的第一光致还原步骤中不透过UV光的SiO2或者等效材料构成。
对于高性能封装中的应用来说,在前述步骤之后,所使用的光致抗蚀剂层230和270可以留下并用作低介电常数绝缘层。而且,在假定线间距大于10微米的情况下,由于线之间的漏电流将显著低于信号,因此,具有高电阻率并且自身几乎绝缘的氧化铜籽晶层220和260可以留在原地。
对于ULSI芯片中的应用来说,通过氧等离子灰化法除去所用的光致抗蚀剂层,并且通过上面Wisiniewsky等人所描述的蚀刻除去所用的氧化铜籽晶层220和250。采用该方法留下了完成的空气-桥结构,然后利用名称为“在集成电路中制作铜布线的方法及装置”(美国专利申请No.09/484303)的共同未决和共同转让的专利申请(在此引入上述文献作为参考)中所描述的材料和方法,可以使该结构钝化。如果需要,可以在一个操作中用适当的介质层填充空气空间。
在如上所述的例示方法中,假设设计的IC芯片没有未支撑的长线。对于较长的线来说,由于它们的重量,在加工过程中可能会下垂,应考虑美国专利No.5,891,797(在此引入作为参考)所描述的工序。对上层布线上的铜布线线宽有限制,因为宽的线被分为接近最小宽度和间距的几条线,这将在结构中确保充足的空间,以便能够除去下层和开口的空气-桥结构上的光致抗蚀剂。
总之,所公开的方法是一种利用铜以及氧化铜籽晶层的选择性地淀积,制造多层铜互连结构的新颖方法,消除和简化了许多浪费的CMP步骤,引入了加强的制造步骤,用于高性能封装和USLI芯片。
虽然这里已经详细说明和描述了本发明的各种实施例,但很显然在不离开本发明精神的情况下,可以在在此作出修改和添加,这些都包括在本发明的精神和附加的权利要求范围内。
Claims (27)
1.一种在半导体芯片制造中制造多层互连的方法,包括:
在半导体晶片上淀积金属氧化物层;
将该金属氧化物层的一个部分或多个部分转化为一部分或者多部分金属,而至少留下金属氧化物的其它部分;和
在该金属氧化物层的一个或者多个转化的和未转化的部分上淀积金属层。
2.如权利要求1的制造多层互连的方法,还包括:
在该金属氧化物层和转化为金属的金属氧化物层之间设置一绝缘层。
3.权利要求1的制造多层互连的方法,其中,自该金属氧化物层转化的该金属是铜,该金属氧化物是氧化铜。
4.权利要求1的制造多层互连的方法,其中,自该金属氧化物层转化的该金属是铂,该金属氧化物是氧化铂。
5.权利要求1的制造多层互连的方法,其中,自该金属氧化物层转化的该金属是钯,该金属氧化物是氧化钯。
6.一种在半导体芯片制造中制造多层互连的方法,包括:
在半导体晶片上淀积第一金属氧化物层;
将该第一金属氧化物层的一个或者多个部分转化为一部分或者多部分金属,而至少留下该第一金属氧化物层的其余部分;
在该第一金属氧化物层的一个或者多个转化的和未转化的部分上淀积第一金属层;
在该第一金属层上淀积第二金属氧化物层;
将该第二金属氧化物层的一个或者多个部分转化为一部分或者多部分金属,而至少留下该第二金属氧化物层的其它部分;和
在该第二金属氧化物层的一个或者多个转化的和未转化的部分上淀积第二金属层。
7.如权利要求6的制造多层互连的方法,其中,自该金属氧化物层转化的该金属是铜,该金属氧化物是氧化铜。
8.如权利要求6的制造多层互连的方法,其中,自该金属氧化物层转化的该金属是铂,该金属氧化物是氧化铂。
9.如权利要求6的制造多层互连的方法,其中,自该金属氧化物层转化的该金属是钯,该金属氧化物是氧化钯。
10.如权利要求6的制造多层互连的方法,还包括:
在该第一金属氧化物层和转化为金属的金属氧化物层之间设置一绝缘层。
11.一种在半导体芯片制造中制造多层互连的方法,包括:
在半导体晶片上淀积第一金属氧化物层;
将该第一金属氧化物层的一个或者多个部分转化为一部分或者多部分金属,而至少留下该第一金属氧化物层的其余部分;
在该第一金属氧化物层的一个或者多个转化的和未转化的部分上淀积第一金属层;
在该第一金属层上淀积第二金属氧化物层;
将该第二金属氧化物层的一个或者多个部分转化为一部分或者多部分金属,而至少留下该第二金属氧化物层的其它部分;和
在该第二金属氧化物层的一个或者多个转化的和未转化的部分上淀积第二金属层;
在该第二金属层上淀积第三金属氧化物层;
将该第三金属氧化物层的一个或者多个部分转化为一部分或者多部分金属,而至少留下该第三金属氧化物层的其它部分;和
在该第三金属氧化物层的一个或者多个转化的和未转化的部分上淀积第三金属层。
12.如权利要求11的制造多层互连的方法,其中,自该金属氧化物层转化的该金属是铜,该金属氧化物是氧化铜。
13.如权利要求11的制造多层互连的方法,其中,自该金属氧化物层转化的该金属是铂,该金属氧化物是氧化铂。
14.如权利要求11的制造多层互连的方法,其中自该金属氧化物层转化的金属是钯,金属氧化物是氧化钯。
15.如权利要求11的制造多层互连的方法,还包括:
在该第一金属氧化物层和转化为金属的第一金属氧化物层之间设置一绝缘层。
16.一种多层集成电路,包括:
至少一个或者多个集成器件;
金属氧化物的第一绝缘层,金属氧化物接触相应的一个或者多个集成器件、并通过在器件上淀积金属氧化物层而形成;
金属层,该金属层通过将该金属氧化物层的一个或者多个部分转化为一个或者多个转化的部分的金属、而至少留下金属氧化物的其它部分,以及在其上淀积一层金属而形成。
17.如权利要求16的多层集成电路,其中,自该金属氧化物层转化的该金属是铜,该金属氧化物是氧化铜。
18.如权利要求16的多层集成电路,其中,自该金属氧化物层转化的该金属是铂,该金属氧化物是氧化铂。
19.如权利要求16的多层集成电路,其中,自该金属氧化物层转化的该金属是钯,该金属氧化物是氧化钯。
20.一种多层集成电路,包括:
至少一个或者多个集成器件;
金属氧化物的第一绝缘层,该金属氧化物与相应的一个或者多个集成器件接触,并通过在器件上淀积金属氧化物层而形成;
第一金属层,该第一金属层通过将该金属氧化物层的一个或者多个部分转化为一个或者多个转化部分的金属、而至少留下该金属氧化物的其它部分,以及在其上淀积一层金属所形成;
金属氧化物的第二绝缘层,该金属氧化物与相应的第一金属层接触,并通过在该第一金属层上淀积第二金属氧化物层而形成;
第二金属层,该第二金属层通过将该第二金属氧化物层的一个或者多个部分转化为一个或者多个转化部分的金属而至少留下该金属氧化物的其它部分、以及通过在其上淀积一层金属所形成。
21.如权利要求20的多层集成电路,其中,自该金属氧化物层转化的该金属是铜,该金属氧化物是氧化铜。
22.如权利要求20的多层集成电路,其中,自该金属氧化物层转化的该金属是铂,该金属氧化物是氧化铂。
23.如权利要求20的多层集成电路,其中,自该金属氧化物层转化的该金属是钯,该金属氧化物是氧化钯。
24.一种多层集成电路,包括;
至少一个或者多个集成器件;
金属氧化物的第一绝缘层,该金属氧化物与相应的一个或者多个集成器件接触,并通过在器件上淀积金属氧化物层而形成;
第一金属层,该第一金属层通过将该金属氧化物层的一个或者多个部分转化为一个或者多个转化部分的金属而至少留下该金属氧化物的其它部分、并且在其上淀积一层金属而形成;
金属氧化物的第二绝缘层,该金属氧化物与相应的第一金属层接触,并通过在该第一金属层上淀积第二金属氧化物层而形成;
第二金属层,该第二金属层通过将该第二金属氧化物层的一个或者多个部分转化为一个或者多个转化部分的金属而至少留下该金属氧化物的其它部分、并且通过在其上淀积一层金属层而形成;
金属氧化物的第三绝缘层,该金属氧化物与相应的第二金属层接触,并通过在该第二金属层上淀积第三金属氧化物层而形成;
第三金属层,该第三金属层通过将该第三金属氧化物层的一个或者多个部分转化为一个或者多个转化部分的金属而至少留下该金属氧化物的其它部分、并且通过在其上淀积一层金属而形成。
25.如权利要求24的多层集成电路,其中,自该金属氧化物层转化的该金属是铜,该金属氧化物是氧化铜。
26.如权利要求24的多层集成电路,其中,自该金属氧化物层转化的该金属是铂,该金属氧化物是氧化铂。
27.权利要求24的多层集成电路,其中,自该金属氧化物层转化的该金属是钯,该金属氧化物是氧化钯。
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-
2001
- 2001-02-05 US US09/777,816 patent/US6451685B1/en not_active Expired - Lifetime
-
2002
- 2002-01-11 US US10/044,097 patent/US6593656B2/en not_active Expired - Lifetime
- 2002-02-04 CN CNB028045556A patent/CN1280882C/zh not_active Expired - Fee Related
- 2002-02-04 EP EP02714825A patent/EP1366513A4/en not_active Withdrawn
- 2002-02-04 WO PCT/US2002/003250 patent/WO2002063672A1/en active Application Filing
- 2002-02-04 KR KR1020037010332A patent/KR100754757B1/ko not_active IP Right Cessation
- 2002-02-04 JP JP2002563518A patent/JP2004524684A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
KR100754757B1 (ko) | 2007-09-04 |
US6451685B1 (en) | 2002-09-17 |
KR20030086994A (ko) | 2003-11-12 |
EP1366513A4 (en) | 2008-04-23 |
JP2004524684A (ja) | 2004-08-12 |
WO2002063672A1 (en) | 2002-08-15 |
US6593656B2 (en) | 2003-07-15 |
CN1531749A (zh) | 2004-09-22 |
US20020106884A1 (en) | 2002-08-08 |
EP1366513A1 (en) | 2003-12-03 |
US20020106890A1 (en) | 2002-08-08 |
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