CN1230758C - 在高速缓存脉冲周期期间控制总线仲裁的系统和方法 - Google Patents

在高速缓存脉冲周期期间控制总线仲裁的系统和方法 Download PDF

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Publication number
CN1230758C
CN1230758C CNB028094654A CN02809465A CN1230758C CN 1230758 C CN1230758 C CN 1230758C CN B028094654 A CNB028094654 A CN B028094654A CN 02809465 A CN02809465 A CN 02809465A CN 1230758 C CN1230758 C CN 1230758C
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China
Prior art keywords
bus
communication bus
control
information
current
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Expired - Lifetime
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CNB028094654A
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Chinese (zh)
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CN1507592A (zh
Inventor
威廉·C·莫耶
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Zenith Investment LLC
Apple Inc
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Freescale Semiconductor Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/30—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal with priority control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CNB028094654A 2001-06-23 2002-05-15 在高速缓存脉冲周期期间控制总线仲裁的系统和方法 Expired - Lifetime CN1230758C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/888,278 2001-06-23
US09/888,278 US6775727B2 (en) 2001-06-23 2001-06-23 System and method for controlling bus arbitration during cache memory burst cycles

Publications (2)

Publication Number Publication Date
CN1507592A CN1507592A (zh) 2004-06-23
CN1230758C true CN1230758C (zh) 2005-12-07

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CNB028094654A Expired - Lifetime CN1230758C (zh) 2001-06-23 2002-05-15 在高速缓存脉冲周期期间控制总线仲裁的系统和方法

Country Status (8)

Country Link
US (1) US6775727B2 (enExample)
JP (1) JP4139771B2 (enExample)
KR (1) KR100899951B1 (enExample)
CN (1) CN1230758C (enExample)
DE (1) DE10296959T5 (enExample)
GB (1) GB2390200B (enExample)
TW (1) TWI221968B (enExample)
WO (1) WO2003001388A1 (enExample)

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US7334059B2 (en) * 2004-03-03 2008-02-19 Freescale Semiconductor, Inc. Multiple burst protocol device controller
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US7617338B2 (en) * 2005-02-03 2009-11-10 International Business Machines Corporation Memory with combined line and word access
KR100633773B1 (ko) * 2005-07-01 2006-10-13 삼성전자주식회사 버스 시스템 및 버스 중재 방법
US8001538B2 (en) 2005-12-07 2011-08-16 Microsoft Corporation Software accessible cache metadata
US8225297B2 (en) 2005-12-07 2012-07-17 Microsoft Corporation Cache metadata identifiers for isolation and sharing
US8813052B2 (en) * 2005-12-07 2014-08-19 Microsoft Corporation Cache metadata for implementing bounded transactional memory
US7865897B2 (en) 2006-02-03 2011-01-04 Freescale Semiconductor, Inc. Selective transaction request processing at an interconnect during a lockout
US8898652B2 (en) * 2006-03-23 2014-11-25 Microsoft Corporation Cache metadata for accelerating software transactional memory
US8266387B2 (en) * 2007-06-27 2012-09-11 Microsoft Corporation Leveraging transactional memory hardware to accelerate virtualization emulation
US8176253B2 (en) * 2007-06-27 2012-05-08 Microsoft Corporation Leveraging transactional memory hardware to accelerate virtualization and emulation
US9043553B2 (en) * 2007-06-27 2015-05-26 Microsoft Technology Licensing, Llc Leveraging transactional memory hardware to accelerate virtualization and emulation
JP2009116702A (ja) * 2007-11-07 2009-05-28 Toshiba Corp 半導体集積回路
US8478920B2 (en) * 2010-06-24 2013-07-02 International Business Machines Corporation Controlling data stream interruptions on a shared interface
US20120089759A1 (en) * 2010-10-08 2012-04-12 Qualcomm Incorporated Arbitrating Stream Transactions Based on Information Related to the Stream Transaction(s)
CN102724389B (zh) * 2011-11-15 2017-06-13 新奥特（北京）视频技术有限公司 一种同平台非编系统间的监视器输出方法
FR2982961B1 (fr) * 2011-11-22 2014-09-05 Schneider Electric Usa Inc Arbitrage de dispositif de commande prioritaire
TWI506536B (zh) 2013-01-10 2015-11-01 Accton Technology Corp 執行裝置及其堆疊方法與堆疊系統
CN103257942B (zh) * 2013-03-27 2015-12-02 青岛中星微电子有限公司 一种片上系统共享总线请求处理的方法及装置
US9606853B2 (en) * 2014-03-28 2017-03-28 Intel Corporation Protecting a memory device from becoming unusable
US10289596B2 (en) * 2016-06-07 2019-05-14 Macronix International Co., Ltd. Memory and method for operating a memory with interruptible command sequence
US10475492B1 (en) 2018-07-27 2019-11-12 Macronix International Co., Ltd. Circuit and method for read latency control

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US4710916A (en) * 1985-08-02 1987-12-01 Gte Laboratories Incorporated Switching apparatus for burst-switching communications system
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Also Published As

Publication number Publication date
US20020199052A1 (en) 2002-12-26
GB2390200A (en) 2003-12-31
CN1507592A (zh) 2004-06-23
JP4139771B2 (ja) 2008-08-27
TWI221968B (en) 2004-10-11
DE10296959T5 (de) 2004-08-05
JP2004531830A (ja) 2004-10-14
WO2003001388A1 (en) 2003-01-03
US6775727B2 (en) 2004-08-10
KR20040012964A (ko) 2004-02-11
GB0324805D0 (en) 2003-11-26
KR100899951B1 (ko) 2009-05-28
GB2390200B (en) 2005-05-18

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