DE602004019990D1 - Verfahren und system zum datentransfer - Google Patents
Verfahren und system zum datentransferInfo
- Publication number
- DE602004019990D1 DE602004019990D1 DE602004019990T DE602004019990T DE602004019990D1 DE 602004019990 D1 DE602004019990 D1 DE 602004019990D1 DE 602004019990 T DE602004019990 T DE 602004019990T DE 602004019990 T DE602004019990 T DE 602004019990T DE 602004019990 D1 DE602004019990 D1 DE 602004019990D1
- Authority
- DE
- Germany
- Prior art keywords
- bus
- signal
- data transfer
- master device
- request
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Exchange Systems With Centralized Control (AREA)
- Small-Scale Networks (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2004/001003 WO2006024193A1 (fr) | 2004-08-30 | 2004-08-30 | Procede et systeme pour transfert de donnees |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602004019990D1 true DE602004019990D1 (de) | 2009-04-23 |
Family
ID=35999685
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004019990T Active DE602004019990D1 (de) | 2004-08-30 | 2004-08-30 | Verfahren und system zum datentransfer |
Country Status (5)
Country | Link |
---|---|
US (1) | US7543093B2 (de) |
EP (1) | EP1811393B1 (de) |
AT (1) | ATE425495T1 (de) |
DE (1) | DE602004019990D1 (de) |
WO (1) | WO2006024193A1 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8504992B2 (en) * | 2003-10-31 | 2013-08-06 | Sonics, Inc. | Method and apparatus for establishing a quality of service model |
US9087036B1 (en) | 2004-08-12 | 2015-07-21 | Sonics, Inc. | Methods and apparatuses for time annotated transaction level modeling |
KR100633773B1 (ko) * | 2005-07-01 | 2006-10-13 | 삼성전자주식회사 | 버스 시스템 및 버스 중재 방법 |
US7478183B2 (en) * | 2006-05-03 | 2009-01-13 | Cisco Technology, Inc. | Method and system for n dimension arbitration algorithm—scalable to any number of end points |
US8868397B2 (en) * | 2006-11-20 | 2014-10-21 | Sonics, Inc. | Transaction co-validation across abstraction layers |
US8438320B2 (en) * | 2007-06-25 | 2013-05-07 | Sonics, Inc. | Various methods and apparatus for address tiling and channel interleaving throughout the integrated system |
US8108648B2 (en) * | 2007-06-25 | 2012-01-31 | Sonics, Inc. | Various methods and apparatus for address tiling |
US9292436B2 (en) | 2007-06-25 | 2016-03-22 | Sonics, Inc. | Various methods and apparatus to support transactions whose data address sequence within that transaction crosses an interleaved channel address boundary |
JP5665974B2 (ja) * | 2010-05-07 | 2015-02-04 | コンバーサント・インテレクチュアル・プロパティ・マネジメント・インコーポレイテッドConversant Intellectual Property Management Inc. | 単一のバッファを用いて複数のメモリ素子を同時にリードする方法及び装置 |
US8478920B2 (en) * | 2010-06-24 | 2013-07-02 | International Business Machines Corporation | Controlling data stream interruptions on a shared interface |
US8972995B2 (en) | 2010-08-06 | 2015-03-03 | Sonics, Inc. | Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads |
US20120089759A1 (en) * | 2010-10-08 | 2012-04-12 | Qualcomm Incorporated | Arbitrating Stream Transactions Based on Information Related to the Stream Transaction(s) |
CN106897281B (zh) | 2015-12-17 | 2020-08-14 | 阿里巴巴集团控股有限公司 | 一种日志分片方法和装置 |
CN114661644B (zh) * | 2022-02-17 | 2024-04-09 | 之江实验室 | 辅助3d架构近存计算加速器系统的预存储dma装置 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62138948A (ja) | 1985-12-13 | 1987-06-22 | Hitachi Ltd | デ−タ転送装置 |
US5129090A (en) | 1988-05-26 | 1992-07-07 | Ibm Corporation | System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration |
US5293493A (en) * | 1989-10-27 | 1994-03-08 | International Business Machines Corporation | Preemption control for central processor with cache |
US5448704A (en) * | 1994-03-07 | 1995-09-05 | Vlsi Technology, Inc. | Method for performing writes of non-contiguous bytes on a PCI bus in a minimum number of write cycles |
US6081860A (en) * | 1997-11-20 | 2000-06-27 | International Business Machines Corporation | Address pipelining for data transfers |
US6718422B1 (en) * | 1999-07-29 | 2004-04-06 | International Business Machines Corporation | Enhanced bus arbiter utilizing variable priority and fairness |
US6393500B1 (en) * | 1999-08-12 | 2002-05-21 | Mips Technologies, Inc. | Burst-configurable data bus |
US6775727B2 (en) * | 2001-06-23 | 2004-08-10 | Freescale Semiconductor, Inc. | System and method for controlling bus arbitration during cache memory burst cycles |
US6981073B2 (en) * | 2001-07-31 | 2005-12-27 | Wis Technologies, Inc. | Multiple channel data bus control for video processing |
US7337232B2 (en) * | 2002-03-28 | 2008-02-26 | Sony Corporation | Method and system for providing and controlling sub-burst data transfers |
US6981088B2 (en) * | 2003-03-26 | 2005-12-27 | Lsi Logic Corporation | System and method of transferring data words between master and slave devices |
EP1811394B1 (de) * | 2004-10-28 | 2012-01-18 | Magima Digital Information Co., Ltd. | Arbitrierer und arbitrierungsverfahren dafür |
KR100633773B1 (ko) * | 2005-07-01 | 2006-10-13 | 삼성전자주식회사 | 버스 시스템 및 버스 중재 방법 |
-
2004
- 2004-08-30 EP EP04762138A patent/EP1811393B1/de not_active Not-in-force
- 2004-08-30 DE DE602004019990T patent/DE602004019990D1/de active Active
- 2004-08-30 WO PCT/CN2004/001003 patent/WO2006024193A1/zh active Application Filing
- 2004-08-30 US US11/661,439 patent/US7543093B2/en not_active Expired - Fee Related
- 2004-08-30 AT AT04762138T patent/ATE425495T1/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US7543093B2 (en) | 2009-06-02 |
ATE425495T1 (de) | 2009-03-15 |
WO2006024193A1 (fr) | 2006-03-09 |
EP1811393A1 (de) | 2007-07-25 |
US20070260793A1 (en) | 2007-11-08 |
EP1811393A4 (de) | 2008-01-23 |
EP1811393B1 (de) | 2009-03-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ATE425495T1 (de) | Verfahren und system zum datentransfer | |
DE602007009290D1 (de) | Verfahren zum aufrechterhalten eines usb-aktivzustands ohne datentransfer | |
ATE500698T1 (de) | System und verfahren zur filterung von datentransfers in einem mobilgerät | |
TW200629154A (en) | Attitude insensitive flow device system and method | |
WO2009148863A3 (en) | Memory systems and methods for controlling the timing of receiving read data | |
SE0402573D0 (sv) | Anordning vid bussförbindelse i CAN-system | |
GB2446997A (en) | Memory access request arbitration | |
WO2009055103A3 (en) | Low-power source-synchronous signaling | |
TW200502788A (en) | Redundant external storage virtualization computer system | |
WO2011139963A3 (en) | Application state and activity transfer between devices | |
ATE468563T1 (de) | Datenbus-interface für ein steuergerät und steuergerät mit einem datenbus-interface | |
EP1723532A4 (de) | Mehrfach-burst-protokoll-einrichtungssteuerung | |
WO2015041773A3 (en) | System power management using communication bus protocols | |
EP1793308A3 (de) | Host-Gerät und denselben benutzendes Informationsverarbeitungssystem | |
FR2837628B3 (fr) | Dispositif de commande pour prises maitre/esclave | |
FR2972161B1 (fr) | Dispositif, systeme et procede pour le partage de vehicules. | |
TW200710819A (en) | Data transfer control device and electronic instrument | |
TW200609742A (en) | Multiple apparatuses connection system and the method thereof | |
WO2013080027A3 (en) | Interrupt handling systems and methods for pcie bridges with multiple buses | |
TW200731107A (en) | Content management system and content management device | |
WO2009014402A3 (en) | Method of protecting input/output packet of usb device and apparatus thereof | |
ATE460706T1 (de) | Kommunikationssystem und -verfahren mit einer slave-einrichtung mit zwischengespeicherter service-anforderung | |
TW200741465A (en) | System and method for bandwidth sharing in busses | |
TW200710666A (en) | System and method to reduce memory latency in microprocessor systems connected with a bus | |
FR2977214B1 (fr) | Procede de controle de l'utilisation des fonctions d'un vehicule mis a disposition |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |