CN1207782C - 集成电路器件、用于智能卡的电子部件及制造该器件的方法 - Google Patents

集成电路器件、用于智能卡的电子部件及制造该器件的方法 Download PDF

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CN1207782C
CN1207782C CNB008036047A CN00803604A CN1207782C CN 1207782 C CN1207782 C CN 1207782C CN B008036047 A CNB008036047 A CN B008036047A CN 00803604 A CN00803604 A CN 00803604A CN 1207782 C CN1207782 C CN 1207782C
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CN1340212A (zh
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伊维斯·赖格诺克斯
埃里克·丹尼尔
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Abstract

本发明涉及集成电路器件，特别是制造用于智能卡的智能卡电子部件。该集成电路器件包括：一个有源层(32)，该有源层包括其中形成有集成电路的半导体材料、并具有一个设置有多个电连接端子(36)的表面(34)和一个第二表面，其中所说表面具有小于100μm的厚度，以及一个附加层(40)，该附加层具有一个附着在有源层的有源表面的第一表面(42)、一个第二表面(44)和一个侧面(48)，其中附加层具有多个凹槽(46)，每个凹槽通过附加层的总厚度伸展并从接触端子(36)延伸到所说侧面(48)。

Description

集成电路器件、用于智能卡的电子部件及制造该器件的方法
技术领域
本发明涉及集成电路器件、利用集成电路器件用于智能卡的电子部件以及制造所说器件的方法。
更确切的讲，本发明涉及半导体芯片的制造，在半导体芯片中形成有集成电路，所述芯片具有一种结构以至可以制造出用于缩减了厚度的智能卡的电子部件。
背景技术
众所周知，智能卡基本上由长方体形的塑料体并在其中嵌入电子部件制成，智能卡具体用作银行卡、如信用卡以及用于不同服务的支付卡，电子部件最常规地将半导体芯片附着在设置有外围电接触焊盘的绝缘衬底上制成。当卡中嵌入这种器件时，这些外围焊盘能使半导体芯片中的电路和读-写器件中的电路之间形成电连接。
根据通行的标准，卡体应具有大约0.8mm的厚度。应当理解，电子部件的厚度是卡体的一个重要参数，便于卡体中电子部件的嵌入，并确保卡体和电子部件之间的正常机械结合以及电子部件的结构完整。
在附图1中，示出了用于智能卡的电子部件的纵向剖面，该智能卡根据公知技术制造。电子部件10实质上由半导体芯片12组成，在半导体芯片中形成有集成电路，具有有源表面14的该芯片设置有电连接端子16。半导体芯片12通过粘结层19附着在绝缘衬底18上。绝缘衬底18的外表面18a设置有外接触焊盘20以至与读-写器件形成电连接。芯片12的端子16通过例如24的引线与外焊盘20连接。根据公知的方法，绝缘衬底由电引线24的窗口26组成，因此避免两面印刷电路的使用。为了保证芯片12和电引线24的电完整性，用绝缘材料如环氧树脂将它们封装62。
在一些情况下，用将芯片端子连接到绝缘衬底上的外围焊盘的其它导电元件可以代替导电引线。
利用这种制造技术，获得总厚度为大约0.6mm的电子部件，以至能与0.8mm厚度的卡体相匹配。
允许缩减这种厚度的技术很难实施。技术的要点是缩减芯片的厚度，芯片厚度按照惯例大约为180μm，但这种厚度却难以接受地降低了芯片的强度。一种技术可能缩减厚度同样导致电布线24或相关的电连接元件的弯曲。然而，这就需要采用昂贵的称为“锲形焊点”技术。最终，可以预期的缩减封装62的绝缘树脂的厚度。然而这种缩减将降低作为整体的电子部件的强度。
US5,155,068公开了一种用于智能卡的电子部件的制造方法。根据这个方法，半导体芯片由一个设置有金属布线层的有源表面组成。在这些金属布线层和设置有电接头的衬底之间形成连接。然后利用丙烯或环氧树脂将半导体芯片附着到有电接头的衬底上。这种方法的实施成本高。
发明内容
本发明的第一个目的是提供一种集成电路器件、可以制造出用于智能卡的电子部件，该电子部件具有一个缩减的厚度而没有上述技术的缺点。
为了实现该目的，根据本发明，集成电路器件的特征在于包括：
一个含有电路的半导体材料的有源芯片，该有源芯片具有一个设置有多个电连接端子的有源表面和一个第二表面，其中芯片的厚度小于100μm，以及
一个附加层，该附加层具有一个附着在有源芯片的有源表面的第一表面、一个第二表面和一个侧面，其中附加层具有多个凹槽，每个凹槽横向地开在附加层中，以便通过附加层的总厚度在高度方向伸展并在横截方向上从接触端子之上延伸到所说侧面，附加层具有比有源芯片大的厚度。
利用这种集成电路器件可以实现用于智能卡的电子部件。该电子部件还包括一个绝缘衬底和多个电引线，该绝缘衬底具有一个设置有外电接触焊盘的外表面和内表面、一个附着在衬底内表面的有源芯片的第二表面，每个所述引线具有连接到接触端子的第一端和连接到外接触焊盘的第二端，并且整个位于包含附加层的第二表面的平面和绝缘衬底之间。
应当理解，由于缩减了有源层的厚度，在有源层的有源表面上，形成接触端子，当形成电子部件时，这些接触端子紧靠附着在绝缘衬底上的集成电路器件的表面。还应当理解，由于开在附加层的侧面的凹槽的存在，当形成电子部件时，在布线中设置连接是可能的，布线整体地设置在包括附加层的上表面的平面之下。应当理解相对于在先所述类型的电子部件的厚度实质上是缩减了电子部件的最终厚度。
本发明也涉及一种制造集成电路器件的方法，该集成电路器件有：
一个包含电路的半导体材料的有源芯片，该有源芯片具有一个设置有多个电连接端子的有源表面和一个第二表面，以及
一个附加层，该附加层具有一个第一表面、一个第二表面和一个侧面，该附加层包括多个凹槽，每个凹槽通过附加层的整个厚度伸展，其中该方法的特征在于包括以下步骤：
附着步骤，其中将该附加层的第一表面附着在有源芯片的有源表面，以使附加芯片的一个凹槽从有源芯片的一个接触端子之上延伸到附加层的侧面；以及
腐蚀步骤，其中从有源芯片的第二表面腐蚀有源芯片以便提供具有小于100μm厚度的有源芯片。
应当理解，根据该方法，起始元件为具有标准厚度，即大约180μm的有源层，该有源层附着在附加层上，其本身具有一定厚度。因此，当根据总的尺寸以使组件保持足够的机械强度时，获得一个用于腐蚀有源层的非有源表面的足够厚的组件。
附图说明
从以下的实施例的详细描述中将清楚表明本发明的其它特征和优点，通过非限定的实例并参照相应附图给出本发明的实施例，其中：
图1，已描述，表示一种用于标准智能卡的电子部件的纵向剖面图。
图2A和2B表示根据本发明的电子部件的两个制造步骤的纵向剖面图。
图3表示电子部件沿着图2B中的III-III线的横向剖面图。
图4A-4C表示集成电路器件的制造方法的各个步骤。
具体实施方式
首先参照图2和图3，将对集成电路器件或利用相同器件的电子芯片和电子部件进行描述。
集成电路器件30实质上由半导体材料的有源层32组成，该半导体材料典型为硅，其内部形成有不同的集成电路。该有源层32具有有源表面34，其内部形成有电接触端子和附着表面38。集成电路30还包括附加层40，附加层的第一表面42通过任何适合的方法例如聚合物形成的内密封层附着在有源层32的有源表面上，并且附加层的上表面44空闲。附加层40也可以方便地由硅制成，但具有物理特性相似于硅，特别涉及它的热膨胀系数的其它材料也能使用。通过附加层40执行的功能之一是为了形成防止相对于有源层的集成电路能执行的欺骗企图(fraud attempts)的保护层。
更清楚地表示在图3中，附加层40设置有凹槽，例如表示为46的一个凹槽(给出的实例中有五个连接端子36和五个凹槽46)。每个凹槽46在附加层的整个厚度上伸展并从接触端子36处延伸到附加层40的侧面48。换句话讲，这些凹槽横向地开在附加层中。
根据上面所述的实施例，附加层的厚度e1为140μm，有源层的厚度e2为40μm。因此，集成电路器件的总厚度为180μm，相当于标准芯片的厚度。
更一般的讲，有源层的厚度小于100μm，该减缩的厚度可以通过利用下述的制造方法获得。然而，有源层的厚度e2的范围最好为5至大约50μm。
有源层的厚度因此比半导体芯片的厚度显著地厚。特别地，根据本发明的实施例，因为在通过附加层和设立有有源层的半导体芯片形成的组件的总厚度中有效的设置引线布线，因此就产生了一个薄的部件。
附加层基本上整个地或完全覆盖有源层的有源表面，当然，除凹槽外。更确切的，在扣除掉所说的附加层中形成的相应于凹槽的表面面积之后，有源层的有源表面的表面面积基本上与附加层的第一表面的表面面积相同。因此，加工有源层使其厚度减少到所需的值是可能的。此外，由于附加层保护有源层，因此有源层/附加层组件可以承受更强的机械应力。
因此，应当注意到在半导体芯片中有和连接端子一样多的凹槽的优点以及这些凹槽表明附加层的总表面面积的缩减部分。
为了形成电子部件，集成电路器件30利用粘结材料层52附着在绝缘支撑体50上，绝缘衬底的外表面54设置有外电接触焊盘56。在每个焊盘56的正面的绝缘衬底中设置有窗口，如窗口58。例如由金形成的引线布线60的一端附着在连接端子36上，另一端通过窗口58附着在外电接触焊盘56的背面上。应当理解，因为有源层32的厚度非常小，所以端子36紧靠绝缘衬底50。这就容许整个挠曲的引线布线60设置在包括附加层40的上表面44的平面pp`之下。
假如用长条状的电连接元件代替引线布线，相同的方法将有效。
为了完成电子部件，仅仅需要形成封装62，该封装具有由上述描述的措施缩减为h的总厚度。
在实施例的描述中，假如考虑了位于衬底和集成电路器件之间的粘结层的厚度，则封装的总厚度h为310μm。当绝缘衬底的典型厚度e3为170μm时，获得的电子部件就具有480μm的厚度。这就表明相对于标准的电子部件缩减了非常大的厚度。
现在参见图4A、4B和4C，将对制造集成电路器件30的主要步骤进行解释。
图4A表示第一步骤，利用任何适合的方法切割硅晶片，硅晶片上形成有凹槽46的附加层40。附加层可以由任何材料形成。它的厚度e1最好在100至200μm的范围。
下一个步骤由图4B表示，将附加层40附着在设置有连接端子36的半导体芯片50的有源表面72上。该芯片具有大约180μm的标准厚度d。
最后一个步骤由图4C表示，利用任何适合的方法加工芯片70的非有源表面74直至缩减它的厚度e2到典型值40μm，从而获得有源层32。
由于附加层40的存在，在所述实施例中集成电路器件30具有大约180μm的总厚度。虽然有源层32本身具有的厚度e2不提供此机械强度性能，但是由此可获得一种足够机械强度的元件。因此，正如已经进行的解释，所获得的元件的主要优点是接触端子36紧紧靠近元件粘附表面38。

Claims (8)

1.一种集成电路器件，其特征在于包括：
一个含有电路的半导体材料的有源芯片，所述有源芯片具有一个设置有多个电连接端子的有源表面和一个第二表面，其中所述芯片具有小于100μm的厚度，以及
一个附加层，所述附加层具有一个附着在所述有源芯片的有源表面的第一表面、一个第二表面和一个侧面，其中附加层具有多个凹槽，每个凹槽横向地开在附加层中，以便通过附加层的总厚度在高度方向伸展并在横截方向上从接触端子之上延伸到所说侧面，附加层具有比有源芯片大的厚度。
2.根据权利要求1的集成电路器件，其特征在于有源芯片的厚度范围为5至50μm。
3.根据权利要求2的集成电路器件，其特征在于附加层的厚度范围为100至200μm。
4.根据权利要求1至3的任一集成电路器件，其特征在于用与有源芯片相同的半导体材料形成附加层。
5.一种用于智能卡的电子部件，其特征在于包括：
一个含有电路的半导体材料的有源芯片，该有源芯片具有一个有源表面和一个第二表面，在有源表面上设置有多个电连接端子，其中所述芯片具有小于100μm的厚度，
一个附加层，该附加层具有一个附着在有源芯片的有源表面的第一表面、一个第二表面和一个侧面，其中所述附加层具有多个凹槽，每个凹槽横向地开在附加层中，以便通过附加层的总厚度在高度方向伸展并在横截方向上从接触端子之上延伸到所说侧面，附加层具有大于有源芯片的厚度，
一个绝缘衬底，该绝缘衬底具有一个设置有外电接触焊盘的外表面和一个内表面、一个附着在衬底内表面的有源芯片的第二表面，以及
多个电引线，每个引线具有连接到一个接触端子的第一端和连接到一个外接触焊盘的第二端，并且整个位于包含附加层的第二表面的平面和绝缘衬底之间。
6.根据权利要求5的电子部件，其特征在于绝缘衬底包含窗口，每个窗口设置在外电接触焊盘之上。
7.一种智能卡，包含根据权利要求5的电子部件。
8.一种集成电路器件的制造方法，所述集成电路器件有：
一个含有电路的半导体材料的有源芯片，该有源芯片具有一个设置有多个电连接端子的有源表面和一个第二表面，以及
一个附加层，该附加层具有一个第一表面、一个第二表面和一个侧面，该附加层包括多个凹槽，每个凹槽通过附加层的整个厚度伸展，
其中所述方法的特征在于包括以下步骤：
附着步骤，其中将附加层的第一表面附着在有源芯片的有源表面，以使附加层的一个凹槽从有源芯片的接触端子之上延伸到附加层的侧面；以及
腐蚀步骤，其中从有源芯片的第二表面腐蚀有源芯片以便提供具有小于100μm厚度的有源芯片。
CNB008036047A 1999-01-27 2000-01-18 集成电路器件、用于智能卡的电子部件及制造该器件的方法 Expired - Fee Related CN1207782C (zh)

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