CN117995689A - Method for manufacturing glass substrate IC carrier plate - Google Patents
Method for manufacturing glass substrate IC carrier plate Download PDFInfo
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- CN117995689A CN117995689A CN202410396086.8A CN202410396086A CN117995689A CN 117995689 A CN117995689 A CN 117995689A CN 202410396086 A CN202410396086 A CN 202410396086A CN 117995689 A CN117995689 A CN 117995689A
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- glass substrate
- manufacturing
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- sputtering
- layer
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- 239000000758 substrate Substances 0.000 title claims abstract description 64
- 239000011521 glass Substances 0.000 title claims abstract description 52
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 35
- 238000000034 method Methods 0.000 title claims abstract description 31
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 35
- 229910052802 copper Inorganic materials 0.000 claims abstract description 35
- 239000010949 copper Substances 0.000 claims abstract description 35
- 238000004544 sputter deposition Methods 0.000 claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 19
- 229910000679 solder Inorganic materials 0.000 claims abstract description 18
- 229910004298 SiO 2 Inorganic materials 0.000 claims abstract description 16
- 238000009713 electroplating Methods 0.000 claims abstract description 16
- 238000005553 drilling Methods 0.000 claims abstract description 13
- 238000002360 preparation method Methods 0.000 claims abstract description 13
- 238000007747 plating Methods 0.000 claims abstract description 12
- 238000000576 coating method Methods 0.000 claims abstract description 9
- 239000011248 coating agent Substances 0.000 claims abstract description 6
- 238000004381 surface treatment Methods 0.000 claims abstract description 6
- 238000002513 implantation Methods 0.000 claims abstract description 4
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 claims description 16
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 12
- 150000002500 ions Chemical class 0.000 claims description 12
- 238000005406 washing Methods 0.000 claims description 9
- 229910000029 sodium carbonate Inorganic materials 0.000 claims description 8
- 239000002253 acid Substances 0.000 claims description 6
- 229910000365 copper sulfate Inorganic materials 0.000 claims description 4
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 claims description 4
- 150000001732 carboxylic acid derivatives Chemical class 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 2
- 230000008054 signal transmission Effects 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 22
- 239000011347 resin Substances 0.000 description 15
- 229920005989 resin Polymers 0.000 description 15
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 10
- 239000000243 solution Substances 0.000 description 7
- 239000007789 gas Substances 0.000 description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 238000003486 chemical etching Methods 0.000 description 4
- 238000001755 magnetron sputter deposition Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000012792 core layer Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000001804 emulsifying effect Effects 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 230000001603 reducing effect Effects 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- 239000002351 wastewater Substances 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000003472 neutralizing effect Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
- 239000002912 waste gas Substances 0.000 description 1
Landscapes
- Manufacturing Of Printed Wiring (AREA)
Abstract
The invention relates to the technical field of IC carrier plate manufacturing, in particular to a manufacturing method of a glass substrate IC carrier plate, wherein the IC carrier plate uses a glass substrate as a base plate, and is prepared through the following process steps: stage of preparing the carrier core plate layer: drilling a substrate, sputtering copper plating, film pasting, exposing, developing, pattern electroplating, film stripping and flash etching; and (3) a layer-adding preparation stage: sputtering SiO 2 for layer adding, drilling, sputtering copper coating, film pasting, developing, pattern electroplating, film stripping and flash etching; the preparation completion stage: solder resist, solder resist exposure, solder resist development, surface treatment, ball implantation, improvement of electrical and mechanical properties, lower dielectric constant, higher signal transmission speed and less loss.
Description
Technical Field
The invention relates to the technical field of IC carrier plate manufacturing, in particular to a manufacturing method of a glass substrate IC carrier plate.
Background
Currently, for the manufacture of IC carrier boards, organic resin (BT or ABF resin) is generally used as a raw material, and lamination is performed based on the organic resin (BT resin or ABF), and specific process steps thereof are shown in fig. 1. The IC carrier manufactured based on the above manufacturing method has the following problems:
1. harmful substances such as waste gas, waste water and the like generated by the process have influence on the environment;
2. the organic resin (BT or ABF resin) IC carrier plate and the silicon chip have difference in thermal expansion coefficient and mechanical property, and cannot meet the requirements of large-size chip and multi-module chip packaging;
3. the organic resin (BT or ABF resin) IC carrier board has high dielectric constant and large loss under high-speed high-frequency signals.
In order to overcome the above problems, the present application provides a method for manufacturing a glass substrate IC carrier.
Disclosure of Invention
The invention aims to solve the technical problems that: overcomes the defects of the prior art and provides a manufacturing method of a glass substrate IC carrier plate.
The invention adopts the technical proposal for solving the technical problems that: the manufacturing method of the glass substrate IC carrier plate uses the glass substrate as a substrate, and the preparation is completed through the following process steps:
stage of preparing the carrier core plate layer: drilling a substrate, sputtering copper plating, film pasting, exposing, developing, pattern electroplating, film stripping and flash etching;
And (3) a layer-adding preparation stage: sputtering SiO 2 for layer adding, drilling, sputtering copper coating, film pasting, developing, pattern electroplating, film stripping and flash etching;
The preparation completion stage: solder resist, solder resist exposure, solder resist development, surface treatment and ball implantation.
In the substrate drilling, a glass induction etching method is adopted to carry out TGV through holes of the glass substrate. Specifically, the application firstly uses laser to change the phase of the through hole area, so as to modify the glass of the corresponding area. And then the glass phase change region is further enlarged by chemical etching to form a through hole. In the chemical etching process, the etching speed of the phase change area of the glass is faster than that of the non-phase change area, so that the through hole processing is realized.
In the sputtering copper coating, a layer of seed copper is coated on the surface of the glass substrate by using an ion sputtering coating process;
Specifically, a copper target is placed at a cathode of an ion sputtering instrument, working gas is filled, electrons collide with the working gas (usually Ar) to decompose positive ions, the positive ions bombard the surface of the target under the action of an electric field, atoms in the target obtain energy and are in cascade collision, a sputtering phenomenon finally occurs, and a copper film is deposited on the surface of a substrate.
In the film pasting, the surface of the glass substrate is cleaned through acid washing, and then a film pasting machine is used for pasting the dry film on the surface of the glass substrate under the conditions of high temperature and high pressure.
And curing the irradiated part of the dry film by adopting a ray direct irradiation mode in the exposure, and forming a required circuit pattern on the dry film.
And in the development, sodium carbonate is used for emulsifying dry film carboxylic acid of an unexposed part, so that the dry film is dissolved, and a circuit is exposed, wherein the concentration of the sodium carbonate is 10 g/L-15 g/L, and the temperature is 30-40 ℃.
In the pattern electroplating, acid washing is firstly carried out, specifically sulfuric acid is adopted for washing, oxide on the surface of the glass substrate is removed, copper sulfate is adopted for copper plating, and a circuit part (namely a dry film removed part) is plated with copper in a direct current electroplating mode to form a circuit.
And in the stripping process, a NaOH solution is adopted to strip off a dry film of the photo-direct-drawing curing part.
The sputtered copper layer is etched away by using H 2SO4 and H 2O2 solutions in the flash etching, so that the circuit is exposed.
And in the SiO 2 layer adding sputtering, a SiO 2 layer is sputtered on the surface of the substrate by utilizing a magnetron sputtering mode and is used as an inter-circuit insulating layer. The process steps of sputtering the SiO 2 build-up to flash etching (i.e., build-up preparation stage) can be repeated depending on the number of target layers.
In the solder resist, firstly, roughening treatment is carried out on the surface of the glass substrate, the binding force between the printing ink and the substrate is increased, and the printing ink is uniformly coated on the glass substrate by utilizing a vacuum film sticking machine.
The ink to be retained is cured by means of UV radiation in the solder resist exposure.
And (3) dissolving and removing the ink in the uncured part by using sodium carbonate aqueous solution in the solder resist development. After surface treatment, tin balls are planted on the surface of the substrate, so that the production of the IC carrier plate product is finally completed.
Compared with the prior art, the invention has the following beneficial effects:
The method uses the glass substrate to replace organic resin as the substrate, uses the ion sputtering method to manufacture seed copper, uses the SiO 2 magnetron sputtering to form the insulating layer to replace organic materials to perform layering, and is a main innovation point in the carrier plate manufacturing process; the silicon chip has lower dielectric constant, higher signal transmission speed and less loss, can obviously improve electrical and mechanical properties, has adjustable modulus and CTE which are closer to those of a silicon chip, has more stable size and supports large-size and multi-module chip packaging, realizes the improvement of product performance, density and flexibility, reduces cost and power consumption, and simultaneously has less exhaust and waste water emission compared with the traditional process, thereby effectively reducing the influence on the environment.
Drawings
Fig. 1 is a flow chart of the steps of the conventional organic resin IC carrier board manufacturing process.
Fig. 2 is a flow chart of the steps of the IC carrier manufacturing process of the present application.
Detailed Description
The invention is further described below with reference to the accompanying drawings:
Examples
As shown in fig. 1, in the conventional IC carrier manufacturing process, the core layer uses an organic resin (BT resin) substrate, and is routed and conducted by a via processing-seed copper-film-exposure-pattern electroplating method; the build-up method is to build up layers by using a pre-lamination method of organic resin (BT resin or ABF), and then to form circuits and conduction by blind hole processing, seed copper, film pasting, exposure and pattern electroplating. And (5) carrying out seed copper production by adopting an electroless copper plating mode. The method comprises the steps of cleaning, presoaking, activating, neutralizing, reducing, electroless copper plating and the like.
As shown in fig. 2, the glass substrate is used as a carrier core layer in the method for manufacturing a glass substrate IC carrier according to the present application. Through the processing of the through hole, the ion sputtering method is used for manufacturing seed copper, and the circuit and the conduction are formed through the modes of film pasting, exposure and pattern electroplating. Compared with organic resin, the glass substrate has higher thermal stability and dimensional stability, and can effectively improve the substrate swelling and shrinking caused by temperature in the substrate process production process.
And adding layers by using a mode of forming an insulating layer through SiO 2 magnetron sputtering. The seed copper is manufactured by a blind hole processing and ion sputtering method, and a circuit and a conduction are formed by a film pasting, exposure and pattern electroplating mode.
Specifically, the manufacturing method of the glass substrate IC carrier plate is completed by the following process steps:
stage of preparing the carrier core plate layer: drilling a substrate, sputtering copper plating, film pasting, exposing, developing, pattern electroplating, film stripping and flash etching;
In the substrate drilling, a glass induction etching method is adopted to carry out TGV through holes of the glass substrate. Specifically, the application firstly uses laser to change the phase of the through hole area, so as to modify the glass of the corresponding area. And then the glass phase change region is further enlarged by chemical etching to form a through hole. In the chemical etching process, the etching speed of the phase change area of the glass is faster than that of the non-phase change area, so that the through hole processing is realized. In this example, glass substrate thickness: 0.1 mm-1 mm, laser type: picosecond laser or UV laser; laser wavelength: 355nm; etching solution: a hydrofluoric acid solution; temperature: 30-50 ℃ and aperture: 20-50 μm.
In the sputtering copper coating, a layer of seed copper is coated on the surface of the glass substrate by using an ion sputtering coating process;
Specifically, a copper target is placed at a cathode of an ion sputtering instrument, working gas is filled, electrons collide with the working gas (usually Ar) to decompose positive ions, the positive ions bombard the surface of the target under the action of an electric field, atoms in the target obtain energy and are in cascade collision, a sputtering phenomenon finally occurs, and a copper film is deposited on the surface of a substrate. In the embodiment, the gas is argon with the purity of 99.99%, the flow is 10 sccm-20 sccm, and the target material is copper. The sputtering power is 50W-250W, and the thickness of the prepared seed copper is 3-5 mu m.
In the film pasting, the surface of the glass substrate is cleaned by acid washing, and then a film pasting machine is used for pasting the dry film on the surface of the glass substrate under the conditions of high temperature (80 ℃ -120 ℃) and high pressure (0.35+/-0.05 MPa). In the embodiment, the concentration of the acid-washing sulfuric acid is 5% -10%, the pressure of a film pasting wheel is 0.35-MPa-0.5 MPa, and the speed is 2.0m/min.
And curing the irradiated part of the dry film by adopting a ray direct irradiation mode in the exposure, and forming a required circuit pattern on the dry film.
And in the development, sodium carbonate is used for emulsifying dry film carboxylic acid of an unexposed part, so that the dry film is dissolved, and a circuit is exposed, wherein the concentration of the sodium carbonate is 10 g/L-15 g/L, and the temperature is 30-40 ℃.
The pattern electroplating is firstly subjected to acid washing, specifically sulfuric acid is adopted for washing, oxide on the surface of the glass substrate is removed, the concentration of the sulfuric acid is 10% -20%, copper sulfate is adopted for copper plating, and a circuit part (namely a dry film removed part) is plated with copper in a direct current electroplating mode to form a circuit. Wherein the concentration of copper sulfate is 200g/L, the concentration of sulfuric acid is 40 g/L-60 g/L, and the temperature is 25-40 ℃.
And in the stripping process, a NaOH solution is adopted to strip off a dry film of the photo-direct-drawing curing part. Wherein the concentration of NaOH is 30 g/L-50 g/L, and the temperature is 50+/-10 ℃.
The sputtered copper layer is etched away by using H 2SO4 and H 2O2 solutions in the flash etching, so that the circuit is exposed. The concentration of H 2SO4 is 20 g/L-50 g/L, the concentration of H 2O2 is 10 g/L-20 g/L, and the temperature is 30 ℃ to 50 ℃.
And (3) a layer-adding preparation stage: sputtering SiO 2 for layer adding, drilling, sputtering copper coating, film pasting, developing, pattern electroplating, film stripping and flash etching;
And in the SiO 2 layer adding sputtering, a SiO 2 layer is sputtered on the surface of the substrate by utilizing a magnetron sputtering mode and is used as an inter-circuit insulating layer. The sputtering method is similar to the sputtering copper coating process. SiO 2 is used as a target, the gas is argon with the purity of 99.99 percent, the flow is 10 sccm-20 sccm, the sputtering power is 200W-250W, and the thickness of the SiO 2 layer is 20-30 mu m. The process steps of drilling to flash are then repeated until the layer of circuitry is completed. The process steps of sputtering the SiO 2 build-up to flash etching (i.e., build-up preparation stage) can be repeated depending on the number of target layers. The process steps of drilling to flash etching in the build-up preparation stage are performed with reference to the carrier core layer preparation stage.
The preparation completion stage: solder resist, solder resist exposure, solder resist development, surface treatment and ball implantation.
In the solder resist, firstly, roughening treatment is carried out on the surface of the glass substrate, the binding force between the printing ink and the substrate is increased, and the printing ink is uniformly coated on the glass substrate by utilizing a vacuum film sticking machine.
The ink to be retained is cured by means of UV radiation in the solder resist exposure.
And (3) dissolving and removing the ink in the uncured part by using sodium carbonate aqueous solution in the solder resist development. After surface treatment, tin balls are planted on the surface of the substrate, so that the production of the IC carrier plate product is finally completed.
The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited thereto. Within the scope of the technical idea of the invention, a number of simple variants of the technical solution of the invention are possible, including the production and manufacture of the individual technical features in any other suitable condition, which simple variants and condition selections should likewise be regarded as being within the scope of the invention.
Claims (10)
1. The manufacturing method of the glass substrate IC carrier plate is characterized in that the IC carrier plate uses a glass substrate as a base plate, and the manufacturing method is completed through the following process steps:
stage of preparing the carrier core plate layer: drilling a substrate, sputtering copper plating, film pasting, exposing, developing, pattern electroplating, film stripping and flash etching;
And (3) a layer-adding preparation stage: sputtering SiO 2 for layer adding, drilling, sputtering copper coating, film pasting, developing, pattern electroplating, film stripping and flash etching;
The preparation completion stage: solder resist, solder resist exposure, solder resist development, surface treatment and ball implantation.
2. The method of manufacturing a glass substrate IC carrier according to claim 1, wherein the glass substrate TGV via is performed by a glass-induced etching method in the substrate drilling.
3. The method of manufacturing a glass substrate IC carrier according to claim 1, wherein a seed copper layer is plated on the surface of the glass substrate by an ion sputtering plating process in the sputtered copper plating.
4. The method for manufacturing a glass substrate IC carrier according to claim 1, wherein the film is formed by cleaning the surface of the glass substrate by acid washing and then attaching the dry film to the surface of the glass substrate by a film laminator.
5. The method of manufacturing a glass substrate IC carrier according to claim 1, wherein the exposing is performed by curing the irradiated portion of the dry film by means of a photo-direct irradiation, and forming a desired pattern of lines on the dry film.
6. The method of manufacturing a glass substrate IC carrier according to claim 1, wherein the dry film carboxylic acid of the unexposed portion is emulsified with sodium carbonate in the development to dissolve the dry film and expose the wiring, wherein the concentration of sodium carbonate is 10 g/L to 15g/L and the temperature is 30 ℃ to 40 ℃.
7. The method of manufacturing a glass substrate IC carrier according to claim 1, wherein the pattern plating is performed by acid washing first and copper sulfate plating later.
8. The method according to claim 1, wherein the peeling step uses NaOH solution to peel off the dry film of the photo-direct cured portion.
9. The method of manufacturing a glass substrate IC carrier according to claim 1, wherein the sputtered copper layer is etched away in the flash using H 2SO4 and H 2O2 solutions to expose the wiring.
10. The method of manufacturing a glass substrate IC carrier according to claim 1, wherein the sputtering of SiO 2 is performed by sputtering a SiO 2 layer on the surface of the substrate as an inter-circuit insulating layer.
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CN202410396086.8A CN117995689A (en) | 2024-04-03 | 2024-04-03 | Method for manufacturing glass substrate IC carrier plate |
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CN202410396086.8A CN117995689A (en) | 2024-04-03 | 2024-04-03 | Method for manufacturing glass substrate IC carrier plate |
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Citations (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11330695A (en) * | 1998-05-12 | 1999-11-30 | Sumitomo Metal Ind Ltd | Highly reliable multilayer circuit board and its manufacture |
JP2001217507A (en) * | 2000-02-02 | 2001-08-10 | Sumitomo Metal Mining Co Ltd | Printed wiring board and its manufacturing method |
US20020100608A1 (en) * | 1999-05-27 | 2002-08-01 | Hoya Corporation | Multilayer printed wiring board and a process of producing same |
JP2006100653A (en) * | 2004-09-30 | 2006-04-13 | Dainippon Printing Co Ltd | Wiring board and manufacturing method thereof |
CN101478862A (en) * | 2008-11-29 | 2009-07-08 | 鸿源科技(杭州)有限公司 | Process for blind hole, buried hole, and filled hole of multi-layered high density interconnected printed circuit board |
JP2011035045A (en) * | 2009-07-30 | 2011-02-17 | Hitachi Chem Co Ltd | Manufacturing method of adhesive sheet, and manufacturing method of multilayer wiring board for mounting semiconductor element |
US20160111380A1 (en) * | 2014-10-21 | 2016-04-21 | Georgia Tech Research Corporation | New structure of microelectronic packages with edge protection by coating |
CN112106187A (en) * | 2018-05-25 | 2020-12-18 | 凸版印刷株式会社 | Glass circuit board and method for manufacturing same |
CN112490134A (en) * | 2021-01-07 | 2021-03-12 | 深圳和美精艺半导体科技股份有限公司 | Packaging substrate processing method of double-sided OSP process |
US20210122673A1 (en) * | 2019-10-25 | 2021-04-29 | Bsp Co., Ltd. | Through-glass via hole formation method |
JP2021100026A (en) * | 2019-12-20 | 2021-07-01 | 凸版印刷株式会社 | Manufacturing method of glass core multilayer wiring substrate, glass core multilayer wiring substrate, and high frequency module substrate |
CN115831907A (en) * | 2021-09-17 | 2023-03-21 | 英特尔公司 | Dielectric layer separating metal pad of glass via from glass surface |
CN115842000A (en) * | 2021-09-21 | 2023-03-24 | 英特尔公司 | Through glass via with metal wall |
KR102559949B1 (en) * | 2022-12-15 | 2023-07-26 | 주식회사 에프엠에스 | Method of forming a hole through a glass substrate and method of forming a metal plug |
CN117642851A (en) * | 2021-09-21 | 2024-03-01 | 英特尔公司 | Glass core substrate comprising stacks with different numbers of layers |
-
2024
- 2024-04-03 CN CN202410396086.8A patent/CN117995689A/en active Pending
Patent Citations (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11330695A (en) * | 1998-05-12 | 1999-11-30 | Sumitomo Metal Ind Ltd | Highly reliable multilayer circuit board and its manufacture |
US20020100608A1 (en) * | 1999-05-27 | 2002-08-01 | Hoya Corporation | Multilayer printed wiring board and a process of producing same |
JP2001217507A (en) * | 2000-02-02 | 2001-08-10 | Sumitomo Metal Mining Co Ltd | Printed wiring board and its manufacturing method |
JP2006100653A (en) * | 2004-09-30 | 2006-04-13 | Dainippon Printing Co Ltd | Wiring board and manufacturing method thereof |
CN101478862A (en) * | 2008-11-29 | 2009-07-08 | 鸿源科技(杭州)有限公司 | Process for blind hole, buried hole, and filled hole of multi-layered high density interconnected printed circuit board |
JP2011035045A (en) * | 2009-07-30 | 2011-02-17 | Hitachi Chem Co Ltd | Manufacturing method of adhesive sheet, and manufacturing method of multilayer wiring board for mounting semiconductor element |
US20160111380A1 (en) * | 2014-10-21 | 2016-04-21 | Georgia Tech Research Corporation | New structure of microelectronic packages with edge protection by coating |
CN112106187A (en) * | 2018-05-25 | 2020-12-18 | 凸版印刷株式会社 | Glass circuit board and method for manufacturing same |
US20210122673A1 (en) * | 2019-10-25 | 2021-04-29 | Bsp Co., Ltd. | Through-glass via hole formation method |
JP2021100026A (en) * | 2019-12-20 | 2021-07-01 | 凸版印刷株式会社 | Manufacturing method of glass core multilayer wiring substrate, glass core multilayer wiring substrate, and high frequency module substrate |
CN112490134A (en) * | 2021-01-07 | 2021-03-12 | 深圳和美精艺半导体科技股份有限公司 | Packaging substrate processing method of double-sided OSP process |
CN115831907A (en) * | 2021-09-17 | 2023-03-21 | 英特尔公司 | Dielectric layer separating metal pad of glass via from glass surface |
CN115842000A (en) * | 2021-09-21 | 2023-03-24 | 英特尔公司 | Through glass via with metal wall |
CN117642851A (en) * | 2021-09-21 | 2024-03-01 | 英特尔公司 | Glass core substrate comprising stacks with different numbers of layers |
KR102559949B1 (en) * | 2022-12-15 | 2023-07-26 | 주식회사 에프엠에스 | Method of forming a hole through a glass substrate and method of forming a metal plug |
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