CN110572962A - lamination manufacturing process of HDI product - Google Patents

lamination manufacturing process of HDI product Download PDF

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Publication number
CN110572962A
CN110572962A CN201910843487.2A CN201910843487A CN110572962A CN 110572962 A CN110572962 A CN 110572962A CN 201910843487 A CN201910843487 A CN 201910843487A CN 110572962 A CN110572962 A CN 110572962A
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CN
China
Prior art keywords
pressing
hole
circuit
copper
processing step
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910843487.2A
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Chinese (zh)
Inventor
刘万杰
孙守军
陈智栋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIANGSU BOMIN ELECTRONICS Co Ltd
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JIANGSU BOMIN ELECTRONICS Co Ltd
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Publication date
Application filed by JIANGSU BOMIN ELECTRONICS Co Ltd filed Critical JIANGSU BOMIN ELECTRONICS Co Ltd
Priority to CN201910843487.2A priority Critical patent/CN110572962A/en
Publication of CN110572962A publication Critical patent/CN110572962A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/052Magnetographic patterning

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention provides a laminated manufacturing process of an HDI product, which comprises a preorder processing step, a pressing step and a subsequent processing step, wherein the preorder processing step comprises the steps of preparing a core plate with a through hole; pressing, namely pressing a single chip with a through hole through a hot press under a vacuum condition, and heating to melt and solidify a prepreg so as to carry out vacuum hole filling on the through hole of the chip; the subsequent processing step comprises the step of manufacturing the pressed chip into a finished product. The invention solves the difficult observation phenomena of insufficient filling degree, overlarge filling degree, partial filling and the like of the filling hole; the productivity is improved, the process flow is simplified, and the processing time is shortened; foreign matter sources are reduced, and the product yield is improved; the problems are solved, equipment, materials and labor cost are greatly saved, and the delivery time and quality of the printed circuit board are greatly shortened.

Description

Lamination manufacturing process of HDI product
Technical Field
the invention belongs to a vacuum hole-filling process, and particularly relates to a lamination manufacturing process of an HDI product.
Background
The processing technology of the vacuum filling hole of the existing HDI product comprises the following steps: hole plugging process: cutting → inner layer → circuit inspection → pressing → drilling → electroplating → secondary outer layer circuit → brown oxidation → filling hole (special material) → leveling → baking → pressing → post process. The existing processing technology has the following defects: the phenomena of insufficient filling degree, overlarge filling degree, partial filling and the like of the filling hole are difficult to observe; the productivity is low, the flow is complex, and the production time is long; the process has long manufacturing period, and foreign matters are easy to generate to cause poor product functionality.
disclosure of Invention
the invention aims to provide a laminating manufacturing process of an HDI product, which can greatly save equipment, materials and labor cost.
According to one aspect of the invention, a lamination manufacturing process of an HDI product is provided, which comprises a pre-processing step, a pressing step and a post-processing step,
the preorder processing step comprises the steps of preparing a core plate with a through hole;
pressing, namely pressing a single chip with a through hole through a hot press under a vacuum condition, and heating to melt and solidify a prepreg so as to carry out vacuum hole filling on the through hole of the chip;
the subsequent processing step comprises the step of manufacturing the pressed chip into a finished product.
In some embodiments, the cabin of the hot press is vacuumized, a single chip with a through hole to be pressed is placed under a vacuum condition, the chip is pressed by the hot press, and the through hole of the chip is subjected to vacuum hole filling by melting and solidifying a prepreg through temperature transfer of a heating plate.
in some embodiments, the prepreg is made of polypropylene.
In some embodiments, the preceding processing steps comprise:
Cutting: selecting a plate with a base plate thickness of 0.5mm and a base copper thickness of 0.5OZ covered on the base plate, wherein the cutting size is (615 +/-2) mm x (540 +/-2) mm;
inner layer: manufacturing an inner layer circuit pattern on the copper surface in an image transfer mode to obtain an inner layer core board;
Inner layer AOI, comparing the inner layer circuit pattern with the transmitted circuit data, without gap, short circuit and open circuit;
First pressing: combining the inner core board, the prepreg and the copper foil by a press, and then pressing and fixing to combine to obtain a circuit board;
drilling: drilling the circuit board in a mechanical drilling mode, wherein the position of a hole in the circuit board is consistent with the position of the inner layer circuit pattern PAD;
buried hole electroplating: plating copper layers with certain thickness on the copper surface and the hole wall of the circuit board, wherein the sum of the thickness of the copper plating plated by the buried hole electroplating and the thickness of the bottom copper is less than or equal to 35 mu m;
Secondary outer layer circuit: manufacturing a secondary outer layer circuit pattern on the circuit board through film pressing → exposure → etching;
The sub-outer layer AOI is used for comparing the sub-outer layer circuit with the transmitted circuit data without gaps, short circuits and open circuits;
browning: the copper surface is coarsened by using browning liquid medicine, so that the binding force is enhanced.
In some embodiments, the image transfer method is: and aligning the transmitted circuit data with the plate attached with the dry film, exposing, removing the unexposed dry film after image transfer, etching and removing the copper surface uncovered with the dry film by using a chemical method, and removing, cleaning and drying the dry film on the copper surface to obtain the image transfer method.
in some embodiments of the present invention, the substrate is,
film pressing: pressing a layer of photosensitive film on the surface of the circuit board;
The exposure is as follows: the photosensitive film is irradiated by UV light, and the monomer is changed into polymer, and the data pattern is transferred to the circuit board after film pressing, under the condition of management according to the energy grid number;
the etching is as follows: and etching and removing the copper surface which is not covered with the dry film by using a chemical mode, and then removing, cleaning and drying the dry film on the copper surface.
In some embodiments, the browning medicine liquid comprises a browning agent, hydrogen peroxide and sulfuric acid, wherein the concentration ratio of the browning agent is 50 +/-7 ml/L, the concentration ratio of the hydrogen peroxide is 37 +/-7 ml/L, and the concentration ratio of the sulfuric acid is 125 +/-7 ml/L;
the roughening treatment is carried out by microetching hydrogen peroxide, so that a gravel microstructure is formed on the surface of the copper layer, a thin organic metal film is deposited at the same time, and a brown plush structure is formed, so that the bonding strength between the copper layer and PP is greatly improved.
in some embodiments, the subsequent processing step comprises:
semi-finished product circuit-semi-finished product AOI inspection-outer layer pressing-laser drilling-mechanical drilling-electroplating-outer layer circuit-AOI inspection-solder mask-gold melting-appearance-test-appearance inspection.
the beneficial effects are as follows: the invention solves the difficult observation phenomena of insufficient filling degree, overlarge filling degree, partial filling and the like of the filling hole; the productivity is improved, the process flow is simplified, and the processing time is shortened; foreign matter sources are reduced, and the product yield is improved; the problems are solved, equipment, materials and labor cost are greatly saved, and the delivery time and quality of the printed circuit board are greatly shortened.
Detailed Description
the present invention will be further described with reference to the following examples.
A laminated manufacturing process of an HDI product comprises a pre-processing step, a pressing step and a post-processing step.
the preamble processing step includes preparing a core plate having a through hole. Specifically, the preorder processing steps comprise cutting, inner layer AOI, first pressing, drilling, buried hole electroplating, secondary outer layer circuit, secondary outer layer AOI and browning. The cutting is a plate with the thickness of 0.5mm and the thickness of 0.5OZ of the base copper covered on the substrate, and the cutting size is (615 +/-2) mm x (540 +/-2) mm. The inner layer is an inner core plate which is made by making inner layer circuit patterns on the copper surface in an image transfer mode. The image transfer mode is that the circuit data which is transmitted and the board which is attached with the dry film are aligned and then exposed, the unexposed dry film is removed after the image transfer is carried out, and the dry film of the copper surface is removed, cleaned and dried after the copper surface which is not covered with the dry film is etched and removed by a chemical mode, so that the image transfer mode is obtained. The inner layer AOI compares the inner layer circuit pattern with the transmitted circuit data, and has no gap, short circuit and open circuit. The first pressing is to combine the inner core plate, the prepreg and the copper foil by a press and then apply pressure to fix the combination to obtain the circuit board. And the drilling is to drill the circuit board in a mechanical drilling mode, and the position of the hole in the circuit board is consistent with the position of the inner layer circuit pattern PAD. The buried hole electroplating is to plate copper layers with certain thickness on the copper surface and the hole wall of the circuit board, and the sum of the thickness of copper plating and the thickness of bottom copper plated by the buried hole electroplating is less than or equal to 35 mu m. And the secondary outer layer circuit is formed by manufacturing a secondary outer layer circuit pattern on the circuit board through film pressing → exposure → etching. The film pressing is to press a layer of photosensitive film on the surface of the circuit board. The exposure is that the photosensitive film is irradiated by UV light and the monomer is changed into polymer, and the data pattern is transferred to the circuit board after film pressing, and the condition is that the data pattern is managed according to the energy grid number. And the etching is to remove the copper surface which is not covered with the dry film by a chemical method, and then remove, clean and dry the film on the copper surface. The sub-outer layer AOI is used for comparing the sub-outer layer circuit with the transmitted circuit data without gaps, short circuits and open circuits. The browning is to coarsen the copper surface by using browning liquid medicine to enhance the binding force. The browning liquid medicine comprises a browning agent, hydrogen peroxide and sulfuric acid, wherein the concentration ratio of the browning agent is 50 +/-7 ml/L, the concentration ratio of the hydrogen peroxide is 37 +/-7 ml/L, and the concentration ratio of the sulfuric acid is 125 +/-7 ml/L. The roughening treatment is carried out by microetching hydrogen peroxide, so that a gravel microstructure is formed on the surface of the copper layer, a thin organic metal film is deposited at the same time, and a brown plush structure is formed, so that the bonding strength between the copper layer and PP is greatly improved.
and the pressing is to press the single chip with the through holes through a hot press under the vacuum condition, and to melt and solidify the prepreg through heating so as to carry out vacuum hole filling on the through holes of the chip. Specifically, the cabin body of the hot press is vacuumized, a single chip with a through hole to be pressed is placed under a vacuum condition, the chip is pressed through the hot press, and meanwhile, the through hole of the chip is subjected to vacuum hole filling through melting and solidification of a prepreg through temperature transmission of a heating plate. The prepreg is made of polypropylene.
the pressing program is produced by a predetermined vacuum hole-filling program. The predetermined vacuum hole-filling program is shown in the following table, wherein the predetermined vacuum hole-filling program comprises eight steps. The slope represents the time required in the table to adjust from one hotplate temperature to the adjacent hotplate temperature, e.g. 8min from 100 ℃ to 140 ℃. The temperature rise time (min) of the hot plate is that when the temperature of the hot plate reaches a set temperature, the temperature needs to be kept for the time for the temperature rise of the hot plate so as to synchronize the temperature of the plate and the temperature of the hot plate.
The subsequent processing step comprises the step of manufacturing the pressed chip into a finished product. The subsequent processing steps comprise: semi-finished product circuit-semi-finished product AOI inspection-outer layer pressing-laser drilling-mechanical drilling-electroplating-outer layer circuit-AOI inspection-solder mask-gold melting-appearance-test-appearance inspection.
The invention solves the difficult observation phenomena of insufficient filling degree, overlarge filling degree, partial filling and the like of the filling hole; the productivity is improved, the process flow is simplified, and the processing time is shortened; foreign matter sources are reduced, and the product yield is improved; the problems are solved, equipment, materials and labor cost are greatly saved, and the delivery time and quality of the printed circuit board are greatly shortened.
What has been described above are merely some embodiments of the present invention. It will be apparent to those skilled in the art that various changes and modifications can be made without departing from the inventive concept thereof, and these changes and modifications can be made without departing from the spirit and scope of the invention.

Claims (8)

1. A laminated manufacturing process of an HDI product is characterized by comprising a pre-processing step, a pressing step and a post-processing step,
the preorder processing step comprises the steps of preparing a core plate with a through hole;
Pressing, namely pressing a single chip with a through hole through a hot press under a vacuum condition, and heating to melt and solidify a prepreg so as to carry out vacuum hole filling on the through hole of the chip;
The subsequent processing step comprises the step of manufacturing the pressed chip into a finished product.
2. The HDI product lamination manufacturing process according to claim 1, wherein a cabin of the hot press is vacuumized, a single chip with through holes to be laminated is placed under vacuum, the chip is laminated through the hot press, and the through holes of the chip are vacuum-filled by melting and solidifying a prepreg through temperature transmission of the heating plate.
3. The laminated manufacturing process of an HDI product according to claim 1, wherein the prepreg is made of polypropylene.
4. A process for laminated production of HDI products according to claim 1, characterised in that the preceding processing step comprises:
Cutting: selecting a plate with a base plate thickness of 0.5mm and a base copper thickness of 0.5OZ covered on the base plate, wherein the cutting size is (615 +/-2) mm x (540 +/-2) mm;
Inner layer: manufacturing an inner layer circuit pattern on the copper surface in an image transfer mode to obtain an inner layer core board;
inner layer AOI, comparing the inner layer circuit pattern with the transmitted circuit data, without gap, short circuit and open circuit;
first pressing: combining the inner core board, the prepreg and the copper foil by a press, and then pressing and fixing to combine to obtain a circuit board;
drilling: drilling the circuit board in a mechanical drilling mode, wherein the position of a hole in the circuit board is consistent with the position of the inner layer circuit pattern PAD;
Buried hole electroplating: plating copper layers with certain thickness on the copper surface and the hole wall of the circuit board, wherein the sum of the thickness of the copper plating plated by the buried hole electroplating and the thickness of the bottom copper is less than or equal to 35 mu m;
secondary outer layer circuit: manufacturing a secondary outer layer circuit pattern on the circuit board through film pressing → exposure → etching;
The sub-outer layer AOI is used for comparing the sub-outer layer circuit with the transmitted circuit data without gaps, short circuits and open circuits;
Browning: the copper surface is coarsened by using browning liquid medicine, so that the binding force is enhanced.
5. the laminated manufacturing process of an HDI product according to claim 1, wherein the image transfer mode is as follows: and aligning the transmitted circuit data with the plate attached with the dry film, exposing, removing the unexposed dry film after image transfer, etching and removing the copper surface uncovered with the dry film by using a chemical method, and removing, cleaning and drying the dry film on the copper surface to obtain the image transfer method.
6. The laminated manufacturing process of an HDI product according to claim 1, wherein,
film pressing: pressing a layer of photosensitive film on the surface of the circuit board;
the exposure is as follows: the photosensitive film is irradiated by UV light, and the monomer is changed into polymer, and the data pattern is transferred to the circuit board after film pressing, under the condition of management according to the energy grid number;
The etching is as follows: and etching and removing the copper surface which is not covered with the dry film by using a chemical mode, and then removing, cleaning and drying the dry film on the copper surface.
7. The laminated manufacturing process of an HDI product according to claim 1, wherein the browning agent solution comprises a browning agent, hydrogen peroxide and sulfuric acid, the concentration ratio of the browning agent is 50 plus or minus 7ml/L, the concentration ratio of the hydrogen peroxide is 37 plus or minus 7ml/L, and the concentration ratio of the sulfuric acid is 125 plus or minus 7 ml/L;
The roughening treatment is carried out by microetching hydrogen peroxide, so that a gravel microstructure is formed on the surface of the copper layer, a thin organic metal film is deposited at the same time, and a brown plush structure is formed, so that the bonding strength between the copper layer and PP is greatly improved.
8. a process for laminated production of HDI products according to claim 1, characterised in that said subsequent processing step comprises:
Semi-finished product circuit-semi-finished product AOI inspection-outer layer pressing-laser drilling-mechanical drilling-electroplating-outer layer circuit-AOI inspection-solder mask-gold melting-appearance-test-appearance inspection.
CN201910843487.2A 2019-09-06 2019-09-06 lamination manufacturing process of HDI product Pending CN110572962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910843487.2A CN110572962A (en) 2019-09-06 2019-09-06 lamination manufacturing process of HDI product

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910843487.2A CN110572962A (en) 2019-09-06 2019-09-06 lamination manufacturing process of HDI product

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CN110572962A true CN110572962A (en) 2019-12-13

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113382544A (en) * 2021-05-27 2021-09-10 中国科学院微电子研究所 Method for plugging inner-layer substrate through hole by using ABF build-up membrane
CN118250937A (en) * 2024-03-27 2024-06-25 江苏博敏电子有限公司 Manufacturing process of any-layer interconnection printed circuit board

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Publication number Priority date Publication date Assignee Title
DE19923117A1 (en) * 1999-05-19 2000-11-23 Schaefer Hans Juergen Filling bores in HDI multilayers, involves heating epoxy resin lacquer, moving to column setting device, sucking into bores, removing excess, and setting lacquer in bores with ultraviolet light
CN105430939A (en) * 2015-10-30 2016-03-23 江苏博敏电子有限公司 Printed circuit board buried hole resin plugging method
CN105517374A (en) * 2015-12-17 2016-04-20 深圳崇达多层线路板有限公司 Method for making HDI board with thin core board
CN107148151A (en) * 2017-07-14 2017-09-08 四会富士电子科技有限公司 A kind of method of figure filling holes with resin after
CN108260303A (en) * 2017-12-05 2018-07-06 深圳崇达多层线路板有限公司 The production method that laser drill and back drill hole are filled out in a kind of while plating

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Publication number Priority date Publication date Assignee Title
DE19923117A1 (en) * 1999-05-19 2000-11-23 Schaefer Hans Juergen Filling bores in HDI multilayers, involves heating epoxy resin lacquer, moving to column setting device, sucking into bores, removing excess, and setting lacquer in bores with ultraviolet light
CN105430939A (en) * 2015-10-30 2016-03-23 江苏博敏电子有限公司 Printed circuit board buried hole resin plugging method
CN105517374A (en) * 2015-12-17 2016-04-20 深圳崇达多层线路板有限公司 Method for making HDI board with thin core board
CN107148151A (en) * 2017-07-14 2017-09-08 四会富士电子科技有限公司 A kind of method of figure filling holes with resin after
CN108260303A (en) * 2017-12-05 2018-07-06 深圳崇达多层线路板有限公司 The production method that laser drill and back drill hole are filled out in a kind of while plating

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Title
何慧蓉: "HDI高铜厚精细线路制备关键技术研究", 《中国优秀硕士学位论文全文数据库 (信息科技辑)》 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113382544A (en) * 2021-05-27 2021-09-10 中国科学院微电子研究所 Method for plugging inner-layer substrate through hole by using ABF build-up membrane
CN118250937A (en) * 2024-03-27 2024-06-25 江苏博敏电子有限公司 Manufacturing process of any-layer interconnection printed circuit board
CN118250937B (en) * 2024-03-27 2024-10-08 江苏博敏电子有限公司 Manufacturing process of any-layer interconnection printed circuit board

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Application publication date: 20191213