CN117715408A - 一种半导体结构的制造方法及半导体结构 - Google Patents

一种半导体结构的制造方法及半导体结构 Download PDF

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Publication number
CN117715408A
CN117715408A CN202211091178.2A CN202211091178A CN117715408A CN 117715408 A CN117715408 A CN 117715408A CN 202211091178 A CN202211091178 A CN 202211091178A CN 117715408 A CN117715408 A CN 117715408A
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CN
China
Prior art keywords
layer
lower electrode
electrode layer
forming
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211091178.2A
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English (en)
Chinese (zh)
Inventor
彭敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Changxin Memory Technologies Inc
Original Assignee
Changxin Memory Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Changxin Memory Technologies Inc filed Critical Changxin Memory Technologies Inc
Priority to CN202211091178.2A priority Critical patent/CN117715408A/zh
Priority to PCT/CN2022/123898 priority patent/WO2024050907A1/fr
Publication of CN117715408A publication Critical patent/CN117715408A/zh
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN202211091178.2A 2022-09-07 2022-09-07 一种半导体结构的制造方法及半导体结构 Pending CN117715408A (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202211091178.2A CN117715408A (zh) 2022-09-07 2022-09-07 一种半导体结构的制造方法及半导体结构
PCT/CN2022/123898 WO2024050907A1 (fr) 2022-09-07 2022-10-08 Procédé de fabrication de structure semi-conductrice et structure semi-conductrice

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211091178.2A CN117715408A (zh) 2022-09-07 2022-09-07 一种半导体结构的制造方法及半导体结构

Publications (1)

Publication Number Publication Date
CN117715408A true CN117715408A (zh) 2024-03-15

Family

ID=90152118

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211091178.2A Pending CN117715408A (zh) 2022-09-07 2022-09-07 一种半导体结构的制造方法及半导体结构

Country Status (2)

Country Link
CN (1) CN117715408A (fr)
WO (1) WO2024050907A1 (fr)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100438781B1 (ko) * 2001-12-05 2004-07-05 삼성전자주식회사 금속-절연체-금속 캐패시터 및 그 제조방법
KR20120042574A (ko) * 2010-10-25 2012-05-03 에스케이하이닉스 주식회사 반도체 소자 및 그 제조 방법
CN114520195A (zh) * 2020-11-19 2022-05-20 长鑫存储技术有限公司 半导体结构的制造方法及半导体结构
CN114824083A (zh) * 2021-01-29 2022-07-29 中国科学院微电子研究所 一种半导体器件及其制备方法

Also Published As

Publication number Publication date
WO2024050907A1 (fr) 2024-03-14

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