CN117613167A - Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode - Google Patents
Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 claims abstract description 15
- 230000000903 blocking effect Effects 0.000 claims abstract description 13
- 238000000034 method Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 230000007547 defect Effects 0.000 abstract description 4
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 235000012431 wafers Nutrition 0.000 description 23
- 238000006243 chemical reaction Methods 0.000 description 22
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 19
- 230000000052 comparative effect Effects 0.000 description 10
- 229910002704 AlGaN Inorganic materials 0.000 description 8
- 230000004888 barrier function Effects 0.000 description 8
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- 238000013508 migration Methods 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 5
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- 239000012159 carrier gas Substances 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
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- 238000012360 testing method Methods 0.000 description 3
- 239000013256 coordination polymer Substances 0.000 description 2
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- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 238000004549 pulsed laser deposition Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
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Abstract
The invention discloses a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode, and relates to the technical field of semiconductors. The light-emitting diode epitaxial wafer comprises a Si substrate, and an antistatic layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially laminated on the Si substrate, wherein the antistatic layer comprises a first sub-layer, a second sub-layer and a third sub-layer, the first sub-layer comprises a BN layer and an AlN layer which are periodically and alternately laminated, and the second sub-layer is Ga 2 O 3 A layer comprising periodically alternately laminated (AlGa) 2 O 3 Layer and GaN layer, said (AlGa) 2 O 3 The Al component of the layer is in a ratio of0.3 to 0.7. The antistatic layer can reduce the generation of defects and leakage channels, thereby improving the antistatic capability and luminous efficiency of the light-emitting diode.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode.
Background
GaN-based LEDs have the properties of large forbidden band width, excellent breakdown voltage and the like, and have been widely used in high-power devices. In the using process of the GaN-based LED, electrostatic damage is one of main reasons for influencing the stability of the GaN-based LED, the LED chip is sensitive to static voltage in the manufacturing and using processes, and when the static voltage between the electrodes of the LED chip is too high, the LED chip can be instantaneously discharged between the positive electrode and the negative electrode to cause permanent damage to the LED chip. Therefore, the antistatic capability is an important index for evaluating the performance of the LED, and as the application range of the LED expands, the chip itself is required to have more severe electrostatic resistance capability.
In the epitaxial growth process of the LED, larger lattice mismatch and thermal mismatch exist between the epitaxial layer and the Si substrate, so that the crystal quality of the epitaxial layer which is grown subsequently is further reduced, a large number of dislocation is generated, a leakage channel is generated, and the epitaxial quality and the electrostatic tolerance of the GaN-based LED are seriously reduced.
Disclosure of Invention
The invention aims to solve the technical problem of providing the light-emitting diode epitaxial wafer, which can reduce the leakage channel and improve the antistatic capability of the epitaxial wafer.
The invention also aims to solve the technical problem of providing a preparation method of the light-emitting diode epitaxial wafer, which is simple in process and good in antistatic capability.
In order to achieve the technical effects, the invention provides a light-emitting diode epitaxial wafer, which comprises a Si substrate, and an antistatic layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially laminated on the Si substrate, wherein the antistatic layer comprises a first sub-layer, a second sub-layer and a third sub-layer, and the first sub-layer comprises a BN layer and an AlN layer which are periodically and alternately laminated;
the second sublayer is Ga 2 O 3 A layer;
the third sub-layer comprises periodically and alternately laminated (AlGa) 2 O 3 Layer and GaN layer, said (AlGa) 2 O 3 The Al component of the layer accounts for 0.3-0.7.
As an improvement of the technical scheme, the growth period of the first sub-layer is 3-6, and the thickness of the BN layer is 3-8 nm; the thickness of the AlN layer is 3 nm-8 nm.
As an improvement of the above technical scheme, the Ga 2 O 3 The thickness of the layer is 5 nm-10 nm.
As an improvement of the technical scheme, the growth period of the third sub-layer is 3-6, and the (AlGa) 2 O 3 The thickness of the layer is 5 nm-10 nm; the thickness of the GaN layer is 5 nm-10 nm.
As an improvement of the above technical solution, in the third sublayer, the (AlGa) of each period 2 O 3 The Al composition ratio of the layer gradually increases in the epitaxial growth direction.
Correspondingly, the invention also discloses a preparation method of the light-emitting diode epitaxial wafer, which is used for preparing the light-emitting diode epitaxial wafer and comprises the following steps of:
providing a Si substrate, sequentially growing an antistatic layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the Si substrate, wherein the antistatic layer comprises a first sub-layer, a second sub-layer and a third sub-layer, the first sub-layer comprises a BN layer and an AlN layer which are periodically and alternately laminated, and the second sub-layer is Ga 2 O 3 A layer comprising periodically alternately laminated (AlGa) 2 O 3 A layer and a GaN layer.
As an improvement of the technical scheme, the growth temperature of the first sub-layer is 800-1280 ℃, and the growth pressure is 200 Torr-300 Torr.
As an improvement of the technical scheme, the growth temperature of the second sub-layer is 600-900 ℃, and the growth pressure is 200-300 Torr.
As an improvement of the technical scheme, the growth temperature of the third sub-layer is 600-1280 ℃, and the growth pressure is 200 Torr-300 Torr.
Correspondingly, the invention also discloses a light-emitting diode, which comprises the light-emitting diode epitaxial wafer.
The embodiment of the invention has the following beneficial effects:
the antistatic layer comprises a first sub-layer, a second sub-layer and a third sub-layer, wherein the first sub-layer is of a BN/AlN superlattice structure, stress between an epitaxial structure and a Si substrate is relieved, B atoms are smaller, lattice defects can be continuously filled, lattice mismatch with the Si substrate is reduced, an energy band of the BN layer is higher, electron migration of the epitaxial layer can be blocked, a leakage channel is reduced, and electrostatic breakdown is reduced; second sublayer Ga 2 O 3 The effect of (a) is to increase the content of the third sub-layer (AlGa) 2 O 3 The quality of the layer and the generation of polycrystal are avoided; the third sublayer is (AlGa) 2 O 3 GaN superlattice structure, (AlGa) 2 O 3 The layer has higher forbidden bandwidth, and effectively prevents electron migration, thereby reducing the generation of leakage channels, improving antistatic ability, forming a superlattice structure by alternately stacking the GaN layer and the GaN layer, and reducing lattice mismatch with a subsequent epitaxial structure.
Drawings
Fig. 1 is a schematic structural diagram of a light emitting diode epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for manufacturing an led epitaxial wafer according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to specific embodiments.
As shown in fig. 1, an embodiment of the present invention provides a light emitting diode epitaxial wafer, which includes a Si substrate 1, and an antistatic layer 2, an undoped GaN layer 3, an N-type GaN layer 4, a multiple quantum well layer 5, an electron blocking layer 6, and a P-type GaN layer 7 sequentially stacked on the Si substrate 1, wherein the antistatic layer 2 includes a first layerA sublayer, a second sublayer and a third sublayer, wherein the first sublayer comprises a BN layer and an AlN layer which are periodically and alternately laminated, and the second sublayer is Ga 2 O 3 A layer comprising periodically alternately laminated (AlGa) 2 O 3 A layer and a GaN layer. The first sub-layer is of a BN/AlN superlattice structure, stress between the epitaxial structure and the Si substrate is relieved, B atoms are smaller, lattice defects can be continuously filled, lattice mismatch with the Si substrate is reduced, the energy band of the BN layer is higher, electron migration of the epitaxial layer can be blocked, a leakage channel is reduced, and electrostatic breakdown is reduced; second sublayer Ga 2 O 3 The effect of (a) is to increase the content of the third sub-layer (AlGa) 2 O 3 The quality of the layer and the generation of polycrystal are avoided; the third sublayer is (AlGa) 2 O 3 GaN superlattice structure, (AlGa) 2 O 3 The layer has higher forbidden bandwidth, and effectively prevents electron migration, thereby reducing the generation of leakage channels, improving antistatic ability, forming a superlattice structure by alternately stacking the GaN layer and the GaN layer, and reducing lattice mismatch with a subsequent epitaxial structure. In one embodiment, the (AlGa) 2 O 3 The Al component of the layer accounts for 0.3-0.7, and is Ga 2 O 3 To increase the formation of Al component (AlGa) 2 O 3 The material can increase the forbidden bandwidth and effectively prevent the mobility of electrons, so that the generation of a leakage channel is reduced, and if the Al component accounts for less than 0.3, the blocking effect on electrons is not obvious; if the Al component is more than 0.7, it may cause degradation of crystal quality, and exemplary is 0.3, 0.4, 0.45, 0.5, 0.6 or 0.7, but is not limited thereto. Compared with other substrates such as a sapphire substrate, the Si substrate and an epitaxial material have larger lattice mismatch and thermal mismatch, a large number of dislocation is caused in the epitaxial process, so that a leakage channel is generated, the epitaxial quality and the electrostatic tolerance capability are seriously reduced, in addition, the Si substrate can also bring about electron migration, so that the leakage channel is generated, and further requirements are put on the antistatic capability of a device.
In one embodiment, the growth period of the first sub-layer is 3-6, and is exemplified by 3, 4, 5 or 6. The BN layer has a thickness of 3nm to 8nm, and exemplary is 3nm, 4nm, 5nm, 6nm, 7nm or 8nm, but is not limited thereto. The AlN layer has a thickness of 3nm to 8nm, and is exemplified by 3nm, 4nm, 5nm, 6nm, 7nm, or 8nm, but not limited thereto. The thickness of the first sub-layer is suitable for releasing the stress of the Si substrate and the epitaxial layer, preventing Si atoms in the Si substrate from diffusing into the epitaxial layer, and improving the lattice quality of the subsequent epitaxial structure.
In one embodiment, the Ga 2 O 3 The thickness of the layer is 5 nm-10 nm. Ga 2 O 3 Layer arrangement is improved (AlGa) 2 O 3 The crystallization quality of the film avoids the generation of polycrystal, and if the thickness is too small, the crystallization grain is large and is unfavorable for Ga 2 O 3 Growth of the layer, thereby affecting subsequent growth (AlGa) 2 O 3 The quality of the layer is exemplified by, but not limited to, 5nm, 6nm, 7nm, 8nm, 9nm or 10nm.
In one embodiment, the growth period of the third sub-layer is 3-6, and is exemplified by 3, 4, 5 or 6. Said (AlGa) 2 O 3 The thickness of the layer is 5 nm-10 nm, if the thickness is less than 5nm, the migration of electrons is not blocked; if the thickness is more than 10nm, it may cause degradation of quality, and exemplary are 5nm, 6nm, 7nm, 8nm, 9nm or 10nm, but not limited thereto. The thickness of the GaN layer is 5nm to 10nm, and is exemplified by, but not limited to, 5nm, 6nm, 7nm, 8nm, 9nm, or 10nm. In the third sublayer (AlGa) 2 O 3 The layer has higher forbidden bandwidth, and forms a superlattice structure with the GaN layer in an alternating lamination way, so that not only can the migration of electrons be effectively prevented, but also the lattice mismatch with the subsequent epitaxial structure can be reduced, and the crystal quality of the epitaxial structure is further improved by the thickness of the appropriate third sub-layer.
In one embodiment, in the third sub-layer, the (AlGa) of each cycle 2 O 3 The Al component of the layer is gradually increased along the epitaxial growth direction, and the Al component is gradually increased along with the periodic growth, so that the lattice mismatch with GaN can be continuously reduced, and the generation of defects is reduced.
In addition to the above antistatic layer structure, other layered structures of the present invention are characterized as follows:
the thickness of the undoped GaN layer 3 is 1-5 μm.
The thickness of the N-type GaN layer 4 is 2-3 mu m, and the doping concentration of Si is 1 multiplied by 10 19 cm -3 ~5×10 19 cm -3 。
The multiple quantum well layer 5 comprises an InGaN quantum well layer and an AlGaN quantum barrier layer which are periodically stacked, and the stacking period is 6-12. The thickness of the InGaN quantum well layer is 2 nm-5 nm, and the in component accounts for 0.1-0.3; the AlGaN quantum barrier layer has a thickness of 5 nm-15 nm and an Al component ratio of 0.01-0.1.
The electron blocking layer 6 is an AlInGaN layer, the thickness is 10 nm-40 nm, the Al component accounts for 0.005-0.1, and the in component accounts for 0.01-0.2.
The thickness of the P-type GaN layer 7 is 10 nm-50 nm, and the doping concentration of Mg is 1 multiplied by 10 19 cm -3 ~1×10 21 cm -3 。
Correspondingly, as shown in fig. 2, the invention also provides a preparation method of the light-emitting diode epitaxial wafer, which comprises the following steps:
s1, providing a Si substrate;
s2, sequentially growing an antistatic layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the Si substrate; the epitaxial structure may be grown by MOCVD, MBE, PLD or VPE, but is not limited thereto. Specifically, S2 includes the following steps:
s21, growing an antistatic layer; specifically, S21 includes the following steps:
s211, growing a first sub-layer;
MOCVD growth is adopted, the temperature of a reaction chamber is controlled to be 800-1280 ℃, the pressure is 200-300 Torr, and NH is introduced 3 As N source, let in BCl 3 As a B source, growing a BN layer; MOCVD growth is adopted, the temperature of a reaction chamber is controlled to be 800-1280 ℃, the pressure is 200-300 Torr, and NH is introduced 3 Introducing TMAL as an Al source to grow an AlN layer as an N source; the periodically grown BN layer and AlN layer are repeatedly laminated.
S212, growing a second sub-layer;
MOCVD growth is adopted, the temperature of a reaction chamber is controlled to be 600-900 ℃, the pressure is 200-300 Torr, and O is introduced 2 As O source, lead toTMGa is taken as Ga source, and carrier gas is N 2 And Ar.
S213, growing a third sub-layer;
MOCVD growth is adopted, the temperature of a reaction chamber is controlled to be 600-900 ℃, the pressure is 200-300 Torr, and O is introduced 2 As O source, TMGa as Ga source, TMAL as Al source, and carrier gas as N 2 And Ar, growth (AlGa) 2 O 3 A layer; controlling the temperature of the reaction chamber to be 800-1280 ℃, controlling the pressure to be 200 Torr-300 Torr, and introducing NH 3 As an N source, introducing TMGa as a Ga source, and growing a GaN layer; repeated laminated periodic growth (AlGa) 2 O 3 A layer and a GaN layer.
S22, growing an undoped GaN layer;
MOCVD growth is adopted, the temperature of a reaction chamber is controlled to be 1050-1200 ℃, the pressure is 100-600 Torr, and NH is introduced 3 As an N source, TMGa was introduced as a Ga source.
S23, growing an N-type GaN layer;
MOCVD growth is adopted, the temperature of a reaction chamber is controlled to be 1050-1200 ℃, the pressure is 100-600 Torr, and NH is introduced 3 As N source, TMGa is introduced as Ga source, siH is introduced 4 As an N-type dopant source.
S24, growing a multi-quantum well layer;
MOCVD growth is adopted, the temperature of the reaction chamber is controlled to be 790-810 ℃, the pressure is 50-300 Torr, and NH is introduced 3 As an N source, introducing TMGa as a Ga source, introducing TMIn as an In source, and growing an InGaN quantum well layer; controlling the temperature of the reaction chamber to be 800-900 ℃ and the pressure to be 50-300 Torr, and introducing NH 3 As an N source, TMGa is introduced as a Ga source, TMAL is introduced as an Al source, and an AlGaN quantum barrier layer is grown; and repeatedly stacking the periodically grown InGaN quantum well layer and the AlGaN quantum barrier layer.
S25, growing an electron blocking layer;
MOCVD growth is adopted, the temperature of the reaction chamber is controlled to be 900-1000 ℃, the pressure is 100-300 Torr, and NH is introduced 3 As an N source, TMGa as a Ga source, TMAl as an Al source, and TMIn as an In source.
S26, growing a P-type GaN layer;
by MOCVD growth, controlling the temperature of a reaction chamber to be 900-1050 ℃, controlling the pressure to be 100-600 Torr, and introducing NH 3 As N source, TMGa as Ga source and CP 2 Mg is used as a P-type dopant source.
The invention is further illustrated by the following specific examples.
Example 1
The embodiment provides a light-emitting diode epitaxial wafer, which comprises a Si substrate, and an antistatic layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially laminated on the Si substrate.
The antistatic layer comprises a first sub-layer, a second sub-layer and a third sub-layer, wherein the first sub-layer comprises a BN layer and an AlN layer which are periodically and alternately laminated, the cycle number is 3, the thickness of the BN layer is 3nm, and the thickness of the AlN layer is 3nm; the second sublayer is Ga 2 O 3 Layer, ga 2 O 3 The thickness of the layer is 5nm; the third sub-layer comprises periodically and alternately laminated (AlGa) 2 O 3 Layer and GaN layer, cycle number of 3, (AlGa) 2 O 3 The thickness of the layer was 5nm, the Al component ratio was 0.3, and the thickness of the GaN layer was 5nm.
The thickness of the undoped GaN layer was 2 μm.
The thickness of the N-type GaN layer is 2 μm, and the doping concentration of Si is 2.5X10 19 cm -3 。
The multi-quantum well layer is composed of InGaN quantum well layers and AlGaN quantum barrier layers which are alternately stacked, and the cycle number is 10. The thickness of the InGaN quantum well layer is 3.5nm, and the in component ratio is 0.22; the AlGaN quantum barrier layer had a thickness of 9.8nm and an Al component ratio of 0.05.
The electron blocking layer was an AlInGaN layer having a thickness of 15nm, an Al component ratio of 0.1, and an in component ratio of 0.05.
The thickness of the P-type GaN layer is 15nm, and the doping concentration of Mg is 2 multiplied by 10 20 cm -3 。
The preparation method of the LED epitaxial wafer comprises the following steps:
s1, providing a Si substrate;
s2, sequentially growing an antistatic layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the Si substrate; specifically, S2 includes the following steps:
s21, growing an antistatic layer; specifically, S21 includes the following steps:
s211, growing a first sub-layer;
MOCVD growth is adopted, the temperature of a reaction chamber is controlled to be 1200 ℃, the pressure is controlled to be 250Torr, and NH is introduced 3 As N source, let in BCl 3 As a B source, growing a BN layer; MOCVD growth is adopted, the temperature of a reaction chamber is controlled to be 1000 ℃, the pressure is controlled to be 200Torr, and NH is introduced 3 Introducing TMAL as an Al source to grow an AlN layer as an N source; the periodically grown BN layer and AlN layer are repeatedly laminated.
S212, growing a second sub-layer;
MOCVD is adopted for growth, the temperature of a reaction chamber is controlled to be 800 ℃, the pressure is controlled to be 250Torr, and O is introduced 2 As O source, TMGa is introduced as Ga source, and carrier gas is N 2 And Ar.
S213, growing a third sub-layer;
MOCVD is adopted for growth, the temperature of a reaction chamber is controlled to be 800 ℃, the pressure is controlled to be 250Torr, and O is introduced 2 As O source, TMGa as Ga source, TMAL as Al source, and carrier gas as N 2 And Ar, growth (AlGa) 2 O 3 A layer; controlling the temperature of the reaction chamber to 1000 ℃, the pressure to 200Torr, and introducing NH 3 As an N source, introducing TMGa as a Ga source, and growing a GaN layer; repeated laminated periodic growth (AlGa) 2 O 3 A layer and a GaN layer.
S22, growing an undoped GaN layer;
MOCVD growth is adopted, the temperature of the reaction chamber is controlled to be 1100 ℃, the pressure is controlled to be 150Torr, and NH is introduced 3 As an N source, TMGa was introduced as a Ga source.
S23, growing an N-type GaN layer;
MOCVD growth is adopted, the temperature of the reaction chamber is controlled to be 1120 ℃, the pressure is controlled to be 100Torr, and NH is introduced 3 As N source, TMGa is introduced as Ga source, siH is introduced 4 As an N-type dopant source.
S24, growing a multi-quantum well layer;
MOCVD growth is adopted, the temperature of the reaction chamber is controlled to be 795 ℃, the pressure is controlled to be 200Torr, and NH is introduced 3 As an N source, introducing TMGa as a Ga source, introducing TMIn as an In source, and growing an InGaN quantum well layer; controlling the temperature of the reaction chamber to 855 ℃, the pressure to 200Torr, and introducing NH 3 As an N source, TMGa is introduced as a Ga source, TMAL is introduced as an Al source, and an AlGaN quantum barrier layer is grown; and repeatedly stacking the periodically grown InGaN quantum well layer and the AlGaN quantum barrier layer.
S25, growing an electron blocking layer;
MOCVD is adopted for growth, the temperature of a reaction chamber is controlled to be 965 ℃, the pressure is controlled to be 200Torr, and NH is introduced 3 As an N source, TMGa as a Ga source, TMAl as an Al source, and TMIn as an In source.
S26, growing a P-type GaN layer;
MOCVD is adopted for growth, the temperature of a reaction chamber is controlled to be 985 ℃, the pressure is controlled to be 200Torr, and NH is introduced 3 As N source, TMGa as Ga source and CP 2 Mg is used as a P-type dopant source.
Example 2
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that the number of cycles of the first sub-layer is 5, the thickness of the bn layer is 5nm, and the thickness of the aln layer is 5nm. The remainder was the same as in example 1.
Example 3
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that the number of cycles of the third sub-layer is 5, (AlGa) 2 O 3 The thickness of the layer was 8nm, the Al component ratio was 0.5, and the thickness of the GaN layer was 8nm. The remainder was the same as in example 1.
Example 4
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that in the third sublayer, each period (AlGa) 2 O 3 The Al composition ratio of the layer gradually increases from 0.4 to 0.6 in the epitaxial growth direction. The remainder was the same as in example 3.
Comparative example 1
This comparative example provides a light emitting diode epitaxial wafer, which is different from example 1 in that the antistatic layer does not include the first sub-layer; accordingly, the preparation step of the first sub-layer is also not included in the preparation method. The remainder was the same as in example 1.
Comparative example 2
This comparative example provides a light emitting diode epitaxial wafer, which is different from example 1 in that the antistatic layer does not include the second sub-layer; accordingly, the second sub-layer preparation step is also not included in the preparation method. The remainder was the same as in example 1.
Comparative example 3
This comparative example provides a light emitting diode epitaxial wafer, which is different from example 1 in that the antistatic layer does not include the third sub-layer; accordingly, the preparation step of the third sub-layer is also not included in the preparation method. The remainder was the same as in example 1.
Performance test:
the light-emitting diode epitaxial wafers prepared in examples 1 to 4 and comparative examples 1 to 3 were fabricated into 10mil×24mil chips and subjected to performance test on the same LED spot tester:
(1) Photoelectric properties: the light efficiency improvement rates of examples 1 to 4, comparative examples 2 and comparative example 3 compared with comparative example 1 were calculated by testing at 120mA/60mA current.
(2) Antistatic ability: the antistatic performance of the chip is tested by using an electrostatic instrument under an HBM (human body discharge model) model, and the test chip can bear the passing proportion of the reverse 6000V static electricity.
Table 1 results of performance testing of led epitaxial wafers
As can be seen from the table, the adoption of the antistatic layer structure can effectively improve the luminous efficiency and antistatic capability of the LED.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.
Claims (10)
1. The light-emitting diode epitaxial wafer is characterized by comprising a Si substrate, and an antistatic layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially laminated on the Si substrate, wherein the antistatic layer comprises a first sub-layer, a second sub-layer and a third sub-layer, and the first sub-layer comprises a BN layer and an AlN layer which are periodically and alternately laminated;
the second sublayer is Ga 2 O 3 A layer;
the third sub-layer comprises periodically and alternately laminated (AlGa) 2 O 3 Layer and GaN layer, said (AlGa) 2 O 3 The Al component of the layer accounts for 0.3-0.7.
2. The light-emitting diode epitaxial wafer of claim 1, wherein the growth period of the first sub-layer is 3-6, and the thickness of the BN layer is 3-8 nm; the thickness of the AlN layer is 3 nm-8 nm.
3. The light-emitting diode epitaxial wafer of claim 1, wherein the Ga 2 O 3 The thickness of the layer is 5 nm-10 nm.
4. The led epitaxial wafer of claim 1, wherein the growth period of the third sub-layer is 3-6, the (AlGa) 2 O 3 The thickness of the layer is 5 nm-10 nm; the thickness of the GaN layer is 5 nm-10 nm.
5. The light-emitting diode epitaxial wafer of claim 1, wherein in the third sub-layer, the (AlGa) of each period 2 O 3 The Al composition ratio of the layer gradually increases in the epitaxial growth direction.
6. A method for preparing a light-emitting diode epitaxial wafer, which is used for preparing the light-emitting diode epitaxial wafer according to any one of claims 1 to 5, and is characterized by comprising the following steps:
providing a Si substrate, sequentially growing on the Si substrateThe anti-static layer comprises a first sub-layer, a second sub-layer and a third sub-layer, wherein the first sub-layer comprises a BN layer and an AlN layer which are periodically and alternately laminated, and the second sub-layer is Ga 2 O 3 A layer comprising periodically alternately laminated (AlGa) 2 O 3 A layer and a GaN layer.
7. The method of manufacturing a light-emitting diode epitaxial wafer according to claim 6, wherein the growth temperature of the first sub-layer is 800 ℃ to 1280 ℃ and the growth pressure is 200torr to 300torr.
8. The method of manufacturing a light-emitting diode epitaxial wafer according to claim 6, wherein the growth temperature of the second sub-layer is 600 ℃ to 900 ℃ and the growth pressure is 200torr to 300torr.
9. The method of manufacturing a light-emitting diode epitaxial wafer according to claim 6, wherein the growth temperature of the third sub-layer is 600 ℃ to 1280 ℃ and the growth pressure is 200torr to 300torr.
10. A light emitting diode, characterized in that the light emitting diode comprises the light emitting diode epitaxial wafer according to any one of claims 1 to 5.
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