CN115954422A

CN115954422A - Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode

Info

Publication number: CN115954422A
Application number: CN202310124123.5A
Authority: CN
Inventors: 张彩霞; 印从飞; 程金连; 刘春杨; 胡加辉; 金从龙
Original assignee: Jiangxi Zhao Chi Semiconductor Co Ltd
Current assignee: Jiangxi Zhao Chi Semiconductor Co Ltd
Priority date: 2023-02-16
Filing date: 2023-02-16
Publication date: 2023-04-11

Abstract

The invention discloses a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode, and relates to the field of semiconductor photoelectric devices. The light emitting diode epitaxial wafer comprises a substrate, and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer which are sequentially grown on the substrate; the active layer is of a periodic structure, and each period comprises a potential well layer, a transition layer and a barrier layer which are sequentially stacked; the transition layer comprises WS ₂ And (3) a layer. The invention can improve the luminous efficiency, antistatic capability and wavelength uniformity of the light-emitting diode.

Description

Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode

Technical Field

The invention relates to the field of semiconductor photoelectric devices, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode.

Background

At present, gaN-based leds are the most widely used leds, and their active regions are generally composite structures formed by periodically stacking InGaN well layers and GaN barrier layers. The conventional active region has the following problems: (1) In the active region, due to the high In component, in atoms are large, and the growth temperature of the active region is low, so that the crystal lattice quality of the active region is poor, a leakage channel is formed, the antistatic capability is influenced, and the defects can be used as non-radiative recombination centers to influence the luminous efficiency. (2) Due to the fact that serious lattice mismatch exists between InGaN material and GaN material heterojunctions of the potential well layer, the potential well layer is subjected to piezoelectric polarization to generate energy band inclination, electrons and holes are separated in space to influence light emitting efficiency, and the problem that the difference of light emitting wavelengths is large when currents of different sizes are injected is caused.

Disclosure of Invention

The invention provides a light emitting diode epitaxial wafer and a preparation method thereof, which can effectively improve the light emitting efficiency, the antistatic capability and the wavelength uniformity of a light emitting diode.

The technical problem to be solved by the present invention is to provide a light emitting diode with high light emitting efficiency, strong antistatic ability and high wavelength uniformity.

In order to solve the problems, the invention discloses a light emitting diode epitaxial wafer which comprises a substrate, and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer which are sequentially grown on the substrate; the active layer is of a periodic structure, and each period comprises a potential well layer, a transition layer and a barrier layer which are sequentially stacked; the transition layer comprises WS ₂ And (3) a layer.

As an improvement of the above technical solution, WS ₂ The thickness of the layer is 1-10nm.

As an improvement of the above technical solution, the transition layer comprises In laminated In sequence _x Ga _1-x N layer and WS ₂ A layer;

the well layer is In _y Ga _1-y N layer, x＜y。

As an improvement of the technical proposal, x is 0.01 to 0.3, y is 0.1 to 0.5;

said In _x Ga _1-x The thickness of the N layer is 0.1-3nm.

As an improvement of the technical scheme, the thickness of the potential well layer is 2-5nm, and the thickness of the barrier layer is 6-12nm.

Correspondingly, the invention also discloses a preparation method of the light emitting diode epitaxial wafer, which is used for preparing the light emitting diode epitaxial wafer and comprises the following steps:

providing a substrate, and growing a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer on the substrate in sequence; the active layer is of a periodic structure, and each period comprises a potential well layer, a transition layer and a barrier layer which are sequentially stacked; the transition layer comprises WS ₂ A layer.

As an improvement of the above technical solution, the first WS ₂ The layer is grown by CVD, the growth temperature is 700-1000 ℃; during growth, the molar ratio of the tungsten source to the sulfur source is 1 (1-3), and Ar and H are used ₂ A mixed gas of (2) as a carrier gas, and Ar and H ₂ Is 1: (1-5).

As an improvement of the above technical solution, the transition layer further comprises In _x Ga _1-x An N layer, the potential well layer being In _y Ga _1-y N layers;

said In _x Ga _1-x Growth temperature of N layer > In _y Ga _1-y Growth temperature of the N layer.

As an improvement of the above technical solution, the In _x Ga _1-x The growth temperature of the N layer is 800-850 ℃, and the growth temperature of the potential well layer is 700-800 ℃.

Correspondingly, the invention also discloses a light-emitting diode which comprises the light-emitting diode epitaxial wafer.

The implementation of the invention has the following beneficial effects:

1. a transition layer is arranged between the potential well layer and the barrier layer of the active layer, and comprises WS ₂ A layer. First, WS ₂ S atoms in the layer can simultaneously form Van der Waals bonds and metal atom covalent bonds, and the Van der Waals bonds are weak in binding force and do not need to consider lattice mismatch limitation. Such that WS ₂ The layer reduces lattice mismatch between heterojunction active layers, reduces active region dislocation density, reduces defect leakage channels introduced by high In components, and improves lattice quality of the light emitting diode device, thereby improving antistatic capability of the light emitting diode device. And secondly, the transition layer reduces lattice mismatch of the potential well layer and the barrier layer, so that formation of non-radiative recombination of the potential well layer caused by defects is reduced, compressive stress borne by the potential well layer is reduced, the piezoelectric polarization effect is greatly reduced, and wave function overlapping of carriers in an active region is increased, thereby greatly increasing the luminous efficiency. Furthermore, WS ₂ The layer can reduce the interface stress on the heterojunction interface and reduce the energy band inclination of the active region, thereby improving the problem that the wavelength difference of the active region with high In component is large when the active region is injected with currents with different sizes. Finally, since the carriers are in WS ₂ The mobility in the material is higher, and the expansion of current carriers in an active region is promoted, so that the luminous efficiency and the luminous uniformity of the active region are improved.

2. The transition layer is arranged between the potential well layer and the barrier layer of the active layer, and comprises In which are sequentially laminated _x Ga _1-x N layer and WS ₂ And (3) a layer. In _x Ga _1-x N layer capable of realizing potential well layer (In) _y Ga _1-y N layers) and WS ₂ Good transition between layers without introducing defects and stress. While also avoiding WS ₂ Layers and well layers (In) _y Ga _1-y N layer) causing diffusion of atoms to form non-radiative recombination, reducing the luminous efficiency.

Drawings

Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the invention;

FIG. 2 is a schematic structural diagram of an active layer according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of an active layer structure according to another embodiment of the present invention;

fig. 4 is a flowchart of a method for manufacturing an led epitaxial wafer according to an embodiment of the invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below.

Referring to fig. 1, the invention discloses a light emitting diode epitaxial wafer, which comprises a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-type GaN layer 4, an active layer 5, an electron blocking layer 6 and a P-type GaN layer 7 which are sequentially grown on the substrate 1. Wherein, the active layer 5 is a periodic structure, the period number is more than or equal to 2, and preferably, the period number is 3-15. Each period includes a well layer 51, a transition layer 52, and a barrier layer 53 stacked in this order. Specifically, in one embodiment of the present invention, the transition layer 52 is WS ₂ The layer, it can reduce the dislocation density of active area, reduces defect electric leakage passageway, promotes antistatic effect. Meanwhile, the lattice mismatch is reduced, and the nonradiative recombination, the piezoelectric polarization effect and the energy band inclination are also reduced, so that the luminous efficiency of the light-emitting diode is improved, and the problem of large difference of luminous wavelengths when different currents are injected is solved. In addition, the carriers are in WS ₂ The spreading rate in the layer is fast, and the luminous efficiency and the luminous uniformity are also improved.

Specifically, transition layer 52 (WS) ₂ Layer) having a thickness of 0.5-15nm. When the thickness is less than 0.5nm, although the luminous efficiency and the luminous uniformity can be improved, it is difficult to effectively improve the antistatic ability. When the thickness is larger than 15nm, although the light-emitting uniformity and antistatic ability can be greatly improved, WS is used ₂ The diffusion of the atoms into the well layer 51 promotes non-radiative recombination, and the diffusion of carriers too far away from the well layer 51 reduces the luminous efficiency. Preferably, transition layer 52 (WS) ₂ Layer) has a thickness of 1-10nm, exemplary 2nm, 4nm, 6nm, 8nm, or 9nm, but not limited thereto.

Specifically, the well layer 51 may be an AlGaN layer or an InGaN layer, but is not limited thereto. Preferably, in one embodiment of the present invention, the well layer 51 is In _y Ga _1-y And N layers, wherein y is 0.1-0.5. The thickness of the well layer 51 is 1-6nm, and is illustratively 1.5nm, 2.5nm, 3nm, 3.5nm, 4nm, or 5.5nm, but is not limited thereto. Preferably, the thickness of the well layer 51 is 2 to 5nm.

Specifically, the barrier layer 52 may be a GaN layer or an AlGaN layer, but is not limited thereto. Preferably, in one embodiment of the present invention, the barrier layer 52 is a GaN layer. The barrier layer 52 has a thickness of 3-20nm, illustratively 4nm, 6nm, 8nm, 10nm, 12nm, 14nm, 16nm, or 18nm, but is not limited thereto. Preferably, the barrier layer 52 is 6-12nm thick.

Preferably, referring to fig. 3, in another embodiment of the present invention, the transition layer 52 includes In sequentially stacked _x Ga _1-x N layer 521 and WS ₂ Layer 522. Well layer 51 is In _y Ga _1-y N layers, x < y. Based on this embodiment, the well layer 51 (In) can be realized _y Ga _1-y N layers) and WS ₂ A good transition between the layers 522 without introducing defects and stresses. While also avoiding WS ₂ Layer 522 and well layer 51 (In) _y Ga _1-y N-layer) causing diffusion of atoms to form non-radiative recombination, reducing the luminous efficiency.

Specifically, in this embodiment, x is 0.01 to 0.3, and is illustratively 0.05, 0.07, 0.1, 0.14, 0.22, or 0.28, but is not limited thereto. y is 0.1 to 0.5, exemplary 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, or 0.45, but not limited thereto.

Specifically, in this example _x Ga _1-x The N layer 521 has a thickness of 0.1-4nm, and is thin, and if it is thicker than 4nm, it increases the thickness of the well layer 51 and WS ₂ Distance between layers 522, weakens WS ₂ The function of layer 522. Exemplary, in _x Ga _1-x The thickness of the N layer 521 is 0.3nm, 0.8nm, 1.2nm, 1.6nm, 2nm, 2.4nm, 3nm, or 3.5nm, but is not limited thereto. Preferably, in _x Ga _1-x The thickness of the N layer 521 is 0.1-3nm.

Specifically, in this embodiment, WS ₂ The thickness of layer 522 is 1-12nm, illustratively 2nm, 4nm, 6nm, 9nm, or 11nm, but is not so limited. Preferably, WS ₂ The thickness of layer 522 is 1-10nm.

The substrate 1 may be a sapphire substrate, a silicon carbide substrate, a GaN substrate, but is not limited thereto. A sapphire substrate is preferred.

The nucleation layer 2 may be, but not limited to, an AlN layer or an AlGaN layer. The nucleation layer 2 has a thickness of 20-100nm, illustratively 30nm, 40nm, 50nm, 60nm, 70nm or 80nm, but is not limited thereto.

The thickness of the intrinsic GaN layer 3 is 300-800nm, and is exemplified by 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, or 750nm, but is not limited thereto.

The doping element of the N-type GaN layer 4 is Si, but not limited thereto. The doping concentration of the N-type GaN layer 4 is 5X 10 ¹⁸ -1×10 ¹⁹ cm ^-3 The thickness is 1 to 3 μm, and 1.2 μm, 1.6 μm, 1.8 μm, 2.2 μm, 2.4 μm, 2.6 μm, 2.8 μm, or 2.9 μm is exemplary, but not limited thereto.

Wherein the electron blocking layer 6 is Al _α Ga _1-α N layer and In _β Ga _1-β The N layers are alternately grown to form a periodic structure, and the period number of the periodic structure is 3-15. Wherein alpha is 0.05-0.2, beta is 0.1-0.5. Specifically, single Al _α Ga _1-α The thickness of the N layer is 1-8nm, and In is single _β Ga _1-β The thickness of the N layer is 1-8nm, and the total thickness of the electron blocking layer 6 is 20-150nm.

The doping element in the P-type GaN layer 7 is Mg, but not limited thereto. The doping concentration of Mg in the P-type GaN layer 7 is 5X 10 ¹⁷ -1×10 ²⁰ cm ^-3 The thickness of the P-type GaN layer 7 is 200-300nm. Exemplary are 210nm, 230nm, 250nm, 270nm, 280nm, or 290nm, but not limited thereto.

Correspondingly, referring to fig. 4, the invention also discloses a method for preparing the light emitting diode epitaxial wafer, which is used for preparing the light emitting diode epitaxial wafer; the method specifically comprises the following steps:

s1: providing a substrate;

preferably, in one embodiment of the present invention, the substrate is heated at a temperature of 1000-1200 deg.C, 200-600torr, H ₂ Annealing for 5-8min under atmosphere.

S2: growing a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer on a substrate in sequence;

specifically, S2 includes:

s21: growing a nucleation layer on a substrate;

wherein, an AlN layer can be grown through PVD and used as a nucleation layer; or an AlGaN layer or an AlN layer may be grown as a nucleation layer by MOCVD, but is not limited thereto. Preferably, in one embodiment of the present invention, the AlGaN layer is grown by MOCVD as a nucleation layer at a growth temperature of 500to 700 ℃ and a growth pressure of 200 to 400torr. During the growth, with N ₂ As carrier gas, or with N ₂ And H ₂ With TMGa or TEGa as Ga source, NH ₃ As the N source, TMAl was used as the Al source.

S22: growing an intrinsic GaN layer on the nucleation layer;

specifically, in one embodiment of the present invention, MOCVD is used to grow the intrinsic GaN layer at a growth temperature of 1100-1150 deg.C and a growth pressure of 100-500torr. During the growth, with N ₂ As carrier gas, or with N ₂ And H ₂ With TMGa as Ga source and NH ₃ As an N source.

S23: growing an N-type GaN layer on the intrinsic GaN layer;

specifically, in one embodiment of the present invention, an N-type GaN layer is grown in MOCVD, wherein the growth temperature is 1100 ℃ to 1150 ℃ and the growth pressure is 100 to 500torr. During the growth, with N ₂ As carrier gas, or with N ₂ And H ₂ With TMGa as the Ga source, NH ₃ As a source of N, siH ₄ As a Si source.

S24: growing an active layer on the N-type GaN layer;

specifically, S24 includes:

s241: growing a potential well layer;

specifically, in one embodiment of the present invention, an InGaN layer is grown as a well layer in MOCVD. Wherein the growth temperature is 700-800 ℃, and the growth pressure is 100-500torr. During the growth, with N ₂ Or Ar is used as a carrier gas to promote the incorporation of In; with TMGa or TEGa as Ga source, NH ₃ As an N source, TMIn was used as an In source.

S242: growing a transition layer on the potential well layer;

specifically, in one embodiment of the present invention, wherein WS may be grown by CVD or PVT ₂ The layer serves as a transition layer, but is not limited thereto. Preferably, in one embodiment of the present invention, WS is grown by CVD ₂ The layer is grown at 700-1000 deg.c in the molar ratio of tungsten source to sulfur source of 1 (1-3) and Ar and H ₂ A mixed gas of (2) as a carrier gas, and Ar and H ₂ Is 1: (1-5). WS grown based on this condition ₂ In-layer WS ₂ The crystal has a single crystal structure, is consistent in orientation, and has good thermal stability and chemical stability. Specifically, the sulfur source may be sodium thiosulfate, but is not limited thereto. Tungsten disulfide may be used as the tungsten source, but is not limited thereto.

In another embodiment of the present invention, in is grown sequentially on the well layer _x Ga _1-x N layer and WS ₂ The layer serves as a transition layer. Wherein, in _x Ga _1-x The N layer may be grown by MOCVD, but is not limited thereto. Specifically, in _x Ga _1-x The growth temperature of the N layer is 800-850 ℃, the growth pressure is 100-500torr, and N is used in the growth process ₂ Or Ar as carrier gas, TMGa or TEGa as Ga source, NH ₃ As an N source, TMIn was used as an In source. Preferably, in _x Ga _1-x The growth temperature of the N layer is higher than that of the potential well layer, so that the defect caused by low-temperature growth can be prevented from forming a non-composite center, and the luminous efficiency is reduced.

S243: growing a barrier layer on the transition layer;

specifically, in one embodiment of the present invention, a GaN layer is grown as a well layer in MOCVD. Wherein the growth temperature is 800-900 ℃, and the growth pressure is 100-500torr. During the growth, with N ₂ As carrier gas, or with N ₂ And H ₂ The mixed gas of (2) is used as a carrier gas; with TMGa or TEGa as Ga source, NH ₃ As the N source.

S244: steps S241 to S243 are periodically repeated until an active layer is obtained.

S25: growing an electron blocking layer on the active layer;

wherein, in one embodiment of the present invention, the electron blocking layer is grown in MOCVD. Specifically, al is alternately grown on the active layer _α Ga _1-α N layer and In _β Ga _1-β And repeating the N layers for 3-15 periods to obtain the electron blocking layer. Wherein the growth temperature of both is 900-1000 ℃. During the growth process, with N ₂ As carrier gas, TMGa or TEGa as Ga source, TMIn as In source, TMAl as Al source, NH ₃ As an N source.

S26: growing a P-type GaN layer on the electron blocking layer;

in one embodiment of the invention, the P-type GaN layer is grown in MOCVD at a growth temperature of 800-1000 deg.C and a growth pressure of 100-300torr. During the growth process, with N ₂ As carrier gas, or with N ₂ And H ₂ With TMGa or TEGa as Ga source, NH ₃ As N source, CP ₂ Mg as a Mg source.

The invention is further illustrated by the following specific examples:

example 1

The present embodiment provides a light emitting diode epitaxial wafer, referring to fig. 1 and 2, which includes a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-type GaN layer 4, an active layer 5, an electron blocking layer 6, and a P-type GaN layer 7 sequentially grown on the substrate 1.

Wherein the substrate 1 is a sapphire substrate. The nucleation layer 2 is an AlGaN layer with a thickness of 30nm. The thickness of the intrinsic GaN layer 3 was 400nm. The doping concentration of Si in the N-type GaN layer 4 was 9X 10 ¹⁸ cm ^-3 The thickness was 2 μm.

Wherein the active layer 5 is a well layer 51 (In) _0.3 Ga _0.7 N layer), the buffer layer 52, and the barrier layer 53 (GaN layer) have a periodic structure with a cycle number of 10. The thickness of the single potential well layer is 3nm, the thickness of the single transition layer is 3.5nm, and the thickness of the single barrier layer is 10nm. The transition layer is WS ₂ And (3) a layer.

Wherein the electron blocking layer 6 is Al _α Ga _1-α N layer (α = 0.08) and In _β Ga _1-β N-layer (beta = 0.35) alternately grown periodic junctionThe number of cycles is 8. Single Al _α Ga _1-α The thickness of the N layer was 3nm, single In _β Ga _1-β The thickness of the N layer was 6nm.

Wherein the doping concentration of Mg in the P-type GaN layer 7 is 5 multiplied by 10 ²⁰ cm ^-3 And the thickness is 260nm.

The preparation method of the light emitting diode epitaxial wafer in the embodiment comprises the following steps:

(1) The substrate is provided and loaded into the MOCVD reactor at 1150 deg.c, 400torr ₂ Annealing for 6min under atmosphere.

(2) Growing a nucleation layer on the substrate;

specifically, an AlGaN layer was grown as a nucleation layer by MOCVD at a growth temperature of 650 ℃ and a growth pressure of 250torr. During the growth process, with N ₂ And H ₂ With TMGa as the Ga source, NH ₃ As the N source, TMAl was used as the Al source.

(3) Growing an intrinsic GaN layer on the nucleation layer;

specifically, an intrinsic GaN layer is grown in MOCVD. The growth temperature is 1140 ℃ and the growth pressure is 300torr. During the growth process, with N ₂ As carrier gas, TMGa as Ga source, NH ₃ As the N source.

(4) Growing an N-type GaN layer on the intrinsic GaN layer;

specifically, an N-type GaN layer is grown in MOCVD at 1140 ℃, under 300torr of growth pressure and N ₂ And H ₂ As carrier gas, TMGa as Ga source, NH ₃ As a source of N, siH ₄ As a Si source.

(5) Growing a potential well layer;

specifically, in is grown by MOCVD _0.3 Ga _0.7 And the growth temperature of the N layer is 780 ℃, and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber ₃ As N source, TMGa as Ga source, N ₂ As a carrier gas, TMIn was introduced as an In source.

(6) Growing a transition layer on the potential well layer;

in particular, WS is grown by CVD ₂ The layer, as a transition layer,the growth temperature is 750 ℃, the molar ratio of the tungsten source to the sulfur source is 1 ₂ The mixed gas (volume ratio 1. Wherein, the tungsten source is tungsten disulfide, and the sulfur source is sodium thiosulfate.

(7) Growing a barrier layer on the transition layer;

specifically, a GaN layer is grown as a barrier layer in MOCVD. The growth temperature is 850 ℃, the growth pressure is 300torr, and N is used ₂ And H ₂ With TMGa as the Ga source, NH ₃ As the N source.

(8) Repeating the steps (5) to (7) periodically until an active layer is obtained;

(9) Growing an electron blocking layer on the active layer;

specifically, al is periodically grown in MOCVD _α Ga _1-α N layer and In _β Ga _1-β And the N layer is used as an electron blocking layer. Wherein, al _α Ga _1-α The growth temperature of the N layer is 950 ℃, the growth pressure is 300torr, and N is used ₂ And H ₂ The mixed gas of (2) as a carrier gas, TMGa as a Ga source, TMAl as an Al source, NH ₃ As the N source. In _β Ga _1-β The growth temperature of the N layer is 950 ℃, the growth pressure is 300torr, and N is used ₂ And H ₂ The mixed gas of (2) as a carrier gas, TMGa as a Ga source, TMIn as an In source, NH ₃ As the N source.

(10) Growing a P-type GaN layer on the electron blocking layer;

specifically, the growth temperature is 950 ℃, the growth pressure is 220torr, and N is used ₂ And H ₂ As carrier gas, TMGa as Ga source, NH ₃ As N source, CP ₂ Mg as a Mg source.

Example 2

Wherein the substrate 1 is a sapphire substrate. The nucleation layer 2 is an AlGaN layer with a thickness of 30nm. Thickness of intrinsic GaN layer 3Is 400nm. The doping concentration of Si in the N-type GaN layer 4 was 9X 10 ¹⁸ cm ^-3 The thickness thereof was 2 μm.

Wherein the active layer 5 is a well layer 51 (In) _0.3 Ga _0.7 N layer), transition layer 52, and barrier layer 53 (GaN layer) are of a periodic structure with a cycle number of 10. Wherein each transition layer 52 comprises In laminated In sequence _x Ga _1-x N layers 521 (x = 0.3) and WS ₂ Layer 522, in _x Ga _1-x The thickness of the N layer is 0.5nm ₂ The thickness of the layer was 3nm. The thickness of the individual well layers was 3nm and the thickness of the individual barrier layers was 10nm.

Wherein the electron blocking layer 6 is Al _α Ga _1-α N layer (α = 0.08) and In _β Ga _1-β N layers (β = 0.35) of a periodic structure alternately grown with a cycle number of 8. Single Al _α Ga _1-α The thickness of the N layer was 3nm, single In _β Ga _1-β The thickness of the N layer was 6nm.

Wherein the doping concentration of Mg in the P-type GaN layer 7 is 5 multiplied by 10 ²⁰ cm ^-3 The thickness is 260nm.

(2) Growing a nucleation layer on the substrate;

specifically, an AlGaN layer was grown as a nucleation layer by MOCVD at a growth temperature of 650 ℃ and a growth pressure of 250torr. During the growth, with N ₂ And H ₂ With TMGa as the Ga source, NH ₃ As the N source, TMAl was used as the Al source.

(3) Growing an intrinsic GaN layer on the nucleation layer;

(4) Growing an N-type GaN layer on the intrinsic GaN layer;

specifically, an N-type GaN layer is grown in MOCVD at 1140 deg.C under 300torr ₂ And H ₂ As carrier gas, TMGa as Ga source, NH ₃ As a source of N, siH ₄ As a Si source.

(5) Growing a potential well layer;

specifically, in is grown by MOCVD _0.3 Ga _0.7 And the growth temperature of the N layer is 780 ℃, and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber ₃ As N source, TMGa as Ga source, N ₂ As a carrier gas, TMIn was used as an In source.

(6) Growing In on the well layer _x Ga _1-x N layers;

in particular, growth of In by MOCVD growth MOCVD _x Ga _1-x And the growth temperature of the N layer is 800 ℃, and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber ₃ As N source, N ₂ As a carrier gas, TMIn was introduced as an In source.

(7) In _x Ga _1-x Growth of WS on N layer ₂ A layer;

in particular, WS is grown by CVD ₂ And the layer is used as a transition layer, the growth temperature is 750 ℃, the molar ratio of the tungsten source to the sulfur source is 1 ₂ The mixed gas (volume ratio 1. Wherein, the tungsten source is tungsten disulfide, and the sulfur source is sodium thiosulfate.

(8) In WS ₂ Growing a barrier layer on the layer;

(9) Repeating the steps (5) to (8) periodically until an active layer is obtained;

(10) Growing an electron blocking layer on the active layer;

specifically, al is periodically grown in MOCVD _α Ga _1-α N layer and In _β Ga _1-β And the N layer is used as an electron blocking layer. Wherein，Al _α Ga _1-α The growth temperature of the N layer is 950 ℃, the growth pressure is 300torr, and N is used ₂ And H ₂ The mixed gas of (2) as a carrier gas, TMGa as a Ga source, TMAl as an Al source, NH ₃ As the N source. In _β Ga _1-β The growth temperature of the N layer is 950 ℃, the growth pressure is 300torr, and N is used ₂ And H ₂ The mixed gas of (2) as a carrier gas, TMGa as a Ga source, TMIn as an In source, NH ₃ As the N source.

(11) Growing a P-type GaN layer on the electron blocking layer;

Example 3

The present embodiment provides an epitaxial wafer for a light emitting diode, which, referring to fig. 1 and 2, includes a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-type GaN layer 4, an active layer 5, an electron blocking layer 6, and a P-type GaN layer 7 sequentially grown on the substrate 1.

Wherein the substrate 1 is a sapphire substrate. The nucleation layer 2 is an AlGaN layer and has a thickness of 30nm. The thickness of the intrinsic GaN layer 3 was 400nm. The doping concentration of Si in the N-type GaN layer 4 was 9X 10 ¹⁸ cm ^-3 The thickness was 2 μm.

Wherein the active layer 5 is a well layer 51 (In) _0.3 Ga _0.7 N layer), transition layer 52, and barrier layer 53 (GaN layer) are of a periodic structure with a cycle number of 10. Wherein each transition layer 52 comprises In stacked In sequence _x Ga _1-x N layers 521 (x = 0.1) and WS ₂ Layer 522, in _x Ga _1-x The thickness of the N layer is 0.5nm ₂ The thickness of the layer was 3nm. The thickness of the individual well layers was 3nm and the thickness of the individual barrier layers was 10nm.

Wherein the electron blocking layer 6 is Al _α Ga _1-α N layer (α = 0.08) and In _β Ga _1-β N layers (β = 0.35) of a periodic structure alternately grown with a cycle number of 8. Single Al _α Ga _1-α The thickness of the N layer was 3nm, single In _β Ga _1-β Thickness of N layerIs 6nm.

(1) Providing a substrate, loading the substrate into a MOCVD reaction chamber, at 1150 deg.C, 400torr ₂ Annealing for 6min under atmosphere.

(2) Growing a nucleation layer on the substrate;

(3) Growing an intrinsic GaN layer on the nucleation layer;

(4) Growing an N-type GaN layer on the intrinsic GaN layer;

specifically, an N-type GaN layer is grown in MOCVD at 1140 ℃, under 300torr of growth pressure and N ₂ And H ₂ As carrier gas, TMGa as Ga source, NH ₃ As N source, siH ₄ As a Si source.

(5) Growing a potential well layer;

in particular, in is grown by MOCVD _0.3 Ga _0.7 And the growth temperature of the N layer is 780 ℃, and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber ₃ As N source, TMGa as Ga source, N ₂ As a carrier gas, TMIn was used as an In source.

(6) Growing In on the well layer _x Ga _1-x N layers;

in particular, growth of In by MOCVD growth MOCVD _x Ga _1-x And the growth temperature of the N layer is 800 ℃, and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber ₃ As a source of N, N ₂ As a carrier gas, TMIn was introduced as an In source.

(7) In _x Ga _1-x Growth of WS on N layer ₂ A layer;

in particular, growth of WS by CVD ₂ And the layer is used as a transition layer, the growth temperature is 750 ℃, the molar ratio of the tungsten source to the sulfur source is 1 ₂ The mixed gas (volume ratio 1. Wherein, the tungsten source is tungsten disulfide, and the sulfur source is sodium thiosulfate.

(8) In WS ₂ Growing a barrier layer on the layer;

specifically, a GaN layer is grown as a barrier layer in MOCVD. The growth temperature is 850 ℃, the growth pressure is 300torr, and N is used ₂ And H ₂ With TMGa as Ga source and NH ₃ As the N source.

(10) Growing an electron blocking layer on the active layer;

specifically, al is periodically grown in MOCVD _α Ga _1-α N layer and In _β Ga _1-β And the N layer is used as an electron blocking layer. Wherein, al _α Ga _1-α The growth temperature of the N layer is 950 ℃, the growth pressure is 300torr, and N is used ₂ And H ₂ The mixed gas of (2) as a carrier gas, TMGa as a Ga source, TMAl as an Al source, NH ₃ As the N source. In _β Ga _1-β The growth temperature of the N layer is 950 ℃, the growth pressure is 300torr, and N is used ₂ And H ₂ The mixed gas of (2) as a carrier gas, TMGa as a Ga source, TMIn as an In source, NH ₃ As an N source.

(11) Growing a P-type GaN layer on the electron blocking layer;

Comparative example 1

The present comparative example provides a light emitting diode epitaxial wafer, which is different from example 1 in that the active layer does not include the transition layer; accordingly, the production method does not include the step of producing the layer (i.e., step (6)), and the rest is the same as in example 1.

Comparative example 2

This comparative example provides a light emitting diode epitaxial wafer, which is different from example 1 In that the transition layer is In _x Ga _1-x N layers (x = 0.1); accordingly, the preparation method of the transition layer and In example 3 _x Ga _1-x The preparation method of the N layer is the same.

The epitaxial wafers obtained in the embodiments 1-3 and the comparative examples 1-2 are tested for the uniformity of luminescence, and then the epitaxial wafers are processed into 10 x 24mil LED chips with vertical structures, and the antistatic capability and brightness of the LED chips are tested;

the specific test method comprises the following steps:

(1) The prepared epitaxial wafer is measured by an IM-1130 type PL spectrometer for the light-emitting wavelengths of 1mA and 5mA, and then the difference of the light-emitting wavelengths is calculated to be used as the light-emitting uniformity.

(2) And (3) testing the antistatic property: testing the antistatic performance of the chip by using an electrostatic instrument under an HBM (human body discharge model) model, wherein the tested chip can bear the passing proportion of reverse 6000V static electricity;

(3) Brightness: testing the brightness of the obtained chip when the current of 120mA is introduced;

the specific test results are shown in the following table:

	wavelength uniformity (nm)	Luminance (mW)	Antistatic performance (6000V)
				Example 1	3.2	192.5	90.6％
Example 2	2.1	194.2	91.1％
				Example 3	1.9	196.8	91.3％
Comparative example 1	6.1	171.5	78.5％
				Comparative example 2	6.5	173.9	79.3％

As can be seen from the table, after the active layer provided by the invention is adopted, the wavelength uniformity, the brightness and the antistatic property of the epitaxial wafer are obviously improved.

While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.

Claims

1. A light-emitting diode epitaxial wafer is provided,the GaN-based semiconductor device is characterized by comprising a substrate, and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer which are sequentially grown on the substrate; the active layer is of a periodic structure, and the period number of the active layer is more than or equal to 2; each period comprises a potential well layer, a transition layer and a barrier layer which are sequentially stacked; the transition layer comprises WS ₂ And (3) a layer.

2. The light emitting diode epitaxial wafer of claim 1, wherein WS ₂ The thickness of the layer is 1-10nm.

3. The light emitting diode epitaxial wafer according to claim 1 or 2, wherein the transition layer comprises In stacked In sequence _x Ga _1-x N layer and WS ₂ A layer;

the well layer is In _y Ga _1-y N layers, x is less than y.

4. The light-emitting diode epitaxial wafer according to claim 3, wherein x is 0.01 to 0.3, y is 0.1 to 0.5;

said In _x Ga _1-x The thickness of the N layer is 0.1-3nm.

5. The light emitting diode epitaxial wafer as claimed in claim 1, wherein the thickness of the well layer is 2 to 5nm and the thickness of the barrier layer is 6 to 12nm.

6. A method for preparing a light emitting diode epitaxial wafer, which is used for preparing the light emitting diode epitaxial wafer as claimed in any one of claims 1 to 5, and comprises the following steps:

providing a substrate, and growing a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer on the substrate in sequence; the active layer is of a periodic structure, and each period comprises a potential well layer, a transition layer and a barrier layer which are sequentially stacked; the transition layer comprises WS ₂ And (3) a layer.

7. The method of claim 6The preparation method of the light emitting diode epitaxial wafer is characterized in that the first WS is ₂ The layer is grown by CVD at a growth temperature of 700-1000 deg.C; during growth, the molar ratio of the tungsten source to the sulfur source is 1 (1-3), and Ar and H are used ₂ A mixed gas of (2) as a carrier gas, and Ar and H ₂ Is 1: (1-5).

8. The method of claim 6, wherein the transition layer further comprises In _x Ga _1- _x A N layer, the potential well layer being In _y Ga _1-y N layers;

9. The method of claim 8, wherein In is _x Ga _1-x The growth temperature of the N layer is 800-850 ℃, and the growth temperature of the potential well layer is 700-800 ℃.

10. A light emitting diode comprising the light emitting diode epitaxial wafer according to any one of claims 1 to 5.