CN117457710A - Based on p-type Ga 2 O 3 Schottky diode and preparation method thereof - Google Patents
Based on p-type Ga 2 O 3 Schottky diode and preparation method thereof Download PDFInfo
- Publication number
- CN117457710A CN117457710A CN202310938602.0A CN202310938602A CN117457710A CN 117457710 A CN117457710 A CN 117457710A CN 202310938602 A CN202310938602 A CN 202310938602A CN 117457710 A CN117457710 A CN 117457710A
- Authority
- CN
- China
- Prior art keywords
- gallium oxide
- type
- layer
- lightly doped
- doped gallium
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 title claims description 23
- 238000002360 preparation method Methods 0.000 title claims description 17
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims abstract description 116
- 239000010410 layer Substances 0.000 claims abstract description 116
- 229910001195 gallium oxide Inorganic materials 0.000 claims abstract description 115
- 239000002184 metal Substances 0.000 claims abstract description 53
- 229910052751 metal Inorganic materials 0.000 claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 230000001590 oxidative effect Effects 0.000 claims abstract description 4
- 239000002344 surface layer Substances 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 28
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 24
- 238000000137 annealing Methods 0.000 claims description 12
- 239000007789 gas Substances 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 11
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 10
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 9
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 8
- 238000005516 engineering process Methods 0.000 claims description 8
- 230000003647 oxidation Effects 0.000 claims description 8
- 238000007254 oxidation reaction Methods 0.000 claims description 8
- 238000001259 photo etching Methods 0.000 claims description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims description 8
- 238000001704 evaporation Methods 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000008367 deionised water Substances 0.000 claims description 4
- 229910021641 deionized water Inorganic materials 0.000 claims description 4
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 claims description 4
- 238000001020 plasma etching Methods 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- 238000005566 electron beam evaporation Methods 0.000 claims description 2
- 230000008020 evaporation Effects 0.000 claims description 2
- 238000009472 formulation Methods 0.000 claims 6
- 239000000203 mixture Substances 0.000 claims 6
- 239000004065 semiconductor Substances 0.000 abstract description 6
- 229910002601 GaN Inorganic materials 0.000 description 11
- 239000000463 material Substances 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 7
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 5
- 230000002441 reversible effect Effects 0.000 description 5
- 229910001873 dinitrogen Inorganic materials 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910000480 nickel oxide Inorganic materials 0.000 description 2
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention relates to a p-type Ga-based semiconductor device 2 O 3 The schottky diode of (c) includes, from bottom to top: the device comprises a cathode ohmic metal layer, an n-type heavily doped gallium oxide substrate, an n-type lightly doped gallium oxide epitaxial layer, a p-type gallium oxide layer and an anode metal layer, wherein the p-type gallium oxide layer is distributed on the surface layer of the n-type lightly doped gallium oxide epitaxial layer, and the p-type gallium oxide layer is deposited in a groove structure of the gallium oxide epitaxial layer and forms a depletion region with the n-type lightly doped gallium oxide epitaxial layer; the p-type gallium oxide layer is prepared by growing GaN on gallium oxide and then oxidizing the GaN at a high temperature. The invention can improve the withstand voltage of the device, increase the power figure of merit of the device and reduce the power loss of the device, and can be used for preparing high-power gallium oxide deviceAnd (3) a piece.
Description
Technical Field
The invention relates to a p-type Ga-based device for preparing a high-power gallium oxide device 2 O 3 Schottky diode of (c)And a preparation method thereof, which belongs to the technical field of semiconductor materials and devices.
Background
Ga 2 O 3 Is an ultra-wide band-gap semiconductor material with 4.6-4.9eV, the theoretical breakdown field strength can reach 8MV/cm, and the theoretical breakdown field strength is approximately 250cm 2 Electron mobility of/v·s, theoretical value of barred plus can reach 3444, high breakdown voltage and conversion efficiency can be obtained simultaneously, and high quality bulk substrate can be obtained by mature and low cost melting method, thus Ga 2 O 3 The base device is a powerful competitor to high power devices and is a research hotspot in recent years.
Due to Ga 2 O 3 The material has very high electron affinity, has smaller conduction band minimum value in the energy level structure, is close to the Fermi energy level, is favorable for forming natural donor defects, and is easy to realize n-type doping, so Ga 2 O 3 The material can realize n-type doping with ideal conductivity and electron mobility. Currently Ga 2 O 3 10 can be realized by doping Si, ge, sn, F, cl and other atoms 15 -10 19 The effective n-type doping of the power is ideal and mature.
But Ga 2 O 3 P-type doping of materials is difficult to achieve. Due to Ga 2 O 3 The material has no acceptor with small activation energy, lower electron mobility and acceptor solubility, and smaller valence band maximum in the energy level structure, is far away from the Fermi level and is unfavorable for the formation of natural donor defects, thus, ga is used 2 O 3 It is difficult to achieve p-type doping with high mobility, and the absence of p-type doping limits Ga to a large extent 2 O 3 And (3) development of devices.
Gallium oxide power devices currently mainly include diodes, triodes, MOSFETs, etc., where the diodes mainly have schottky diodes and heterojunction pn diodes. Since gallium oxide has not yet been doped p-type with high mobility, other p-type semiconductor materials such as nickel oxide, copper oxide, tin oxide, in combination with n-type gallium oxide are currently used mainly to make heterojunction pn diodes. The resulting heterojunction pn diode typically has mobilityCopper oxide and tin oxide show relatively small band gap and chemical instability, nickel oxide shows relatively low hole mobility and unstable electrical property, so that the device has high power loss and can not fully exert Ga 2 O 3 High breakdown voltage and high power figure of merit of the material.
Therefore, there is a need for a device that can fully exert Ga 2 O 3 Ga with high breakdown voltage and high power figure of merit of material 2 O 3 A homojunction pn diode.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a semiconductor device based on p-type Ga 2 O 3 Schottky diode and preparation method thereof, ga of the invention 2 O 3 The base device has high withstand voltage and power figure of merit and low power loss.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
based on p-type Ga 2 O 3 The schottky diode of (c) includes, from bottom to top: the device comprises a cathode ohmic metal layer, an n-type heavily doped gallium oxide substrate, an n-type lightly doped gallium oxide epitaxial layer, a p-type gallium oxide layer and an anode metal layer, wherein the p-type gallium oxide layer is distributed on the surface layer of the n-type lightly doped gallium oxide epitaxial layer.
According to the invention, a p-type gallium oxide layer is deposited in the groove structure of the n-type lightly doped gallium oxide epitaxial layer, and forms a depletion region with the n-type lightly doped gallium oxide epitaxial layer.
According to the invention, the anode metal layer is covered on the n-type lightly doped gallium oxide epitaxial layer and the p-type gallium oxide layer, schottky contact is formed between the anode metal layer and the p-type gallium oxide layer, and ohmic contact is formed between the anode metal layer and the n-type lightly doped gallium oxide epitaxial layer.
According to the invention, the doping concentration of the n-type heavily doped gallium oxide substrate is preferably (1-5) x 10 18 cm -3 The doping concentration of the n-type lightly doped gallium oxide epitaxial layer is (1-5) multiplied by 10 16 cm -3 。
According to the invention, the p-type gallium oxide layer is prepared by growing GaN on the n-type lightly doped gallium oxide epitaxial layerHigh-temperature oxidation of GaN to obtain a cavity concentration of 10 16 cm -3 -10 17 cm -3 。
According to the invention, the thickness of the n-type heavily doped gallium oxide substrate is 600-700 mu m, the thickness of the n-type lightly doped gallium oxide epitaxial layer is 5-20 mu m, and the thickness of the p-type gallium oxide layer is 10-200 nm.
According to a preferred embodiment of the invention, the trench structure is a plurality of spaced apart trenches, each having a width of 0.2-0.8 μm and a depth of 1-4 μm.
A second object of the present invention is to provide the above p-type Ga-based semiconductor device 2 O 3 A method of fabricating a schottky diode.
Based on p-type Ga 2 O 3 The preparation method of the Schottky diode comprises the following steps:
1) Providing an n-type heavily doped gallium oxide substrate, and sequentially cleaning with acetone, isopropanol and deionized water;
2) Preparing an n-type lightly doped gallium oxide epitaxial layer on the cleaned gallium oxide substrate by using HVPE epitaxial growth;
3) By BCl 3 Ar is used as etching gas, and a plasma etching method is used for etching the n-type lightly doped gallium oxide epitaxial layer to form a groove structure;
4) Growing GaN with the thickness of 10nm-200nm in the groove structure by using methods such as epitaxial growth;
5) Placing the device obtained in the step 4) in N 2 、O 2 Mixed gas or N 2 Performing high-temperature oxidation in an O gas environment to obtain a nitrogen doped p-type gallium oxide layer on the groove structure, and then polishing;
6) Preparing a cathode metal pattern by using a photoresist by utilizing a photoetching technology; evaporating a cathode metal layer on an n-type heavily doped gallium oxide substrate by using a magnetron sputtering method, wherein the thickness of a first layer of Ti is 20-40nm, and the thickness of a second layer of Au metal is 100-300nm, so that ohmic contact is formed; annealing in nitrogen to obtain a cathode metal layer;
7) Preparing an anode metal pattern by using a photoresist by utilizing a photoetching technology; evaporating a metal layer on the upper layer of p-type gallium oxide by using a magnetron sputtering method, wherein the thickness of the first layer of metal Ni is 40-50nm, and the thickness of the second layer of metal Au is 200-300nm, so that ohmic contact is formed; and annealing in nitrogen to obtain an anode metal layer, thereby completing the preparation of the diode.
According to the preferred embodiment of the present invention, in step 4), gaN is grown on the (-201) or (100) gallium oxide surface; according to the lattice mismatch degree, gaN is grown on the gallium oxide (-201) surface of the groove structure, and the obtained diode has better performance than that of the diode obtained on the (100) surface.
According to a preferred embodiment of the invention, in step 5), the bond energy is determined by the bond energy value, in N 2 High-temperature oxidation is carried out in O gas, and the obtained diode is compared with N 2 、O 2 The mixed gas has better performance.
According to the invention, in step 5), the high-temperature oxidation temperature is 900-1100 ℃ and the time is 50-70min.
According to a preferred embodiment of the invention, in steps 6) and 7), the evaporation may be performed by magnetron sputtering or electron beam evaporation, and the annealing is performed by rapid annealing in nitrogen for 0.5-2 minutes at 400-550 ℃.
According to a preferred embodiment of the invention, the sequence of steps 1) to 5) is not reversible and the sequence of steps 6) to 7) is reversible.
Compared with the prior art, the invention has the following advantages:
1. the invention prepares p-type Ga on an n-type lightly doped gallium oxide epitaxial layer 2 O 3 A material capable of forming Ga therein 2 O 3 The homogeneous pn junction can effectively inhibit reverse leakage through the depletion action of the pn junction, thereby improving the withstand voltage of the device, greatly increasing the power figure of merit of the device, reducing the power loss of the device and making up for the lack of Ga in the prior art 2 O 3 The lack of a homojunction pn diode.
2. The preparation method of the invention can further increase the p-type Ga 2 O 3 Hole concentration method makes up for the existing lack of p-type Ga 2 O 3 The shortage of materials is expected to be applied to more Ga 2 O 3 In the base power device, the performance of the device is enhanced, the withstand voltage of the device is further improved, the power figure of merit is improved, and the loss is reduced.
3. The schottky diode with trench structure of the present invention has the limitation that the equipotential barrier lines tend to accumulate near the metal electrode rather than the substrate, resulting in early breakdown when the critical electric field is exceeded near the surface. The etching grooves can effectively deplete drift electrons in the reverse drift region, and the electric field of the drift region is uniformly distributed, so that the reverse blocking voltage can be effectively improved, and the method is used for preparing a high-power gallium oxide device.
Drawings
Fig. 1 is a schematic diagram of a schottky diode structure according to the present invention.
Fig. 2 is a schematic flow chart of a schottky diode manufacturing process according to the present invention.
Detailed Description
The schottky diode structure and fabrication process of the present invention are described in further detail below with reference to the accompanying drawings.
Example 1
Based on p-type Ga 2 O 3 The structure of the schottky diode of (1) is as shown in fig. 1, and the schottky diode comprises from bottom to top: the device comprises a cathode ohmic metal layer, an n-type heavily doped gallium oxide substrate, an n-type lightly doped gallium oxide epitaxial layer, a p-type gallium oxide layer and an anode metal layer, wherein the p-type gallium oxide layer is distributed on the surface layer of the n-type lightly doped gallium oxide epitaxial layer.
n-type heavily doped gallium oxide substrate with doping concentration of about 10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the n-type lightly doped gallium oxide epitaxial layer with doping concentration of about 10 16 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the A p-type gallium oxide layer having a hole concentration of about 10 16 cm -3 -10 17 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The p-type gallium oxide layer is deposited in the groove structure of the gallium oxide epitaxial layer and forms a depletion region with the n-type lightly doped gallium oxide epitaxial layer; the anode metal is in Schottky contact with the p-type gallium oxide, and ohmic contact is formed between the anode metal and the gallium oxide epitaxial layer;
based on p-type Ga 2 O 3 The preparation method of the Schottky diode comprises the following steps:
step 1: preparation of 650 μm thick, doping concentration 10 18 cm -3 Is a gallium oxide substrate of (a).
The doping concentration is about 10 18 cm -3 And sequentially acetone, isopropyl alcohol, deionized water cleaning as shown in fig. 2 (a);
step 2: preparation of a 10 μm thick, doping concentration 10 μm on a gallium oxide substrate 16 cm -3 Gallium oxide epitaxial layer of (a).
Preparation of doping concentration of about 10 on gallium oxide substrate using HVPE epitaxial growth 16 cm -3 As shown in fig. 2 (b);
step 3: an etching process is used to form the trench structure.
By BCl 3 And Ar is used as etching gas, a plasma etching method is used for etching the gallium oxide drift layer to form a required groove structure, the groove structure is 0.5 mu m in width and 2 mu m in depth, and a plurality of groove structures are arranged at certain intervals, as shown in the figure 2 (c);
step 4: gallium nitride is grown on the trench structure.
Growing GaN with the thickness of 50nm on the gallium oxide (100) surface of the groove structure by using an epitaxial growth method and the like, as shown in fig. 2 (d);
step 5: high temperature oxidation of gallium nitride to produce p-type gallium oxide 50nm thick.
Placing a structure with gallium nitride on N 2 And O 2 Oxidizing at high temperature in a gas environment at 1000 ℃ for 60min to obtain nitrogen doped p-type gallium oxide on the groove structure, and then further polishing to obtain a required structure, as shown in fig. 2 (e);
step 6: and manufacturing cathode ohmic metal.
Preparing a cathode metal pattern by using a photoresist by utilizing a photoetching technology; plating two layers of cathode metals of Ti and Au on the lower layer of the gallium oxide substrate by using a magnetron sputtering method, wherein the thickness of the first layer of Ti is 20nm, and the thickness of the second layer of Au is 100nm, so that ohmic contact is formed; then, rapidly annealing for 1 minute in a nitrogen gas environment at 550 ℃ to obtain a cathode metal layer, as shown in fig. 2 (f);
step 7: and manufacturing anode metal.
Preparing a required anode metal pattern by using a photoresist by utilizing a photoetching technology; plating Ni and Au on the upper layer of the p-type gallium oxide and gallium oxide epitaxial layer by using a magnetron sputtering method, wherein the thickness of the first layer of metal Ni is 45nm, the thickness of the second layer of metal Au is 200nm, and then rapidly annealing for about 1 minute in a nitrogen gas environment at 550 ℃; ohmic contact is formed on the p-type gallium oxide, schottky contact is formed on the gallium oxide epitaxial layer, and an anode metal layer is obtained, as shown in fig. 2 (g), so that diode preparation is completed.
Example 2
Based on p-type Ga 2 O 3 The schottky diode of (c) was constructed as in example 1.
Based on p-type Ga 2 O 3 The preparation method of the Schottky diode comprises the following steps:
step 1: the thickness of 650 mu m is selected and the doping concentration is 10 18 cm -3 Is a gallium oxide substrate of (a).
A certain thickness is selected, and the doping concentration is about 10 18 cm -3 Sequentially cleaning the gallium oxide substrate with acetone, isopropanol and deionized water;
step 2: preparation of a 10 μm thick, doping concentration 10 μm on a gallium oxide substrate 16 cm -3 Gallium oxide epitaxial layer of (a).
Using HVPE epitaxial growth or other methods to prepare a thickness, doping concentration of about 10, on a gallium oxide substrate 16 cm -3 Gallium oxide epitaxial layer of (a);
step 3: an etching process is used to form the trench structure.
By BCl 3 Ar is used as etching gas, a plasma etching method is used for etching the gallium oxide drift layer to form a required groove structure, and the groove structure is 0.5 mu m in width and 2 mu m in depth and is formed in a plurality of grooves at certain intervals;
step 4: gallium nitride is grown on the trench structure.
Growing GaN with the thickness of 150nm on the gallium oxide (-201) surface of the groove structure by using methods such as epitaxial growth;
step 5: high temperature oxidation of gallium nitride to prepare 150nm thick p-type gallium oxide.
Placing a structure with gallium nitride on N 2 Oxidizing at 900-1100 deg.C for 60min under O gas environment to obtain nitrogen on the groove structureDoped p-type gallium oxide, and then further polishing to obtain a required structure;
step 6: and manufacturing cathode ohmic metal.
Preparing a cathode metal pattern by using a photoresist by utilizing a photoetching technology; plating two layers of cathode metals of Ti and Au on the lower layer of the gallium oxide substrate by using a magnetron sputtering method, wherein the thickness of the first layer of Ti is 40nm, and the thickness of the second layer of Au is 200nm, so that ohmic contact is formed; then, rapidly annealing for 1 minute in a nitrogen gas environment at 550 ℃ to obtain a cathode metal layer;
step 7: and manufacturing anode metal.
Preparing a required anode metal pattern by using a photoresist by utilizing a photoetching technology; plating Ni and Au on the upper layer of the p-type gallium oxide and gallium oxide epitaxial layer by using a magnetron sputtering method, wherein the thickness of the first layer of metal Ni is 50nm, the thickness of the second layer of metal Au is 300nm, and then rapidly annealing for about 1 minute in a nitrogen gas environment at 550 ℃; ohmic contact is formed on the p-type gallium oxide, schottky contact is formed on the gallium oxide epitaxial layer, and an anode metal layer is obtained, so that diode preparation is completed.
The above are merely examples of the present invention and do not constitute any limitation of the present invention. It will be apparent to those skilled in the art that various modifications and changes in form and details may be made without departing from the principles and construction of the invention, but these modifications and changes based on the spirit of the invention are still within the scope of the appended claims. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. Based on p-type Ga 2 O 3 The schottky diode of (c) includes, from bottom to top: the device comprises a cathode ohmic metal layer, an n-type heavily doped gallium oxide substrate, an n-type lightly doped gallium oxide epitaxial layer, a p-type gallium oxide layer and an anode metal layer, wherein the p-type gallium oxide layer is distributed on the surface layer of the n-type lightly doped gallium oxide epitaxial layer.
2. The p-type Ga-based formulation of claim 1 2 O 3 The Schottky diode is characterized in that a p-type gallium oxide layer is deposited in a groove structure of an n-type lightly doped gallium oxide epitaxial layer, and a depletion region is formed between the p-type gallium oxide layer and the n-type lightly doped gallium oxide epitaxial layer.
3. The p-type Ga-based formulation of claim 1 2 O 3 The Schottky diode is characterized in that the anode metal layer covers the n-type lightly doped gallium oxide epitaxial layer and the p-type gallium oxide layer, schottky contact is formed between the anode metal layer and the p-type gallium oxide layer, and ohmic contact is formed between the anode metal layer and the n-type lightly doped gallium oxide epitaxial layer.
4. The p-type Ga-based formulation of claim 1 2 O 3 The Schottky diode is characterized in that the doping concentration of the n-type heavily doped gallium oxide substrate is (1-5) ×10 18 cm -3 The doping concentration of the n-type lightly doped gallium oxide epitaxial layer is (1-5) multiplied by 10 16 cm -3 。
5. The p-type Ga-based formulation of claim 1 2 O 3 The Schottky diode is characterized in that the p-type gallium oxide layer is prepared by growing GaN on an n-type lightly doped gallium oxide epitaxial layer and then oxidizing the GaN at high temperature, wherein the hole concentration is 10 16 cm -3 -10 17 cm -3 。
6. The p-type Ga-based formulation of claim 1 2 O 3 The Schottky diode is characterized in that the thickness of an n-type heavily doped gallium oxide substrate is 600-700 mu m, the thickness of an n-type lightly doped gallium oxide epitaxial layer is 5-20 mu m, and the thickness of a p-type gallium oxide layer is 10-200 nm.
7. The p-type Ga-based formulation of claim 1 2 O 3 The schottky diode of (c) is characterized in that the trench structure is a plurality of spaced trenches, each trench having a width of 0.2-0.8 μm and a depth of 1-4 μm.
8. The base of claim 1P-type Ga 2 O 3 The preparation method of the Schottky diode comprises the following steps:
1) Providing an n-type heavily doped gallium oxide substrate, and sequentially cleaning with acetone, isopropanol and deionized water;
2) Preparing an n-type lightly doped gallium oxide epitaxial layer on the cleaned gallium oxide substrate by using HVPE epitaxial growth;
3) By BCl 3 Ar is used as etching gas, and a plasma etching method is used for etching the n-type lightly doped gallium oxide epitaxial layer to form a groove structure;
4) Growing GaN with the thickness of 10nm-200nm in the groove structure by using methods such as epitaxial growth;
5) Placing the device obtained in the step 4) in N 2 、O 2 Mixed gas or N 2 Performing high-temperature oxidation in an O gas environment to obtain a nitrogen doped p-type gallium oxide layer on the groove structure, and then polishing;
6) Preparing a cathode metal pattern by using a photoresist by utilizing a photoetching technology; evaporating a cathode metal layer on an n-type heavily doped gallium oxide substrate by using a magnetron sputtering method, wherein the thickness of a first layer of Ti is 20-40nm, and the thickness of a second layer of Au metal is 100-300nm, so that ohmic contact is formed; annealing in nitrogen to obtain a cathode metal layer;
7) Preparing an anode metal pattern by using a photoresist by utilizing a photoetching technology; evaporating a metal layer on the upper layer of p-type gallium oxide by using a magnetron sputtering method, wherein the thickness of the first layer of metal Ni is 40-50nm, and the thickness of the second layer of metal Au is 200-300nm, so that ohmic contact is formed; and annealing in nitrogen to obtain an anode metal layer, thereby completing the preparation of the diode.
9. The method according to claim 8, wherein in step 4), gaN is grown on gallium oxide (-201) or (100) plane; according to the lattice mismatch degree, gaN is grown on the gallium oxide (-201) surface of the groove structure, and the obtained diode has better performance than that of the diode obtained on the (100) surface.
10. The method according to claim 8, wherein in step 5), the high-temperature oxidation temperature is 900-1100 ℃ for 50-70min, and in step 6) and 7), the evaporation can be performed by magnetron sputtering or electron beam evaporation, and the annealing is rapid annealing in nitrogen for 0.5-2 min at 400-550 ℃.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310938602.0A CN117457710A (en) | 2023-07-28 | 2023-07-28 | Based on p-type Ga 2 O 3 Schottky diode and preparation method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310938602.0A CN117457710A (en) | 2023-07-28 | 2023-07-28 | Based on p-type Ga 2 O 3 Schottky diode and preparation method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
CN117457710A true CN117457710A (en) | 2024-01-26 |
Family
ID=89593558
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202310938602.0A Pending CN117457710A (en) | 2023-07-28 | 2023-07-28 | Based on p-type Ga 2 O 3 Schottky diode and preparation method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN117457710A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN118073402A (en) * | 2024-04-19 | 2024-05-24 | 无锡松煜科技有限公司 | Gallium oxide SBD device and preparation method thereof |
-
2023
- 2023-07-28 CN CN202310938602.0A patent/CN117457710A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN118073402A (en) * | 2024-04-19 | 2024-05-24 | 无锡松煜科技有限公司 | Gallium oxide SBD device and preparation method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2018150451A1 (en) | Power semiconductor device | |
WO2018010545A1 (en) | Silicon carbide power device employing heterojunction termination, and manufacturing method thereof | |
CN107978642B (en) | GaN-based heterojunction diode and preparation method thereof | |
CN110112207B (en) | Gallium oxide-based mixed PiN Schottky diode and preparation method thereof | |
CN111384171B (en) | High-channel mobility vertical UMOSFET device and preparation method thereof | |
CN114899227A (en) | Enhanced gallium nitride-based transistor and preparation method thereof | |
CN108711578A (en) | A kind of part p-type GaN cap RESURF GaN base Schottky-barrier diodes | |
CN111081763B (en) | Normally-off HEMT device with honeycomb groove barrier layer structure below field plate and preparation method thereof | |
JP2013140974A (en) | Power element and manufacturing method therefore | |
CN117457710A (en) | Based on p-type Ga 2 O 3 Schottky diode and preparation method thereof | |
CN110137244B (en) | Vertical-structure HEMT device with GaN-based self-supporting substrate and preparation method | |
CN109950323A (en) | The III group-III nitride diode component and preparation method thereof for the superjunction that polarizes | |
CN116581151B (en) | Low-turn-on voltage gallium oxide Schottky diode and preparation method thereof | |
CN108206220B (en) | Preparation method of diamond Schottky diode | |
CN116314349B (en) | GaN-based power Schottky diode with P-type two-dimensional material intercalation and preparation process thereof | |
CN110534582B (en) | Fast recovery diode with composite structure and manufacturing method thereof | |
CN108649075A (en) | RESURF GaN base Schottky-barrier diodes based on field plate and p-type AlGaN cap layers | |
CN116504805A (en) | High electron mobility transistor with vertical AlGaN/GaN structure and preparation method thereof | |
CN116344625A (en) | Gallium oxide rectifier and manufacturing process thereof, gallium oxide rectifier structure and manufacturing process thereof | |
CN115863446A (en) | GaN-based heterojunction diode and preparation method thereof | |
CN113658859B (en) | Preparation method of gallium nitride power device | |
CN117497590A (en) | Based on p-type Ga 2 O 3 MOSFET device and method of making same | |
CN111681958A (en) | Method for preparing normally-off HEMT device by novel heterostructure magnesium diffusion | |
CN118198149B (en) | Gallium nitride Schottky diode based on energy band regulation junction terminal and preparation method thereof | |
CN117219666B (en) | Gallium oxide heterogeneous thyristor with double trigger gate electrodes and preparation method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |