CN116349010A - 半导体封装空腔中的电子装置 - Google Patents
半导体封装空腔中的电子装置 Download PDFInfo
- Publication number
- CN116349010A CN116349010A CN202180049887.1A CN202180049887A CN116349010A CN 116349010 A CN116349010 A CN 116349010A CN 202180049887 A CN202180049887 A CN 202180049887A CN 116349010 A CN116349010 A CN 116349010A
- Authority
- CN
- China
- Prior art keywords
- semiconductor
- cavity
- die
- rdl
- conductive terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/124—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed the encapsulations having cavities other than that occupied by chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/04—Manufacture or treatment of leadframes
- H10W70/041—Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/411—Chip-supporting parts, e.g. die pads
- H10W70/417—Bonding materials between chips and die pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/464—Additional interconnections in combination with leadframes
- H10W70/465—Bumps or wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/016—Manufacture or treatment using moulds
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/811—Multiple chips on leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
- H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/66—Conductive materials thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/69—Insulating materials thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/221—Structures or relative sizes
- H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
- H10W72/859—Bump connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/001,429 US11942386B2 (en) | 2020-08-24 | 2020-08-24 | Electronic devices in semiconductor package cavities |
| US17/001,429 | 2020-08-24 | ||
| PCT/US2021/047047 WO2022046579A1 (en) | 2020-08-24 | 2021-08-23 | Electronic devices in semiconductor package cavities |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116349010A true CN116349010A (zh) | 2023-06-27 |
Family
ID=80271040
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202180049887.1A Pending CN116349010A (zh) | 2020-08-24 | 2021-08-23 | 半导体封装空腔中的电子装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US11942386B2 (enExample) |
| JP (1) | JP2023539243A (enExample) |
| CN (1) | CN116349010A (enExample) |
| WO (1) | WO2022046579A1 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4156253A1 (en) * | 2021-09-22 | 2023-03-29 | Infineon Technologies Austria AG | Resin encapsulated semiconductor package comprising an external recess with exposed electrical contacts and a semiconductor module using the same |
| KR102886060B1 (ko) * | 2022-11-22 | 2025-11-12 | 앱솔릭스 인코포레이티드 | 패키징 기판 및 이를 포함하는 반도체 패키지 |
| US20240234356A1 (en) * | 2023-01-05 | 2024-07-11 | Texas Instruments Incorporated | Conductive member with metal core for substrate connections |
| US12476173B2 (en) * | 2023-04-28 | 2025-11-18 | Texas Instruments Incorporated | Electronic device with post mold plated nickel tungsten and tin bilayer for improved board level reliability |
Family Cites Families (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08134212A (ja) * | 1994-11-14 | 1996-05-28 | Hitachi Ltd | 配線構造体とその製造法 |
| JP2004172157A (ja) * | 2002-11-15 | 2004-06-17 | Shinko Electric Ind Co Ltd | 半導体パッケージおよびパッケージスタック半導体装置 |
| JP3929966B2 (ja) * | 2003-11-25 | 2007-06-13 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| US7354800B2 (en) * | 2005-04-29 | 2008-04-08 | Stats Chippac Ltd. | Method of fabricating a stacked integrated circuit package system |
| TW200917431A (en) * | 2007-10-05 | 2009-04-16 | Advanced Semiconductor Eng | Stacked-type chip package structure and method of fabricating the same |
| JP4912275B2 (ja) * | 2007-11-06 | 2012-04-11 | 新光電気工業株式会社 | 半導体パッケージ |
| US7709944B2 (en) * | 2007-12-18 | 2010-05-04 | Stats Chippac Ltd. | Integrated circuit package system with package integration |
| JP5026400B2 (ja) * | 2008-12-12 | 2012-09-12 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| US20100327419A1 (en) * | 2009-06-26 | 2010-12-30 | Sriram Muthukumar | Stacked-chip packages in package-on-package apparatus, methods of assembling same, and systems containing same |
| US8263434B2 (en) * | 2009-07-31 | 2012-09-11 | Stats Chippac, Ltd. | Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP |
| JP2014150213A (ja) * | 2013-02-04 | 2014-08-21 | Fujitsu Semiconductor Ltd | 半導体装置及び半導体装置の製造方法 |
| US9334971B2 (en) * | 2013-03-13 | 2016-05-10 | Kohler Co. | Universal valve body |
| US20140264808A1 (en) * | 2013-03-15 | 2014-09-18 | Andreas Wolter | Chip arrangements, chip packages, and a method for manufacturing a chip arrangement |
| US20150069537A1 (en) * | 2013-09-08 | 2015-03-12 | Wai Yew Lo | Package-on-package semiconductor sensor device |
| KR20160103394A (ko) * | 2015-02-24 | 2016-09-01 | 에스케이하이닉스 주식회사 | 반도체 패키지 |
| JP6639141B2 (ja) * | 2015-08-05 | 2020-02-05 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
| US9601461B2 (en) * | 2015-08-12 | 2017-03-21 | Semtech Corporation | Semiconductor device and method of forming inverted pyramid cavity semiconductor package |
| SG10201913140RA (en) * | 2016-03-21 | 2020-03-30 | Agency Science Tech & Res | Semiconductor package and method of forming the same |
| CN107611099B (zh) | 2016-07-12 | 2020-03-24 | 晟碟信息科技(上海)有限公司 | 包括多个半导体裸芯的扇出半导体装置 |
| US9831215B1 (en) * | 2016-08-03 | 2017-11-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor package and forming method thereof |
| US10096552B2 (en) * | 2017-01-03 | 2018-10-09 | Samsung Electro-Mechanics Co., Ltd. | Fan-out semiconductor package |
| KR101872644B1 (ko) * | 2017-06-05 | 2018-06-28 | 삼성전기주식회사 | 팬-아웃 반도체 장치 |
| US10685909B2 (en) | 2017-11-17 | 2020-06-16 | Infineon Technologies Ag | Power package having multiple mold compounds |
| CN111712907A (zh) | 2018-02-09 | 2020-09-25 | 迪德鲁科技(Bvi)有限公司 | 制造具有无载体模腔的扇出型封装的方法 |
| JP2019149507A (ja) * | 2018-02-28 | 2019-09-05 | 東芝メモリ株式会社 | 半導体装置及びその製造方法 |
| KR102589684B1 (ko) * | 2018-12-14 | 2023-10-17 | 삼성전자주식회사 | 반도체 패키지 |
| US10777531B2 (en) * | 2018-12-28 | 2020-09-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package contact structure, semiconductor package and manufacturing method thereof |
| US12176285B2 (en) | 2018-12-31 | 2024-12-24 | Texas Instruments Incorporated | Transformer guard trace |
| US11456268B2 (en) * | 2019-01-21 | 2022-09-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package and manufacturing method thereof |
-
2020
- 2020-08-24 US US17/001,429 patent/US11942386B2/en active Active
-
2021
- 2021-08-23 WO PCT/US2021/047047 patent/WO2022046579A1/en not_active Ceased
- 2021-08-23 JP JP2023513289A patent/JP2023539243A/ja active Pending
- 2021-08-23 CN CN202180049887.1A patent/CN116349010A/zh active Pending
-
2024
- 2024-03-26 US US18/617,517 patent/US12255115B2/en active Active
-
2025
- 2025-03-18 US US19/083,217 patent/US20250218886A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JP2023539243A (ja) | 2023-09-13 |
| US20220059423A1 (en) | 2022-02-24 |
| US11942386B2 (en) | 2024-03-26 |
| US20240234231A1 (en) | 2024-07-11 |
| WO2022046579A1 (en) | 2022-03-03 |
| US12255115B2 (en) | 2025-03-18 |
| US20250218886A1 (en) | 2025-07-03 |
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| PB01 | Publication | ||
| PB01 | Publication | ||
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| SE01 | Entry into force of request for substantive examination |