CN1159619A - 改进计时器性能的集成电路输入/输出处理器 - Google Patents

改进计时器性能的集成电路输入/输出处理器 Download PDF

Info

Publication number
CN1159619A
CN1159619A CN96121310A CN96121310A CN1159619A CN 1159619 A CN1159619 A CN 1159619A CN 96121310 A CN96121310 A CN 96121310A CN 96121310 A CN96121310 A CN 96121310A CN 1159619 A CN1159619 A CN 1159619A
Authority
CN
China
Prior art keywords
passage
timer
bus
pin
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN96121310A
Other languages
English (en)
Chinese (zh)
Inventor
沃奥·博纳德·高勒
格日·林恩·米勒
大卫·里沃拉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of CN1159619A publication Critical patent/CN1159619A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Electronic Switches (AREA)
  • Measurement Of Unknown Time Intervals (AREA)
CN96121310A 1995-11-13 1996-11-12 改进计时器性能的集成电路输入/输出处理器 Pending CN1159619A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US555,456 1995-11-13
US08/555,456 US5634045A (en) 1995-11-13 1995-11-13 Integrated circuit input/output processor having improved timer capability

Publications (1)

Publication Number Publication Date
CN1159619A true CN1159619A (zh) 1997-09-17

Family

ID=24217325

Family Applications (1)

Application Number Title Priority Date Filing Date
CN96121310A Pending CN1159619A (zh) 1995-11-13 1996-11-12 改进计时器性能的集成电路输入/输出处理器

Country Status (6)

Country Link
US (1) US5634045A (cg-RX-API-DMAC7.html)
EP (1) EP0773491A3 (cg-RX-API-DMAC7.html)
JP (1) JPH09146779A (cg-RX-API-DMAC7.html)
KR (1) KR100459738B1 (cg-RX-API-DMAC7.html)
CN (1) CN1159619A (cg-RX-API-DMAC7.html)
TW (1) TW309603B (cg-RX-API-DMAC7.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111540388A (zh) * 2019-01-22 2020-08-14 爱思开海力士有限公司 半导体存储器

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5812833A (en) * 1995-11-13 1998-09-22 Motorola, Inc. Timer bus structure for an integrated circuit
US6233636B1 (en) 1998-12-03 2001-05-15 International Business Machines Corporation Method and system for allowing PCI bus transactions to be performed at higher operating frequencies
GB2369751A (en) * 2000-11-30 2002-06-05 Nokia Mobile Phones Ltd Communication of data
US7024579B2 (en) * 2002-08-27 2006-04-04 Stmicroelectronics S.R.L. Configurable timing system having a plurality of timing units interconnected via software programmable registers
JP4994254B2 (ja) * 2007-03-08 2012-08-08 ルネサスエレクトロニクス株式会社 データプロセッサ及び制御システム
US11366488B1 (en) 2021-05-20 2022-06-21 Nxp Usa, Inc. Timer for use in an asymmetric mutli-core system
CN115047852A (zh) * 2022-06-16 2022-09-13 神龙汽车有限公司 一种车辆软件刷写方法和系统

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06103507B2 (ja) * 1984-11-02 1994-12-14 株式会社日立製作所 パルス入出力プロセッサ及びそれを用いたマイクロコンピュータ
US5042005A (en) * 1988-08-19 1991-08-20 Motorola, Inc. Timer channel with match recognition features
US5117498A (en) * 1988-08-19 1992-05-26 Motorola, Inc. Processer with flexible return from subroutine
US4942522A (en) * 1988-08-19 1990-07-17 Motorola, Inc. Timer channel with multiple timer reference features
US5129078A (en) * 1988-08-19 1992-07-07 Groves Stanley E Dedicated service processor with inter-channel communication features
US4952367A (en) * 1988-08-19 1990-08-28 Motorola, Inc. Timer channel for use in a multiple channel timer system
US4926319A (en) * 1988-08-19 1990-05-15 Motorola Inc. Integrated circuit timer with multiple channels and dedicated service processor
US5535376A (en) * 1993-05-18 1996-07-09 Motorola, Inc. Data processor having a timer circuit for performing a buffered pulse width modulation function and method therefor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111540388A (zh) * 2019-01-22 2020-08-14 爱思开海力士有限公司 半导体存储器
CN111540388B (zh) * 2019-01-22 2023-09-08 爱思开海力士有限公司 半导体存储器

Also Published As

Publication number Publication date
JPH09146779A (ja) 1997-06-06
KR970028966A (ko) 1997-06-26
KR100459738B1 (ko) 2005-04-19
TW309603B (cg-RX-API-DMAC7.html) 1997-07-01
EP0773491A2 (en) 1997-05-14
EP0773491A3 (en) 1998-11-04
US5634045A (en) 1997-05-27

Similar Documents

Publication Publication Date Title
CN1153155C (zh) 装有高效利用主处理器中的寄存器数据的协处理器的信息处理装置
CN1270247C (zh) 总线仿真设备
CN1118984C (zh) 高速分组传输网络的可编程线路适配器和数据分组缓存方法
CN1272946C (zh) 可伸缩的网络处理器及操作该网络处理器的方法和装置
CN1122978A (zh) 异步传递方式(atm)交换装置
CN1240005C (zh) 将生产测试接口接至全局串行总线的方法和装置
CN1154331C (zh) 发送系统中的接收接口单元
CN1086521C (zh) 减小时钟信号和数据信号间失真的集成电路、系统和方法
CN1916961A (zh) 可中断图形处理单元及其控制方法
CN1916962A (zh) 存储和回存状态上下文在图形处理单元的方法和装置
CN1184387A (zh) 同步数字系列传输系统中接收指针处理装置
CN1059225A (zh) 用于结构运算的运算单元
CN1070497A (zh) 双向并行协议
CN1761184A (zh) 高速时钟和数据恢复系统
CN1402259A (zh) 校准方法和存储系统
CN1129382A (zh) 用于在局部区域跟踪图象的跟踪装置
CN1753308A (zh) 编码装置和解码装置
CN1273902C (zh) 调试系统,微处理器,以及调试器
CN1534504A (zh) 利用单处理器操作系统的并行处理系统及并行处理程序
CN1159619A (zh) 改进计时器性能的集成电路输入/输出处理器
CN1532810A (zh) 音频译码设备
CN1912926A (zh) 可中断图形处理单元处理多个程序的方法和图形处理单元
CN1624611A (zh) 可编程控制器、通信单元、变量解决方法和数据交接方法
CN1284180A (zh) 利用布尔逻辑和可编程结构进行地址分析的方法和装置
CN1196268C (zh) 并行涡轮编码器实施方案

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C01 Deemed withdrawal of patent application (patent law 1993)
WD01 Invention patent application deemed withdrawn after publication