CN115427895A - 在基底系统之间转移对准标记的方法和系统 - Google Patents

在基底系统之间转移对准标记的方法和系统 Download PDF

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CN115427895A
CN115427895A CN202180029598.5A CN202180029598A CN115427895A CN 115427895 A CN115427895 A CN 115427895A CN 202180029598 A CN202180029598 A CN 202180029598A CN 115427895 A CN115427895 A CN 115427895A
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substrate
semiconductor device
alignment
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大卫·忠·多恩
吉森小川
野崎松本
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SEMILEDS CORP
Shin Etsu Chemical Co Ltd
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Abstract

一种用于在基底系统之间转移对准标记的方法包括提供具有半导体器件和与半导体器件精确对准的对准标记的基底;以及将半导体器件和对准标记实体的转移并结合到第一基底系统的临时基底。该方法还可以包括将半导体器件和对准标记实体的转移和结合到第二基底系统的质量转移基底;以及将半导体器件和对准标记实体的转移和结合到第三基底系统的电路基底。用于在基底系统之间传送对准标记的系统包括具有半导体器件的基底和与半导体器件精确对准的对准标记。该系统还包括第一基底系统,并且可以包括第二基底系统和第三基底系统。

Description

在基底系统之间转移对准标记的方法和系统
相关申请案件的交叉引用
本申请要求2020年5月11日提交的美国临时第63/022,579号的优先权,该申请案件以引用的方式并入本文。
技术领域
本公开涉及半导体器件的制造,尤其涉及在基质上制造半导体器件期间利用对准标记的方法和系统。
背景技术
在半导体制造技术中,存在半导体制造过程中使用对准标记的技术。这些制造过程包括电气测量、基底检查和芯片定位。通常,对准标记用于需要精确对准的工艺步骤,例如光刻和管芯放置。
通常对准标记的形成是使用光刻法刻在基底上。图1示出了用于在基底10的侧面形成对准标记20a、20b的示例性现有技术系统8。如图1所示,系统8包括基底10、芯片卡盘12和X-Y台18。对准标记显微镜16a、16b中的图14a、14b用于使用光刻在基底10上形成对准标记20a、20b。
图2A-2D示意性地示出了示例性现有技术对准标记。图2A示出了在基底10上配置为特征11S的对准标记。图2B示出了在掩模13上配置为特征11M的对准标记。图2C示出了基底10上的掩模13,基底10上的特征11S与掩模13上的特征11M对齐,图2D示出了印刷在基底10上的对准标记,其成为印刷特征11P。
图3A-3C和图4A-4C示出了现有技术的掩模对准系统22,其包括用于保持基底34的芯片卡盘24、对准掩模26和BSA分裂场显微镜28。如图3A和4A所示,系统22可以配置用于掩模对准标记30的聚焦和存储。如图3B和4B所示,系统22可以配置用于基底对准标记32的聚焦。如图3C和4C所示,系统已经实现掩模对准标记30和基底对准标记32之间的对准。
另一种对准方法使用与对准标记的电连接。然而,这种方法不适用于超硬基底、难以蚀刻的基底或对化学敏感的基底,例如蓝宝石、氮化铝和砷化镓。
通常如果两个不同的基底需要对齐,则将对齐标记放置在仅靠近但不完全位于需要对齐的点的位置。这种技术大大降低了为将来的处理步骤进行精确对齐的能力。例如,当需要在基底之间转移标记时,将基底堆栈并在其中一个或两个基底透明的情况下进行光刻。虽然可以使用基底两侧的照相机来对齐背板的对齐标记,但需要昂贵的步进工具。此外,这种技术需要高水平的技能、精密的工具,而且成本很高。
另一种现有技术是将器件从一个基底转移到另一个基底通过在承载器件的基底上沉积或蚀刻来制造对准键。在这种情况下,第二基底可以包括它自己的对准标记或根本不包括对准标记。然而,当在不同的基底上使用对准键时,例如堆栈芯片或具有多层的器件,可能会出现问题。例如,用于3D集成系统和电路的传质器件的制造通常需要在许多不同的基底和许多不同的位置上完成工作。随着公差的减小,必须进行精确对准和定位。这可能很难单独使用光刻技术来完成。随着芯片尺寸达到低于150μm的水平,半导体器件的整个前端、后端和封装(或传质)所需的精度和准确度变得更加难以实现。
本公开针对一种用于在基底系统之间转移对准标记的方法和系统,该方法和系统可以在整个制造过程中使用,包括在半导体器件的后端和封装处,而无需每次将基底转移到不同的基底系统时重新校准.
发明内容
一种用于在基底系统之间转移对准标记的方法包括提供基底的步骤,该基底包括多个半导体器件和与半导体器件精确对准的多个对准标记。对准标记包括使用可以在基底系统之间实体转移的半导体制造技术形成的实体结构。在说明性实施例中,基底包括具有形成半导体器件和对准标记的外延结构的半导体基底。对准标记可以包括使用半导体制造技术在基底上形成的外延结构、沉积材料或其组合的部分,半导体基底除外,基底可以包括被配置用于承载半导体器件的载体基底。
该方法还包括提供第一基底系统的步骤,该第一基底系统包括其上具有粘合剂层的临时基底,该方法还包括将半导体器件和对准标记实体的转移和结合到第一基底系统的临时基底的步骤。
该方法还包括将基底与第一基底系统分离的步骤,将半导体器件和对准标记留在临时基底上,同时保持半导体器件和对准标记之间的精确对准。该方法还可以包括将半导体器件和对准标记实体的转移和结合到第二基底系统,同时保持半导体器件和对准标记之间的精确对准的步骤。在说明性实施例中,第二基底系统包括具有粘合剂层的传质基底。
该方法还可以包括提供第三基底系统的步骤,该第三基底系统包括具有多个电路的电路基底和在与电路对准的电路基底的任一侧上的多个电路对准标记。该方法还可以包括以下步骤:让第二基底系统的传质基底与第三基底系统的电路基底达成实体接触,再将对准标记物理地转移和结合到电路基底,以及分离传质基底,留下电路基底、半导体器件和一侧的对准标记,同时保持半导体器件和对准标记之间的精确对准。
该方法还可以包括使用诸如蚀刻和沈积导体的半导体制造过程进一步处理第三基底系统上的半导体器件的步骤。在这些制造过程中,转移的对准标记和电路基底上的电路对准标记保持与半导体器件的精确对准。
一种用于在基底系统之间传送对准标记的系统包括基底,该基底包括多个半导体器件和与半导体器件精确对准的多个对准标记。对准标记包括可以在基底系统之间实体转移的结构,该系统还包括第一基底系统,该系统包括其上具有粘合剂层的临时基底,而临时基底被配置为支撑半导体器件和对准标记并与它们接合,同时保持半导体器件和对准标记之间的精确对准。该系统还可以包括第二基底系统,该系统包括其上具有粘合剂层的传质基底,传质基底被配置为支撑半导体器件和对准标记并与它们结合,同时保持半导体器件和对准标记之间的精确对准,该系统还可以包括第三基底系统,该第三基底系统包括具有多个电路和多个与电路对准的电路对准标记的电路基底。
附图说明
图1是现有技术对准系统的示意透视图;
图2A-2D是说明现有技术对准标记的示意图;
图3A-3C是说明现有技术的掩模对准系统在操作中的示意图;
图4A-4C是图解说明在现有技术的掩模对准系统的操作期间掩模对准标记和基底对准标记的示意性截面图。
图5是在提供具有半导体器件和对准标记的基底的基底系统之间转移对准标记的方法中的步骤的示意性截面图;
图6是靠近具有临时基底的第一基底系统放置基底的方法中的步骤的示意性截面图;
图7是将半导体器件和对准标记结合到第一基底系统的临时基底的方法中的步骤的示意性截面图。
图8是在第一基底系统的临时基底上分离基底留下半导体器件和对准标记的方法中的步骤的示意性截面图。
图9-12是该方法中进一步步骤的示意性截面图,其中半导体器件和对准标记从临时基底转移到具有质量转移基底的第二基底系统;
图13-17是方法中进一步步骤的示意性截面图,其中将质量转移基底上的半导体器件和对准标记转移到具有电路基底的第三基底系统;
图18-19是该方法中进一步步骤的示意性截面图,其中通过蚀刻和沈积与半导体器件电连通的导体来进一步处理第三基底系统;和
图20是用于在基底系统之间转移对准标记的系统的示意性截面图。
具体实施方式
参考图5,图示了用于在基底系统之间转移对准标记的方法的第一步。第一步包括提供具有多个半导体器件42和形成于其上的多个对准标记48的基底40。在示例性实施例中,基底40包括具有形成半导体器件42的外延结构44的半导体基底。为了示例性目的,半导体器件42还可以包括与对准标记48的表面共面的金属接触点46。或者,基底40可以包括用于保持半导体器件42的载体基底。
对准标记48可以包括外延结构44的部分或沉积材料50,或者如图5所示它们的组合,在说明性实施例中对准标记48在使用半导体制造技术由相同的外延结构44制造半导体器件42期间形成,这允许半导体器件42和对准标记48彼此或与基底40上的其他特征精确对准,此外,对准标记48是可以使用不同接合技术在不同基底系统之间转移的实体结构,如粘合剂粘合,更进一步对准标记48也可以被配置为贴纸52(图5)或类似结构,其可以在制造半导体器件44之后放置在基底40上并结合到基底40上。
参考图6,该方法还包括将基底40放置在靠近第一基底系统54的步骤。在说明性实施例中,第一基底系统54包括临时基底56和用于与临时基底建立临时粘合剂连接的粘合剂层58。半导体器件42和对准标记48。
参考图7,该方法还包括从基底实体转移半导体器件42和对准标记48并结合到第一基底系统54的步骤,转移和结合步骤可以使用能量系统60执行,该能量系统60使用诸如热能、光能、机械能、电能或粘合能的能量以将半导体器件42和对准标记48粘合到第一基底系统54的临时基底56,在说明性实施例中粘合层临时基底56上的图58有助于使用粘合力接合半导体器件42和对准标记48。
参照图8,该方法还包括将基底40与第一基底系统54分离的步骤,在临时基底56上留下半导体器件42和对准标记48,同时保持精确对准,分离步骤可以在使用剥离方法例如热方法、光学方法、机械方法、电方法或粘合剂方法的接合步骤期间或与接合步骤分开进行,在说明性实施例中,临时基底56上的粘合层58通过将粘合力施加到半导体器件42和对准标记48来促进分离步骤。
参考图9-12,示出了该方法中的进一步步骤,其中半导体器件42和对准标记48从第一基底系统54实体的转移并且以传质系统的形式结合到第二基底系统62,如图9所示,第二基底系统62包括其上具有粘合剂层66的传质基底64,如图10所示,第二基底系统62靠近第一基底系统54放置,其中半导体器件与传质基底64上的粘合剂层66物理接触,如图11所示,第一基底系统54分离第二基底系统62和第二基底系统62,半导体器件42和对准标记48转移到质量转移基底64,该分离步骤可以使用剥离工艺例如热方法、光学方法、机械方法、电气方法或粘合剂方法来执行,图12示出了第二基底系统62的传质基底64上的半导体器件42,准备好根据其他制造或封装工艺的需要进行传质。
参考图13-17,说明了该方法中的进一步步骤,其中半导体器件42和对准标记48从第二基底系统62实体转移并结合到第三基底系统68,如图13所示,第三基底系统68包括电路基底70(例如PCB、MCPCB或其他电路相关组件),其具有多个电路72以及在电路的任一侧上的多个正面电路对准标记74A和背面电路对准标记74B基底70与电路72对齐,如图14所示,该方法还可包括在电路72和电路对准标记74A上沉淀沉积材料76的步骤,根据应用用于沉积材料76的示例性材料包括金属、粘合剂和绝缘体。
如图15所示,该方法可以进一步包括使用传质基底64上的对准标记48和电路基底70上的电路对准标记74A,如图16所示,该方法可以进一步包括将第二基底系统62的传质基底64放置成与第三基底系统68的电路基底70物理接触的步骤如图17所示,该方法可以进一步包括将对准标记48从质量转移基底64转移到电路基底70并将对准标记48结合到电路基底70的步骤,以及分离质量转移的步骤,基底64留下电路基底70,其上具有对准标记48和电路对准标记74A、74B。
参考图18-19,图示了其中使用半导体制造工艺进一步处理第三基底系统68的方法中的进一步步骤,在图18中,在覆盖电路基底70上的电路72的沉积材料76中蚀刻开口78,在图19中,在开口78中形成导体80,与半导体器件42上的接触点46电连通,并与在电路基底70上的电路72,在这些制造过程中,在电路基底70上转移的对准标记48保持与在该方法的初始阶段形成的半导体器件42的精确对准。
参考图20,用于在基底系统之间转移对准标记的系统82包括具有半导体器件42的基底40和与半导体器件42精确对准的对准标记48,如前所述,对准标记48包括物理结构,其可以在基底系统之间实体转移,系统82还包括第一基底系统54,第一基底系统54包括具有粘合剂层58的临时基底56,如前所述,临时基底56被配置为支撑和接合半导体器件42和对准标记48,同时保持精确对准在半导体器件42和对准标记48之间。
系统82还可以包括第二基底系统62,第二基底系统62包括其上具有粘合剂层66的传质基底64,质量转移基底64被配置为支撑半导体器件42和对准标记48并与它们结合,同时保持半导体器件42和对准标记48之间的精确对准。系统82还可以包括第三基底系统68,该第三基底系统包括:电路基底70具有电路72和与电路72对准的电路对准标记74A、74B。
通常,该方法和系统对基材的类型不敏感,无论是不透明的还是透明的,此外该方法和系统比多次重复光刻更便宜,因为在前端工艺期间形成的相同对准标记用于后端工艺,该方法和系统还便于在需要极高精度的后端工艺中使用,例如冲压、拾取和放置以及精密粘合。
尽管上面已经讨论了多个示例性方面和实施例,但是本领域技术人员将认识到它们的某些修改、排列、添加和子组合。因此,旨在将以下所附权利要求和下文介绍的权利要求解释为包括在其真实精神和范围内的所有此类修改、置换、添加和子组合。

Claims (20)

1.一种用于在基底系统之间转移对准标记的方法,包括:
提供一个基底,其包括多个半导体装置及多个精确对准的对准标记;
提供包括临时基底的第一基底系统;
将半导体器件和对准标记实体的转移和接合到第一基底系统的临时基底,同时保持半导体器件和对准标记之间的精确对准;
将基底与第一基底系统分离,在临时基底上留下半导体器件和对准标记,同时保持半导体器件和对准标记之间的精确对准。
2.根据权利要求1所述的方法,还包括提供第二基底系统以及将半导体器件和对准标记实体的转移和接合到第二基底系统,同时保持半导体器件和对准标记之间的精确对准。
3.根据权利要求2所述的方法,还包括提供第三基底系统,以及将半导体器件和对准标记实体的转移和接合到第三基底系统,同时保持半导体器件和对准标记之间的精确对准。
4.根据权利要求1所述的方法,其中,所述基底包括具有形成所述半导体器件和所述对准标记的外延结构的半导体基底。
5.根据权利要求1所述的方法,其中,所述基底包括被配置用于保持所述半导体器件的载体基底。
6.根据权利要求1所述的方法,其中,所述对准标记包括形成在所述基底上作为可转移实体结构的外延结构、沉积材料或其组合的部分。
7.根据权利要求1所述的方法,其中,所述转移和粘合步骤使用热能、光能、机械能、电能、粘合能或其组合来进行。
8.一种用于在基底系统之间转移对准标记的方法,包括:
提供包括多个半导体器件和精确对准的多个对准标记的基底,对准标记包括可转移的实体结构;
提供包括临时基底的第一基底系统;
将半导体器件和对准标记实体的转移和接合到第一基底系统的临时基底,同时保持半导体器件和对准标记之间的精确对准;
将基底与第一基底系统分离,在临时基底上留下半导体器件和对准标记,同时保持半导体器件和对准标记之间的精确对准;
提供包括传质基底的第二基底系统;
将半导体器件和对准标记实体的转移和接合到第二基底系统,同时保持半导体器件和对准标记之间的精确对准。
9.根据权利要求8所述的方法,还包括提供第三基底系统,该第三基底系统包括电路基底和在所述电路基底上的电路,以及从所述传质基底实体的转移所述半导体器件和所述对准标记并结合到所述电路基底,同时保持半导体器件和对准标记之间的精确对准。
10.根据权利要求9所述的方法,还包括分离所述第二基底系统的所述传质基底,将所述电路基底和所述半导体器件留在所述电路基底上。
11.根据权利要求10所述的方法,还包括使用至少一种半导体制造工艺进一步处理所述第三基底系统上的所述半导体器件。
12.根据权利要求11所述的方法,其中,所述半导体制造工艺包括形成与所述半导体器件电连通的导体。
13.根据权利要求12所述的方法,其中,所述基底包括具有形成所述半导体器件和所述对准标记的外延结构的半导体基底。
14.一种用于在基底系统之间转移对准标记的系统,包括:
基底包括多个半导体器件和与半导体器件精确对准的多个对准标记,对准标记包括可以在基底系统之间实体转移的实体结构;还有
第一基底系统,包括其上具有粘合剂层的临时基底,该临时基底被配置为支撑并与半导体器件和对准标记结合,同时保持半导体器件和对准标记之间的精确对准。
15.根据权利要求14所述的系统,还包括第二基底系统,所述第二基底系统包括其上具有粘合剂层的传质基底,所述传质基底被配置为支撑所述半导体器件和所述对准标记并与所述对准标记结合,同时保持所述半导体器件和所述对准标记之间的精确对准。
16.根据权利要求15所述的系统,还包括第三基底系统,该第三基底系统包括具有多个电路和与所述电路对准的多个电路对准标记的电路基底,所述电路基底被配置为支撑并结合所述半导体器件和所述对准标记,同时保持半导体器件和对准标记之间的精确对准。
17.根据权利要求16所述的系统,其中,所述基底包括具有形成所述半导体器件和所述对准标记的外延结构的半导体基底。
18.根据权利要求17所述的系统,其中,所述对准标记包括形成在所述基底上作为可转移实体结构的外延结构、沉积材料或其组合的部分。
19.根据权利要求14所述的系统,其中,所述对准标记包括贴纸。
20.根据权利要求14所述的系统,其中,所述半导体器件包括与所述对准标记的表面共面的触点。
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