CN115394860A - 一种碳化硅tmbs器件结构及其制造方法 - Google Patents

一种碳化硅tmbs器件结构及其制造方法 Download PDF

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CN115394860A
CN115394860A CN202210939715.8A CN202210939715A CN115394860A CN 115394860 A CN115394860 A CN 115394860A CN 202210939715 A CN202210939715 A CN 202210939715A CN 115394860 A CN115394860 A CN 115394860A
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silicon carbide
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汪之涵
喻双柏
温正欣
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Basic Semiconductor Ltd
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
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Abstract

本发明公开了一种碳化硅TMBS器件结构。所述结构包括一n型掺杂碳化硅衬底,其上方有一n型掺杂碳化硅外延层,在碳化硅外延层的顶部有若干沟槽,所述沟槽的侧壁和底部有氧化层,所述沟槽中填充有p型掺杂多晶硅,每两个相邻的沟槽之间有p型沟槽保护区,p型沟槽保护区包裹对应的两个沟槽的内边缘。本发明同时公开了该器件的制造方法。与常规的TMBS器件结构及制造方法相比,本发明结合了碳化硅材料的特点,通过引入沟槽保护区的结构,以在正向大电流状态下起到双极型导通的作用,提高了器件允许的最大浪涌电流。

Description

一种碳化硅TMBS器件结构及其制造方法
技术领域
本发明属于半导体器件技术领域,具体涉及一种碳化硅TMBS器件结构及其制造方法。
背景技术
碳化硅肖特基二极管是最早实现商业化的碳化硅基电力电子器件结构,因其优良的器件性能,在通讯电源和光伏逆变等领域被广泛的使用。传统的碳化硅肖特基二极管为平面型结构,利用漂移区顶部注入的p型区域,减小器件顶部的电场;在浪涌工作条件下,p型注入区域与n型漂移区的np结开启,导通大的浪涌电流。
沟槽型JBS器件是一种改进的碳化硅肖特基二极管结构,使用沟槽+p型注入的方法,进一步降低阻断状态下的表面电场,从而使器件漂移区能够采用更高的掺杂浓度,提高器件的导通特性。然而沟槽型JBS器件结构仅仅降低了接触表面的最大场强,并未提高碳化硅漂移区的击穿电压。
在硅器件中,最新的肖特基二极管器件结构为沟槽型MOS势垒肖特基二极管(TMBS),其利用槽内电极与外延层之间形成的MOS势垒的电荷耦合效应,在器件承受反向耐压不变的基础上,可以使用更高掺杂浓度的外延层,从而大幅降低器件的通态电阻,能够突破材料的单极型性能极限。
然而,硅器件TMBS结构不能直接转移到碳化硅器件中,主要有两方面因素:第一,使用碳化硅器件制备传统结构的TMBS,阻断状态下二氧化硅会发生提前击穿;第二,传统的TMBS结构中没有双极性电流路径,浪涌特性较差,在硅器件中不明显,但在碳化硅器件中是突出的缺陷。
发明内容
本发明提出一种碳化硅TMBS器件结构及其制造方法,利用电荷耦合效应,降低肖特基接触表面电场,提高外延层的掺杂浓度,降低器件的通态电阻,通过引入沟槽保护结构,降低阻断状态下栅氧最大场强,保护结构同时起到浪涌电流双极型通路的作用,提高了器件的浪涌能力。
在第一方面,本发明提出了一种硅衬底上3C碳化硅器件结构,包括一n型掺杂碳化硅衬底,其上方有一n型掺杂碳化硅外延层,在碳化硅外延层的顶部有若干沟槽,所述沟槽的侧壁和底部有氧化层,所述沟槽中填充有p型掺杂多晶硅,每两个相邻的沟槽之间有p型沟槽保护区,p型沟槽保护区包裹对应的两个沟槽的内边缘。
优选地,所述p型沟槽保护区的深度大于所述沟槽的深度,且所述p型沟槽保护区包裹对应的两个沟槽彼此相靠近一侧的内边缘。
优选地,所述沟槽的深度为0.5μm至1μm。
优选地,所述氧化层的厚度为30nm至100nm。
在本发明的另一方面,本发明提出了一种碳化硅TMBS器件的制造方法,包括如下步骤:
S1、在碳化硅衬底上生长碳化硅外延层;
S2、进行p型离子注入,以在所述碳化硅外延层的顶部形成若干P型注入区;
S3、通过刻蚀工艺在每个P型注入区的两侧刻蚀沟槽,并使得沟槽部分刻蚀于所述p型注入区内;
S4、通过氧化工艺在沟槽的侧壁及底部形成氧化层;
S5、在上述结构的表面沉积p型掺杂多晶硅,以填充所述沟槽;
S6、在上述结构的正面溅射肖特基接触金属,背面溅射欧姆接触金属,激光退火后形成碳化硅TMBS器件结构。
优选地,在步骤S2中,使用Al离子注入,注入最大能量在800keV以上,使p型注入区的深度为1.2μm至2μm。
优选地,所述沟槽的深度小于所述p型注入区的深度。
与现有技术相比,本发明实施例的碳化硅TMBS器件的有益效果包括:
相比于普通的碳化硅JBS器件,本发明引入电荷耦合结构,降低器件表面电场,使外延层可以选择更高的掺杂浓度,从而降低器件的通态电阻。相比于常规的TMBS器件结构,本发明结合了碳化硅材料的特点,通过引入沟槽保护结构,以在正向大电流状态下起到双极型导通的作用,提高了器件允许的最大浪涌电流。
附图说明
为了更清楚地说明本发明的实施例中的技术方案,下面将对实施例描述中所需要使用的附图做简单地介绍,显而易见地,下面展示的附图仅仅是本发明的一些实施例,并不用于限制本发明。
图1为本发明一个实施例的碳化硅TMBS器件结构示意图;
图2为本发明一个实施例的碳化硅TMBS器件制造方法流程图;
图3至图7为本发明一个实施例的碳化硅TMBS器件制造方法的不同步骤得到的器件结构的示意图。
主要元件符号说明
碳化硅衬底 1
碳化硅外延层 2
沟槽保护区 3
P型注入区 31
氧化层 4
沟槽 41
p型掺杂多晶硅 5
肖特基接触金属 6
欧姆接触金属 7
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,下面结合附图和具体实施例对本发明作进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
参考图1,本发明实施例一方面提供了一种碳化硅TMBS器件结构。在本实施例中,所述碳化硅TMBS器件结构包括一n型掺杂碳化硅衬底(1),其上方有一n型掺杂碳化硅外延层(2),在碳化硅外延层(2)的顶部有若干沟槽,所述沟槽的深度为0.5μm至1μm,所述沟槽的宽度为0.5μm至2μm,相邻两个沟槽之间的间距为2μm至4μm;所述沟槽的侧壁和底部有氧化层(4),所述氧化层(4)的厚度为30nm至100nm;所述沟槽中填充有p型掺杂多晶硅(5);每两个相邻的沟槽之间有p型沟槽保护区(3),p型沟槽保护区(3)包裹对应的两个沟槽的内边缘。
在本实施方式中,所述p型沟槽保护区(3)的深度为1.2μm至2μm,所述p型沟槽保护区(3)的深度大于所述沟槽的深度,且p型沟槽保护区(3)包裹对应的两个沟槽彼此相靠近一侧的内边缘。
相比于常规TMBS器件结构,本发明所提供的碳化硅TMBS器件结构增加了沟槽保护区(3),如此,在阻断状态下将起到保护沟槽氧化层的作用,在大电流导通状态下,起到开启PN结,提供双极型电流通路的作用。
参考图2,本发明实施例提供一种碳化硅TMBS器件制造方法,该方法包括如下步骤:
步骤S1:在碳化硅衬底(1)上生长碳化硅外延层(2),形成图3所示结构。
步骤S2:在所述碳化硅外延层(2)的表面进行p型离子注入,以在所述碳化硅外延层(2)的顶部形成若干P型注入区(31);在本实施方式中,进行离子注入的工艺是使用Al离子注入,注入最大能量在800keV以上,使p型注入区(31)的深度为1.2μm至2μm,形成图4所示结构。
步骤S3:在所述碳化硅外延层(2)的顶部进行刻蚀,以在每个P型注入区(31)的两侧分别形成一沟槽(41),所述沟槽(41)部分刻蚀于所述p型注入区(31)内,以使得剩余的p型注入区形成P型沟槽保护区(3);所述沟槽(41)的深度小于所述p型注入区(31)的深度;优选地,所述沟槽(41)深度可为0.5μm至1μm;沟槽刻蚀气体可选择SF6、O2和HBr,气体比例5:1:6,形成如图5所示结构。
步骤S4:氧化上述碳化硅结构,以在所述沟槽(41)的侧壁及底部形成氧化层(4);其中,氧化温度1250℃至1350℃,氧化层厚度30nm至100nm,形成如图6所示结构。
步骤S5:在上述结构的表面沉积p型掺杂多晶硅(5),以填充所述沟槽(41),形成如图7所示结构。
步骤S6:在上述器件结构的正面溅射肖特基接触金属(6),背面溅射欧姆接触金属(7),激光退火后形成如图1所示的碳化硅TMBS器件结构。
以上内容是结合具体/优选的实施方式对本发明所作的进一步详细说明,不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说,在不脱离本发明构思的前提下,其还可以对这些已描述的实施方式做出若干替代或变型,而这些替代或变型方式都应当视为属于本发明的保护范围。在本说明书的描述中,参考术语“一种实施例”、“一些实施例”、“优选实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中,对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且,描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外,在不相互矛盾的情况下,本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。

Claims (7)

1.一种碳化硅TMBS器件结构,其特征在于,包括一n型掺杂碳化硅衬底,其上方有一n型掺杂碳化硅外延层,在碳化硅外延层的顶部有若干沟槽,所述沟槽的侧壁和底部有氧化层,所述沟槽中填充有p型掺杂多晶硅,每两个相邻的沟槽之间有p型沟槽保护区,p型沟槽保护区包裹对应的两个沟槽的内边缘。
2.根据权利要求1所述的碳化硅TMBS器件结构,其特征在于,所述p型沟槽保护区的深度大于所述沟槽的深度,且所述p型沟槽保护区包裹对应的两个沟槽彼此相靠近一侧的内边缘。
3.根据权利要求1所述的碳化硅TMBS器件结构,其特征在于,所述沟槽的深度为0.5μm至1μm。
4.根据权利要求1所述的碳化硅TMBS器件结构,其特征在于,所述氧化层的厚度为30nm至100nm。
5.一种碳化硅TMBS器件的制造方法,其特征在于,包括如下步骤:
S1、在碳化硅衬底上生长碳化硅外延层;
S2、进行p型离子注入,以在所述碳化硅外延层的顶部形成若干P型注入区;
S3、通过刻蚀工艺在每个P型注入区的两侧刻蚀沟槽,并使得沟槽部分刻蚀于所述p型注入区内;
S4、通过氧化工艺在沟槽的侧壁及底部形成氧化层;
S5、在上述结构的表面沉积p型掺杂多晶硅,以填充所述沟槽;
S6、在上述结构的正面溅射肖特基接触金属,背面溅射欧姆接触金属,激光退火后形成碳化硅TMBS器件结构。
6.根据权利要求5所述的碳化硅TMBS器件的制造方法,其特征在于,在步骤S2中,使用Al离子注入,注入最大能量在800keV以上,使p型注入区的深度为1.2μm至2μm。
7.根据权利要求5所述的碳化硅TMBS器件的制造方法,其特征在于,所述沟槽的深度小于所述p型注入区的深度。
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