CN115376910B - 一种制备平行斜刻凹槽图形化硅衬底的方法 - Google Patents
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 74
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 72
- 239000010703 silicon Substances 0.000 title claims abstract description 72
- 239000000758 substrate Substances 0.000 title claims abstract description 43
- 238000000034 method Methods 0.000 title claims abstract description 33
- 238000005530 etching Methods 0.000 claims abstract description 37
- 238000001039 wet etching Methods 0.000 claims abstract description 9
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical group [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 claims description 39
- 238000005260 corrosion Methods 0.000 claims description 24
- 230000007797 corrosion Effects 0.000 claims description 24
- 238000001259 photo etching Methods 0.000 claims description 16
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 14
- 239000008367 deionised water Substances 0.000 claims description 9
- 229910021641 deionized water Inorganic materials 0.000 claims description 9
- 238000009210 therapy by ultrasound Methods 0.000 claims description 8
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 6
- 238000012360 testing method Methods 0.000 claims description 6
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 238000001035 drying Methods 0.000 claims description 4
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 3
- 238000009616 inductively coupled plasma Methods 0.000 claims description 3
- 230000000873 masking effect Effects 0.000 claims description 3
- 238000005406 washing Methods 0.000 claims description 2
- 238000003631 wet chemical etching Methods 0.000 claims description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 4
- 229910004298 SiO 2 Inorganic materials 0.000 claims 2
- 229910052757 nitrogen Inorganic materials 0.000 claims 2
- 229910021332 silicide Inorganic materials 0.000 claims 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 2
- 239000013078 crystal Substances 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 7
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 230000002596 correlated effect Effects 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 19
- 238000001878 scanning electron micrograph Methods 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 7
- 238000002360 preparation method Methods 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000003518 caustics Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000013598 vector Substances 0.000 description 1
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Abstract
本发明涉及一种制备平行斜刻凹槽图形化硅衬底的方法,通过湿法腐蚀的方法,在30‑60℃的15wt%‑25wt%KOH溶液中20‑50min腐蚀后,可以在(113)表面的硅衬底上刻蚀出了分布均匀、边界清晰可见的斜刻凹槽,凹槽各面分别为(1‑11)面,(011)面,(‑11‑1)面,凹槽的深度与温度和时间呈正相关。该方法为硅衬底提供了不同的晶面以及不同的形貌,为硅衬底凹槽提供更多选择性。硅衬底不同的表面有不同的性质,本发明的方法为后续制作半导体器件提供了新型的衬底表面选择。
Description
技术领域
本发明涉及半导体领域,具体涉及一种基于湿法腐蚀制备平行斜刻凹槽图形化硅衬底的方法。
背景技术
硅材料是半导体行业的核心,也是半导体器件制备的基础。硅是一种具有各向异性的材料,不同晶向的性质不同。目前,市面上硅衬底主要是硅(111)面衬底,但是随着半导体器件的发展与进步,硅(111)面逐渐不能满足人们的需要。通过光刻和湿法腐蚀的方法,可以定向腐蚀硅的表面,制备图形化的硅衬底。硅的图形化衬底可以在同一片硅片上同时存在不同的表面以及不同的斜刻凹槽深度,以便于不同类型的半导体器件的制备。
在实际的生产中,硅的(1-11)面的图形化衬底是氮化镓发光器件制备的基础。没有良好质量的(1-11)面的硅衬底就无法制备合适晶向的氮化镓器件。进一步,硅的其他表面也有不同的应用,此处不赘述。但目前为止关于图形衬底的制备,还没有一个比较系统的研究。
发明内容
本发明的目的在于克服现有技术的不全面性,提出一种基于湿法腐蚀制备平行斜刻凹槽图形化硅衬底的方法
本发明的一种制备平行斜刻凹槽图形化硅衬底的方法,其特征在于,具体包括如下步骤:
1)准备图形化硅衬底的样品,并测试所述样品的图形化硅衬底的参考面;
2)清洗所述样品;
3)在所述图形化硅衬底上淀积一层SiO2或SiNx;
4)确定光刻条纹方向;
5)对完成步骤3)的样品进行光刻;
6)对完成步骤5)的样品进行腐蚀;
7)对腐蚀后具有斜刻凹槽的样品进行表征,确定斜刻凹槽各表面的类型以及斜刻凹槽的质量。
进一步,本发明所述方法中样品的斜刻凹槽的三个面分别为硅的(1-11)面、(-11-1)面和(011)面,且其中的(011)面为斜刻凹槽的底部面,所述斜刻凹槽的深度为2-6um,深度指的是从硅片表面到腐蚀最深处的垂直距离。
进一步,本发明所述方法中品的图形化硅衬底的表面为硅的(113)面。
进一步,本发明所述方法的步骤2)中样品的清洗流程为:去离子水超声清洗25-30min;无水乙醇超声25-30min;去离子水超声25-30min;丙酮超声25-30min;去离子水超声25-30min;将清洗后的样品烘干备用。
进一步,本发明所述方法的步骤1)中测试使用XRD设备对所述参考面进行确定,得到所述参考面为硅的(1-10)面。
进一步,本发明所述方法中淀积的SiO2或SiNx的厚度为50-100nm。
进一步,本发明所述方法中光刻条纹方向沿硅的[21-1]方向。
进一步,本发明所述方法的光刻过程采用感应耦合等离子体刻蚀除去经光刻暴露出来的SiO2掩膜层直至硅片表面。
进一步,本发明所述方法的腐蚀使用湿法化学腐蚀方法,所述腐蚀剂为纯度>85%的氢氧化钾,其湿法腐蚀的条件为15-45wt%的腐蚀剂KOH,在温度为30-60℃的水浴锅中腐蚀20-50min。
与现有技术相比,本发明具有以下有益的技术效果:
本发明采用光刻和湿法腐蚀的方法,制备出具有平行斜刻凹槽,具有不同表面的硅衬底。其中湿法腐蚀的条件为15-45wt%的腐蚀剂KOH中,在温度为30-60℃的水浴锅中20-50min腐蚀,所述腐蚀剂的纯度为>85%的氢氧化钾,在(113)面的硅衬底上制备出了边界清晰,均匀的斜刻凹槽条纹,其凹槽表面为硅的(1-11)面、(-11-1)面和(011)面,斜刻凹槽的深度可控,为新型半导体器件的制备提供了合适的衬底以及更多的选择。
附图说明
图1为(113)图形化硅衬底示意图;
图2为(113)图形化硅衬底与光刻板摆放示意图;
图3为腐蚀后具有斜刻凹槽的样品腐蚀面晶向示意图;
图4为实施例1中腐蚀后样品的SEM图;
图5为实施例2中腐蚀后样品的SEM图;
图6为实施例3中腐蚀后样品的SEM图;
图7为实施例4中腐蚀后样品的SEM图;
图8为实施例5中腐蚀后样品的SEM图;
图9为实施例6中腐蚀后样品的SEM图;
图10为实施例7中腐蚀后样品的SEM图;
图11为对比例1中腐蚀后样品的SEM图。
具体实施方式
下面结合具体的实施例对本发明做进一步的详细说明。
实施例1:
一种基于湿法腐蚀制备平行斜刻凹槽图形化硅衬底的方法,包括如下步骤:
1)准备(113)面的硅衬底样品,并测试所述样品的图形化硅衬底的参考面;
(2)用2θ-ω模式扫描硅片表面,确认硅片表面晶向。
(4)参考面的法线方向和硅片表面与(111)面的交线方向所成的角度就是角。其中交线方向与/>角都是已知的,同时注意到参考面的法向与硅片表面的方向垂直,由此可以得到两个等式,分别为夹角φ计算公式中计算/>的一个等式以及一个硅片参考面法向与硅片表面晶向点积为0的公式。联立两个方程并且对一个晶向指数赋值即可得到参考面的法向。
(5)经计算,本发明中使用的(113)面硅衬底的参考面为(1-10)。
2)将样品清洗干净;
清洗流程具体为:去离子水超声清洗25-30min;无水乙醇超声清洗25-30min;去离子水超声清洗25-30min;丙酮超声清洗25-30min;去离子水超声清洗25-30min;干燥箱内100℃烘干备用;
3)在硅衬底上淀积一层70nm二氧化硅;用等离子体增强化学气相沉积法在硅片表面沉积一层SiO2掩膜层。
4)确定光刻条纹方向;
通过图1可以观察出,条纹的方向垂直于[113]和[1-11]方向,两个向量做叉乘运算可以得到条纹的方向应该沿[21-1]方向。通过计算可知,[21-1]方向与[1-10]方向的夹角是73.2°,因此只需要将光刻版条纹的方向与硅片参考面法向成73.2°即可。图2展示了(113)硅图形衬底与光刻版的摆放图,图中条纹将硅片完全覆盖,条纹的宽度和间隔都是2μm。
5)对完成步骤3)的样品进行光刻;
用感应耦合等离子体(ICP)刻蚀除去经光刻暴露出来的SiO2掩膜层直至硅片表面。
6)对光刻后的硅衬底进行腐蚀;
将清洁的样品放入35wt%的腐蚀剂中,在温度为40℃的水浴锅中20min腐蚀,腐蚀后自然降至室温;
7)对腐蚀后具有斜刻凹槽的硅衬底进行表征,确定斜刻凹槽各表面的类型以及斜刻凹槽的质量。
对完成腐蚀的样品进行扫描电镜分析,如图3所示,可知通过上述光刻与腐蚀过程能够得到的边界清晰,分布均匀的斜刻凹槽,且质量较好。
实施例2:本实施例2与实施例1的不同之处仅在于:所述腐蚀时间为30min。
实施例3:本实施例3与实施例1的不同之处仅在于:所述腐蚀时间为40min。
实施例4:本实施例4与实施例1的不同之处仅在于:所述腐蚀时间为50min。
实施例5:本实施例5与实施例1的不同之处仅在于:所述腐蚀温度为50℃。
实施例6:本实施例6与实施例1的不同之处仅在于:所述腐蚀条件为15wt%的腐蚀剂中,温度为50℃的水浴锅中20min。
实施例7:本实施例7与实施例1的不同之处仅在于:所述腐蚀液为25wt%。
根据腐蚀条件的不同,所得斜刻凹槽的深度不同,为了便于清晰的表示腐蚀条件与斜刻凹槽的深度,将所得斜刻凹槽的深度见表1:
表1:
对比例1:本对比例1与实施例1的不同之处仅在于:所述腐蚀时间为10min,所述腐蚀温度为20℃,所述腐蚀液为10wt%。
对比例2:本对比例2与实施例1的不同之处仅在于:所述腐蚀时间为60min,所述腐蚀温度为70℃,所述腐蚀液为50wt%。
由上述实施例和对比例的测试结果,并结合图3~图11可知,腐蚀的深度随腐蚀时间的变化很明显,根据腐蚀时间从短到长,腐蚀的深度由浅变深(这里的深度指的是从硅片表面到腐蚀最深处的垂直距离,可能会因为拍摄角度不同而有细小的误差,下同);但若腐蚀时间过长则会有横向腐蚀,使得沟道变宽。温度对腐蚀的影响很大,根据腐蚀温度从低到高,腐蚀的深度由浅变深。而且可以发现温度对腐蚀的影响要比腐蚀时间的影响大,在较低温度30℃时,只能腐蚀出一个小凹槽,腐蚀的图案都没有形成,而温度过高时表面结构会断裂;随着KOH腐蚀液浓度的上升,腐蚀的深度在不断变浅。根据KOH浓度从低到高,腐蚀的深度由深变浅,但浓度过低又会导致深度较浅,腐蚀效果差。产生这种现象的原因是在腐蚀硅片过程中,KOH腐蚀液中发挥主要作用的是OH-,随着KOH浓度的增加,腐蚀速率会随着OH-浓度的增加而增加,但是当KOH浓度增加到一定值时,继续增加KOH的浓度反而会使实际参加反应的OH-不断减少,这就导致了腐蚀速率的减小。
Claims (4)
1.一种制备平行斜刻凹槽图形化硅衬底的方法,其特征在于,具体包括如下步骤:
1)准备图形化硅衬底的样品,并测试所述样品的图形化硅衬底的参考面;
2)清洗所述样品;
3)在所述图形化硅衬底上淀积一层SiO2或氮硅化物;
4)确定光刻条纹方向;
5)对完成步骤3)的样品进行光刻;
6)对完成步骤5)的样品进行腐蚀;
7)对腐蚀后具有斜刻凹槽的样品进行表征,确定斜刻凹槽各表面的类型以及斜刻凹槽的质量;
其中所述步骤1)中所述样品的图形化硅衬底的表面为硅的(113)面,所述步骤1)中测试使用XRD设备对所述参考面进行确定,得到所述参考面为硅的(1-10)面;所述步骤4)中所述的光刻条纹方向沿硅的[21-1]方向,所述光刻条纹方向与参考面法向成73.2°;所述步骤6)中所述腐蚀使用湿法化学腐蚀方法,腐蚀剂为纯度>85%的氢氧化钾,其湿法腐蚀的条件为15-45wt%的腐蚀剂氢氧化钾,在温度为30-60℃的水浴锅中腐蚀20-50min;所述步骤7)中样品的斜刻凹槽的三个面分别为硅的(1-11)面、(-11-1)面和(011)面,且其中的(011)面为斜刻凹槽的底部面,所述斜刻凹槽的深度为2-6um,深度指的是从硅片表面到腐蚀最深处的垂直距离。
2.根据权利要求1所述的制备平行斜刻凹槽图形化硅衬底的方法,其特征在于,所述步骤2)中样品的清洗流程为:去离子水超声清洗25-30min;无水乙醇超声25-30min;去离子水超声25-30min;丙酮超声25-30min;去离子水超声25-30min;将清洗后的样品烘干备用。
3.根据权利要求2所述的制备平行斜刻凹槽图形化硅衬底的方法,其特征在于,所述淀积的SiO2或氮硅化物的厚度为50-100nm。
4.根据权利要求3所述的制备平行斜刻凹槽图形化硅衬底的方法,其特征在于,所述光刻过程采用感应耦合等离子体刻蚀除去经光刻暴露出来的SiO2掩膜层直至硅片表面。
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