CN114721459A - High-stability low-power-consumption linear voltage-stabilizing integrated circuit composed of multiple MOS (metal oxide semiconductor) tubes - Google Patents

High-stability low-power-consumption linear voltage-stabilizing integrated circuit composed of multiple MOS (metal oxide semiconductor) tubes Download PDF

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CN114721459A
CN114721459A CN202210356324.3A CN202210356324A CN114721459A CN 114721459 A CN114721459 A CN 114721459A CN 202210356324 A CN202210356324 A CN 202210356324A CN 114721459 A CN114721459 A CN 114721459A
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mos tube
electrode
mos
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mos transistor
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CN114721459B (en
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李荣俊
黎海敬
陈柏森
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Shenzhen Zhongxin Tongchuang Technology Co ltd
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Shenzhen Zhongxin Tongchuang Technology Co ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention provides a high-stability low-power-consumption linear voltage stabilization integrated circuit composed of a plurality of MOS (metal oxide semiconductor) tubes, which comprises a reference current generation circuit and a stabilized voltage output circuit. The invention can stably work under the working voltage of 0.5V by the arrangement of a circuit structure. The reference current generating circuit can generate the reference current which is not influenced by the working voltage change and the temperature change. The stable voltage output circuit can improve the loop gain under the condition of not increasing the power consumption and output accurate and stable voltage to be supplied to a post-stage circuit module.

Description

High-stability low-power-consumption linear voltage-stabilizing integrated circuit composed of multiple MOS (metal oxide semiconductor) tubes
Technical Field
The invention relates to the field of design of integrated circuits, in particular to a high-stability low-power-consumption linear voltage stabilization integrated circuit consisting of a plurality of MOS (metal oxide semiconductor) tubes.
Background
The linear voltage stabilizing circuit provides accurate and stable working voltage or bias voltage for related circuit modules according to the power supply requirement of the on-chip circuit, and is an important component of an on-chip circuit system. When the linear voltage stabilizing circuit is applied to a circuit system of a portable device, the linear voltage stabilizing circuit should have a low power consumption characteristic. When the working voltage of the traditional linear voltage stabilizing circuit is lower than 0.5V, the loop gain of the linear voltage stabilizing circuit is greatly reduced, and the working stability of the linear voltage stabilizing circuit is seriously influenced. In order to solve the contradiction relationship between the low power consumption and the high loop gain of the linear voltage stabilizing circuit, the invention provides a high-stability low-power consumption linear voltage stabilizing integrated circuit structure consisting of a plurality of MOS (metal oxide semiconductor) tubes.
Disclosure of Invention
The invention aims to solve the technical problem of providing a high-stability low-power-consumption linear voltage-stabilizing integrated circuit consisting of a plurality of MOS (metal oxide semiconductor) tubes.
The technical scheme of the invention is as follows:
a high-stability low-power-consumption linear voltage stabilization integrated circuit composed of a plurality of MOS tubes comprises a reference current generation circuit and a stabilized voltage output circuit. Based on the arrangement of the circuit structure, the reference current generating circuit and the stable voltage output circuit can normally work under the working voltage of 0.5V. The reference current generating circuit can generate the reference current required by the stable voltage output circuit under the condition of not being influenced by the working voltage change and the temperature change. The stabilized voltage output circuit can output accurate and stable voltage for the use of a post-stage circuit module, and has lower power consumption and higher loop gain. In order to avoid the influence of production process deviation on the stability of output voltage, large-size MOS tubes are adopted in the circuit as far as possible, and the influence caused by mismatching of the MOS tubes is reduced by optimizing the width-to-length ratio of all the MOS tubes.
In a high-stability low-power-consumption linear voltage-stabilizing integrated circuit composed of a plurality of MOS tubes, a reference current generating circuit comprises MOS tubes M1-M13, a resistor R1 and a capacitor C1. The reference current generating circuit is mainly used for generating the reference current required by the stable voltage output circuit. The MOS tubes M1, M3, M4, M5, M6, M7, M11 and M13 are biased to work in a weak inversion region so as to adapt to the condition of low working voltage of 0.5V. The connection structure of the MOS transistors M1-M10, the resistor R1 and the capacitor C1 is used for generating a reference current, wherein the connection structure of the MOS transistors M1-M7 can effectively limit the influence of the change of the power supply VDD on the reference current generated on the resistor R1. The connection structure of the MOS transistors M8-M10 and the capacitor C1 is used for carrying out temperature compensation on the current branch where the resistor R1 is located, and the influence of temperature change on reference current is effectively reduced. The connection structure of the MOS transistors M11-M13 copies the reference current in proportion, and inputs the reference current into the stable voltage output circuit through the connection with the gates of the MOS transistors M29 and M32.
In the reference current generating circuit, the source of the MOS transistor M1 is connected to the power supply VDD, the gate of the MOS transistor M1 is connected to the gate of the MOS transistor M5, and the drain of the MOS transistor M1 is connected to the drain of the MOS transistor M2. The drain of MOS transistor M2 is connected with the gate of MOS transistor M1, the gate of MOS transistor M2 is connected with the drain of MOS transistor M2, and the source of MOS transistor M2 is connected with the drain of MOS transistor M3. The drain of MOS pipe M3 is connected with the source of MOS pipe M2, the gate of MOS pipe M3 is connected with the gate of MOS pipe M6, and the source of MOS pipe M3 is connected with the drain of MOS pipe M4. The drain of the MOS transistor M4 is connected with the source of the MOS transistor M3, the gate of the MOS transistor M4 is connected with the gate of the MOS transistor M7, and the source of the MOS transistor M4 is grounded. The source of MOS pipe M5 is connected with power VDD, the gate of MOS pipe M5 is connected with the drain of MOS pipe M1, the drain of MOS pipe M5 is connected with the upper end of resistor R1, and the lower end of resistor R1 is connected with the drain of MOS pipe M6. The drain of MOS pipe M6 is connected with the drain of MOS pipe M8, the gate of MOS pipe M6 is connected with the drain of MOS pipe M6, and the source of MOS pipe M6 is connected with the drain of MOS pipe M7. The drain of the MOS transistor M7 is connected with the gate of the MOS transistor M7, the gate of the MOS transistor M7 is connected with the source of the MOS transistor M6, and the source of the MOS transistor M7 is grounded. The source of MOS pipe M8 is connected with the source of MOS pipe M9, the gate of MOS pipe M8 is connected with the drain of MOS pipe M9, and the drain of MOS pipe M8 is connected with the lower end of resistor R1. The source electrode of the MOS tube M9 is connected with a power supply VDD, the grid electrode of the MOS tube M9 is connected with the drain electrode of the MOS tube M10, the drain electrode of the MOS tube M9 is connected with the upper end of the capacitor C1, and the lower end of the capacitor C1 is grounded. The drain of the MOS transistor M10 is connected with the gate of the MOS transistor M10, the gate of the MOS transistor M10 is connected with the gate of the MOS transistor M9, and the source of the MOS transistor M10 is grounded. The source of the MOS transistor M11 is connected to the power supply VDD, the gate of the MOS transistor M11 is connected to the drain of the MOS transistor M11, and the drain of the MOS transistor M11 is connected to the source of the MOS transistor M12. The source of MOS transistor M12 is connected to the gate of MOS transistor M29, the gate of MOS transistor M12 is connected to the drain of MOS transistor M12, and the drain of MOS transistor M12 is connected to the drain of MOS transistor M13. The drain of the MOS transistor M13 is connected with the gate of the MOS transistor M12, the gate of the MOS transistor M13 is connected with the gate of the MOS transistor M7, and the source of the MOS transistor M13 is grounded.
In a high-stability low-power consumption linear voltage stabilization integrated circuit composed of a plurality of MOS tubes, a stabilized voltage output circuit comprises MOS tubes M14-M43, a resistor R2, capacitors C2-C3 and a voltage output port VT. The stabilized voltage output circuit is used for outputting stabilized voltage, and has lower power consumption and higher loop gain. MOS tubes M14, M15, M16, M43 and M44 are connected to form a feedback loop of the stabilized voltage output circuit, and the loop gain coefficient of the circuit can be improved on the premise of not increasing the power consumption of the circuit by adjusting the dimensional proportion relation of M16, M43 and M44, so that the stabilized voltage output circuit has higher stability. The loop feedback current is input into the rear stage circuit through the connection of the drain of M14 and the gates of M22 and M26. The connection structure of the MOS transistors M17 to M40 receives the reference current and the loop feedback current, and outputs the regulated voltage to the gates of the MOS transistors M41 and M42 to keep the output voltage stable. The connection structure of the MOS tubes M17 to M40 can obviously reduce the working driving voltage of the MOS tubes M20, M21, M25, M31, M28, M35, M36 and M40, and bias the MOS tubes M22, M24, M26, M30, M29, M27, M32 and M34 to work in a weak inversion region, so that the power consumption of the stable voltage output circuit is effectively reduced. The connection structure of the MOS tubes M17, M18, M37 and M38 can obviously improve the output impedance of the connection structure of the MOS tubes M17 to M40, and further improve the voltage gain of the connection structure. The capacitance value of the capacitor C3 is far larger than that of the capacitor C2, and the related connection structure of the capacitor C2 and the capacitor C3 improves the stability of the system during working in a high-frequency band by separating a main pole and a main parasitic pole of a stable voltage output circuit system. The capacitor C2 and the MOS tubes M32, M38, M39 and M40 are connected to form a fast discharge path of the gates of the MOS tube M41 and the MOS tube M42, so that the voltage spike of the output end caused by load change is avoided, and the load transient response speed of the system is further improved. The stable voltage output circuit outputs a stable voltage through a connection point of the source of the MOS transistor M42 and the upper end of the resistor R2.
In the stabilized voltage output circuit, the source of the MOS transistor M14 is connected to the power supply VDD, the gate of the MOS transistor M14 is connected to the drain of the MOS transistor M14, and the drain of the MOS transistor M14 is connected to the source of the MOS transistor M15. The source of MOS transistor M15 is connected to the gate of MOS transistor M22, the gate of MOS transistor M15 is connected to the drain of MOS transistor M15, and the drain of MOS transistor M15 is connected to the drain of MOS transistor M16. The drain of the MOS transistor M16 is connected to the gate of the MOS transistor M15, the gate of the MOS transistor M16 is connected to the gate of the MOS transistor M44, and the source of the MOS transistor M16 is grounded. The source of the MOS transistor M17 is connected to the power supply VDD, the gate of the MOS transistor M17 is connected to the gate of the MOS transistor M18, and the drain of the MOS transistor M17 is connected to the drain of the MOS transistor M18. The drain of MOS transistor M18 is connected with the gate of MOS transistor M17, the gate of MOS transistor M18 is connected with the drain of MOS transistor M17, and the source of MOS transistor M18 is connected with the drain of MOS transistor M19. The drain of MOS transistor M19 is connected to the gate of MOS transistor M19, the gate of MOS transistor M19 is connected to the source of MOS transistor M18, and the source of MOS transistor M19 is connected to the drain of MOS transistor M20. The drain of the MOS transistor M20 is connected with the source of the MOS transistor M19, the gate of the MOS transistor M20 is connected with the gate of the MOS transistor M21, and the source of the MOS transistor M20 is grounded. The drain of the MOS transistor M21 is connected to the drain of the MOS transistor M24, the gate of the MOS transistor M21 is connected to the drain of the MOS transistor M21, and the source of the MOS transistor M21 is grounded. The source of the MOS transistor M22 is connected to the power supply VDD, the gate of the MOS transistor M22 is connected to the gate of the MOS transistor M26, and the drain of the MOS transistor M22 is connected to the source of the MOS transistor M23. The source electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M22, the gate electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M23, and the drain electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M24. The drain of MOS transistor M24 is connected to the gate of MOS transistor M23, the gate of MOS transistor M24 is connected to the gate of MOS transistor M30, and the source of MOS transistor M24 is connected to the drain of MOS transistor M25. The drain of the MOS transistor M25 is connected with the source of the MOS transistor M24, the gate of the MOS transistor M25 is connected with the gate of the MOS transistor M31, and the source of the MOS transistor M25 is grounded. The source electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M22, the gate electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M23, and the drain electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M24. The source of the MOS transistor M26 is connected to the power supply VDD, the gate of the MOS transistor M26 is connected to the drain of the MOS transistor M14, and the drain of the MOS transistor M26 is connected to the drain of the MOS transistor M27. The drain of MOS transistor M27 is connected to the gate of MOS transistor M27, the gate of MOS transistor M27 is connected to the gate of MOS transistor M34, and the source of MOS transistor M27 is connected to the drain of MOS transistor M28. The drain of the MOS transistor M28 is connected with the gate of the MOS transistor M28, the gate of the MOS transistor M28 is connected with the gate of the MOS transistor M35, and the source of the MOS transistor M28 is grounded.
The source of the MOS transistor M29 is connected to the power supply VDD, the gate of the MOS transistor M29 is connected to the gate of the MOS transistor M32, and the drain of the MOS transistor M29 is connected to the drain of the MOS transistor M30. The drain of MOS pipe M30 is connected with the gate of MOS pipe M30, the gate of MOS pipe M30 is connected with the drain of MOS pipe M29, and the source of MOS pipe M30 is connected with the source of MOS pipe M31. The drain of the MOS transistor M31 is connected with the gate of the MOS transistor M31, the gate of the MOS transistor M31 is connected with the source of the MOS transistor M30, and the source of the MOS transistor M31 is grounded. The source of the MOS transistor M32 is connected to the power supply VDD, the gate of the MOS transistor M32 is connected to the drain of the MOS transistor M11, and the drain of the MOS transistor M32 is connected to the source of the MOS transistor M33. The source electrode of the MOS tube M33 is connected with the drain electrode of the MOS tube M32, the gate electrode of the MOS tube M33 is connected with the drain electrode of the MOS tube M33, and the drain electrode of the MOS tube M33 is connected with the drain electrode of the MOS tube M34. The drain of MOS transistor M34 is connected with the gate of MOS transistor M33, the gate of MOS transistor M34 is connected with the drain of MOS transistor M27, and the source of MOS transistor M34 is connected with the drain of MOS transistor M35. The drain of the MOS transistor M35 is connected with the source of the MOS transistor M34, the gate of the MOS transistor M35 is connected with the drain of the MOS transistor M28, and the source of the MOS transistor M35 is grounded. The drain of the MOS transistor M36 is connected with the drain of the MOS transistor M34, the gate of the MOS transistor M36 is connected with the gate of the MOS transistor M40, and the source of the MOS transistor M36 is grounded. The source of the MOS transistor M37 is connected to the power supply VDD, the gate of the MOS transistor M37 is connected to the gate of the MOS transistor M38, and the drain of the MOS transistor M37 is connected to the drain of the MOS transistor M38. The drain of MOS transistor M38 is connected to the gate of MOS transistor M41, the gate of MOS transistor M38 is connected to the gate of MOS transistor M18, and the source of MOS transistor M38 is connected to the drain of MOS transistor M39. The drain of MOS transistor M39 is connected to the gate of MOS transistor M39, the gate of MOS transistor M39 is connected to the source of MOS transistor M38, and the source of MOS transistor M39 is connected to the drain of MOS transistor M40. The drain of the MOS transistor M40 is connected with the source of the MOS transistor M39, the gate of the MOS transistor M40 is connected with the drain of the MOS transistor M36, and the source of the MOS transistor M40 is grounded. The source of the MOS transistor M41 is connected to the power supply VDD, the gate of the MOS transistor M41 is connected to the gate of the MOS transistor M42, and the drain of the MOS transistor M41 is connected to the drain of the MOS transistor M42. The drain electrode of MOS pipe M42 is connected with the drain electrode of MOS pipe M41, the gate electrode of MOS pipe M42 is connected with the drain electrode of MOS pipe M37, the source electrode of MOS pipe M42 is connected with the upper end of resistor R2, and the lower end of resistor R2 is connected with the drain electrode of MOS pipe M43. The drain of the MOS transistor M43 is connected with the drain of the MOS transistor M44, the gate of the MOS transistor M43 is connected with the gate of the MOS transistor M13, and the source of the MOS transistor M43 is grounded. The drain of MOS pipe M44 is connected with the lower end of resistor R2, the gate of MOS pipe M44 is connected with the drain of MOS pipe M44, and the source of MOS pipe M44 is grounded. The upper end of the capacitor C2 is connected with the grid electrode of the MOS tube M32, and the lower end of the capacitor C2 is connected with the upper end of the resistor R2. The upper end of the capacitor C3 is connected with the drain electrode of the MOS tube M37, and the lower end of the capacitor C3 is connected with the source electrode of the MOS tube M42. The voltage output port VT is connected with the source electrode of the MOS tube M42.
The invention provides a high-stability low-power-consumption linear voltage-stabilizing integrated circuit consisting of a plurality of MOS (metal oxide semiconductor) tubes. The invention can stably work under the low working voltage of 0.5V by the arrangement of a circuit structure. The reference current generating circuit can generate the reference current which is not influenced by the working voltage change and the temperature change. The stable voltage output circuit can improve the loop gain under the condition of not increasing the power consumption and output accurate and stable voltage to be supplied to a post-stage circuit module.
Drawings
Fig. 1 is a circuit configuration diagram of the present invention.
Detailed Description
In order to facilitate an understanding of the invention, the invention is described in more detail below with reference to the accompanying drawings and specific examples. The preferred embodiments of the present invention are set forth in the specification and drawings, however, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It should be noted that when an element is fixed to another element, it includes fixing the element directly to the other element or fixing the element to the other element through at least one other element interposed therebetween. When an element is connected to another element, it includes connecting the element directly to the other element or connecting the element to the other element through at least one intervening other element.
As shown in fig. 1, the present invention includes a reference current generating circuit and a stabilized voltage output circuit. The reference current generating circuit comprises MOS transistors M1-M13, a resistor R1 and a capacitor C1. The stabilized voltage output circuit comprises MOS transistors M14-M43, a resistor R2, capacitors C2-C3 and a voltage output port VT. Based on the arrangement of the circuit structure, the reference current generating circuit and the stable voltage output circuit can normally work under the working voltage of 0.5V. The reference current generating circuit can generate the reference current required by the stable voltage output circuit under the condition of not being influenced by the working voltage change and the temperature change. The stabilized voltage output circuit can output accurate and stable voltage for the use of a post-stage circuit module, and has lower power consumption and higher loop gain. In order to avoid the influence of production process deviation on the stability of output voltage, large-size MOS tubes are adopted in the circuit as far as possible, and the influence caused by mismatching of the MOS tubes is reduced by optimizing the width-to-length ratio of all the MOS tubes.
As shown in fig. 1, the reference current generating circuit includes MOS transistors M1 to M13, a resistor R1, and a capacitor C1. The reference current generating circuit is mainly used for generating the reference current required by the stable voltage output circuit. The MOS tubes M1, M3, M4, M5, M6, M7, M11 and M13 are biased to work in a weak inversion region so as to adapt to the condition of low working voltage of 0.5V. The connection structure of the MOS transistors M1-M10, the resistor R1 and the capacitor C1 is used for generating a reference current, wherein the connection structure of the MOS transistors M1-M7 can effectively limit the influence of the change of the power supply VDD on the reference current generated on the resistor R1. The connection structure of the MOS transistors M8-M10 and the capacitor C1 is used for carrying out temperature compensation on the current branch where the resistor R1 is located, and the influence of temperature change on reference current is effectively reduced. The connection structure of the MOS transistors M11-M13 copies the reference current in proportion, and inputs the reference current into the stable voltage output circuit through the connection with the gates of the MOS transistors M29 and M32.
As shown in fig. 1, the source of the MOS transistor M1 is connected to the power supply VDD, the gate of the MOS transistor M1 is connected to the gate of the MOS transistor M5, and the drain of the MOS transistor M1 is connected to the drain of the MOS transistor M2. The drain of MOS transistor M2 is connected with the gate of MOS transistor M1, the gate of MOS transistor M2 is connected with the drain of MOS transistor M2, and the source of MOS transistor M2 is connected with the drain of MOS transistor M3. The drain of MOS pipe M3 is connected with the source of MOS pipe M2, the gate of MOS pipe M3 is connected with the gate of MOS pipe M6, and the source of MOS pipe M3 is connected with the drain of MOS pipe M4. The drain of the MOS transistor M4 is connected with the source of the MOS transistor M3, the gate of the MOS transistor M4 is connected with the gate of the MOS transistor M7, and the source of the MOS transistor M4 is grounded. The source of MOS pipe M5 is connected with power VDD, the gate of MOS pipe M5 is connected with the drain of MOS pipe M1, the drain of MOS pipe M5 is connected with the upper end of resistor R1, and the lower end of resistor R1 is connected with the drain of MOS pipe M6. The drain of MOS pipe M6 is connected with the drain of MOS pipe M8, the gate of MOS pipe M6 is connected with the drain of MOS pipe M6, and the source of MOS pipe M6 is connected with the drain of MOS pipe M7. The drain of the MOS transistor M7 is connected with the gate of the MOS transistor M7, the gate of the MOS transistor M7 is connected with the source of the MOS transistor M6, and the source of the MOS transistor M7 is grounded. The source of MOS pipe M8 is connected with the source of MOS pipe M9, the gate of MOS pipe M8 is connected with the drain of MOS pipe M9, and the drain of MOS pipe M8 is connected with the lower end of resistor R1. The source electrode of the MOS tube M9 is connected with a power supply VDD, the grid electrode of the MOS tube M9 is connected with the drain electrode of the MOS tube M10, the drain electrode of the MOS tube M9 is connected with the upper end of the capacitor C1, and the lower end of the capacitor C1 is grounded. The drain of the MOS transistor M10 is connected with the gate of the MOS transistor M10, the gate of the MOS transistor M10 is connected with the gate of the MOS transistor M9, and the source of the MOS transistor M10 is grounded. The source of the MOS transistor M11 is connected to the power supply VDD, the gate of the MOS transistor M11 is connected to the drain of the MOS transistor M11, and the drain of the MOS transistor M11 is connected to the source of the MOS transistor M12. The source of MOS transistor M12 is connected to the gate of MOS transistor M29, the gate of MOS transistor M12 is connected to the drain of MOS transistor M12, and the drain of MOS transistor M12 is connected to the drain of MOS transistor M13. The drain of the MOS transistor M13 is connected with the gate of the MOS transistor M12, the gate of the MOS transistor M13 is connected with the gate of the MOS transistor M7, and the source of the MOS transistor M13 is grounded.
As shown in fig. 1, the stable voltage output circuit includes MOS transistors M14 to M43, a resistor R2, capacitors C2 to C3, and a voltage output port VT. The stabilized voltage output circuit is used for outputting stabilized voltage, and has lower power consumption and higher loop gain. MOS tubes M14, M15, M16, M43 and M44 are connected to form a feedback loop of the stabilized voltage output circuit, and the loop gain coefficient of the circuit can be improved on the premise of not increasing the power consumption of the circuit by adjusting the dimensional proportion relation of M16, M43 and M44, so that the stabilized voltage output circuit has higher stability. The loop feedback current is input into the latter stage circuit through the connection of the drain of M14 and the gates of M22 and M26. The connection structure of the MOS transistors M17 to M40 receives the reference current and the loop feedback current, and outputs the regulated voltage to the gates of the MOS transistors M41 and M42 to keep the output voltage stable. The connection structure of the MOS transistors M17-M40 can obviously reduce the working driving voltage of the MOS transistors M20, M21, M25, M31, M28, M35, M36 and M40, and bias the MOS transistors M22, M24, M26, M30, M29, M27, M32 and M34 to work in a weak inversion region, so that the power consumption of the stable voltage output circuit is effectively reduced. The connection structure of the MOS transistors M17, M18, M37, and M38 can significantly improve the output impedance of the connection structure of the MOS transistors M17 to M40, thereby improving the voltage gain thereof. The capacitance value of the capacitor C3 is far larger than that of the capacitor C2, and the related connection structure of the capacitor C2 and the capacitor C3 improves the stability of the system during working in a high-frequency band by separating a main pole and a main parasitic pole of a stable voltage output circuit system. The capacitor C2 and the MOS tubes M32, M38, M39 and M40 are connected to form a fast discharge path of the gates of the MOS tube M41 and the MOS tube M42, so that the voltage spike of the output end caused by load change is avoided, and the load transient response speed of the system is further improved. The stable voltage output circuit outputs a stable voltage through a connection point of the source of the MOS transistor M42 and the upper end of the resistor R2.
As shown in fig. 1, the source of the MOS transistor M14 is connected to the power supply VDD, the gate of the MOS transistor M14 is connected to the drain of the MOS transistor M14, and the drain of the MOS transistor M14 is connected to the source of the MOS transistor M15. The source of MOS transistor M15 is connected to the gate of MOS transistor M22, the gate of MOS transistor M15 is connected to the drain of MOS transistor M15, and the drain of MOS transistor M15 is connected to the drain of MOS transistor M16. The drain of the MOS transistor M16 is connected with the gate of the MOS transistor M15, the gate of the MOS transistor M16 is connected with the gate of the MOS transistor M44, and the source of the MOS transistor M16 is grounded. The source of the MOS transistor M17 is connected to the power supply VDD, the gate of the MOS transistor M17 is connected to the gate of the MOS transistor M18, and the drain of the MOS transistor M17 is connected to the drain of the MOS transistor M18. The drain of MOS transistor M18 is connected with the gate of MOS transistor M17, the gate of MOS transistor M18 is connected with the drain of MOS transistor M17, and the source of MOS transistor M18 is connected with the drain of MOS transistor M19. The drain of MOS transistor M19 is connected to the gate of MOS transistor M19, the gate of MOS transistor M19 is connected to the source of MOS transistor M18, and the source of MOS transistor M19 is connected to the drain of MOS transistor M20. The drain of the MOS transistor M20 is connected with the source of the MOS transistor M19, the gate of the MOS transistor M20 is connected with the gate of the MOS transistor M21, and the source of the MOS transistor M20 is grounded. The drain of the MOS transistor M21 is connected with the drain of the MOS transistor M24, the gate of the MOS transistor M21 is connected with the drain of the MOS transistor M21, and the source of the MOS transistor M21 is grounded. The source of the MOS transistor M22 is connected to the power supply VDD, the gate of the MOS transistor M22 is connected to the gate of the MOS transistor M26, and the drain of the MOS transistor M22 is connected to the source of the MOS transistor M23. The source of MOS transistor M23 is connected to the drain of MOS transistor M22, the gate of MOS transistor M23 is connected to the drain of MOS transistor M23, and the drain of MOS transistor M23 is connected to the drain of MOS transistor M24. The drain of MOS transistor M24 is connected to the gate of MOS transistor M23, the gate of MOS transistor M24 is connected to the gate of MOS transistor M30, and the source of MOS transistor M24 is connected to the drain of MOS transistor M25. The drain of the MOS transistor M25 is connected to the source of the MOS transistor M24, the gate of the MOS transistor M25 is connected to the gate of the MOS transistor M31, and the source of the MOS transistor M25 is grounded. The source of MOS transistor M23 is connected to the drain of MOS transistor M22, the gate of MOS transistor M23 is connected to the drain of MOS transistor M23, and the drain of MOS transistor M23 is connected to the drain of MOS transistor M24. The source of the MOS transistor M26 is connected to the power supply VDD, the gate of the MOS transistor M26 is connected to the drain of the MOS transistor M14, and the drain of the MOS transistor M26 is connected to the drain of the MOS transistor M27. The drain of MOS transistor M27 is connected to the gate of MOS transistor M27, the gate of MOS transistor M27 is connected to the gate of MOS transistor M34, and the source of MOS transistor M27 is connected to the drain of MOS transistor M28. The drain of the MOS transistor M28 is connected with the gate of the MOS transistor M28, the gate of the MOS transistor M28 is connected with the gate of the MOS transistor M35, and the source of the MOS transistor M28 is grounded. The source of the MOS transistor M29 is connected to the power supply VDD, the gate of the MOS transistor M29 is connected to the gate of the MOS transistor M32, and the drain of the MOS transistor M29 is connected to the drain of the MOS transistor M30. The drain of MOS pipe M30 is connected with the gate of MOS pipe M30, the gate of MOS pipe M30 is connected with the drain of MOS pipe M29, and the source of MOS pipe M30 is connected with the source of MOS pipe M31. The drain of the MOS transistor M31 is connected with the gate of the MOS transistor M31, the gate of the MOS transistor M31 is connected with the source of the MOS transistor M30, and the source of the MOS transistor M31 is grounded. The source of the MOS transistor M32 is connected to the power supply VDD, the gate of the MOS transistor M32 is connected to the drain of the MOS transistor M11, and the drain of the MOS transistor M32 is connected to the source of the MOS transistor M33. The source of MOS transistor M33 is connected to the drain of MOS transistor M32, the gate of MOS transistor M33 is connected to the drain of MOS transistor M33, and the drain of MOS transistor M33 is connected to the drain of MOS transistor M34. The drain of MOS transistor M34 is connected with the gate of MOS transistor M33, the gate of MOS transistor M34 is connected with the drain of MOS transistor M27, and the source of MOS transistor M34 is connected with the drain of MOS transistor M35. The drain of the MOS transistor M35 is connected with the source of the MOS transistor M34, the gate of the MOS transistor M35 is connected with the drain of the MOS transistor M28, and the source of the MOS transistor M35 is grounded. The drain of the MOS transistor M36 is connected to the drain of the MOS transistor M34, the gate of the MOS transistor M36 is connected to the gate of the MOS transistor M40, and the source of the MOS transistor M36 is grounded. The source of the MOS transistor M37 is connected to the power supply VDD, the gate of the MOS transistor M37 is connected to the gate of the MOS transistor M38, and the drain of the MOS transistor M37 is connected to the drain of the MOS transistor M38. The drain of MOS transistor M38 is connected to the gate of MOS transistor M41, the gate of MOS transistor M38 is connected to the gate of MOS transistor M18, and the source of MOS transistor M38 is connected to the drain of MOS transistor M39. The drain of MOS transistor M39 is connected to the gate of MOS transistor M39, the gate of MOS transistor M39 is connected to the source of MOS transistor M38, and the source of MOS transistor M39 is connected to the drain of MOS transistor M40. The drain of the MOS transistor M40 is connected with the source of the MOS transistor M39, the gate of the MOS transistor M40 is connected with the drain of the MOS transistor M36, and the source of the MOS transistor M40 is grounded. The source of the MOS transistor M41 is connected to the power supply VDD, the gate of the MOS transistor M41 is connected to the gate of the MOS transistor M42, and the drain of the MOS transistor M41 is connected to the drain of the MOS transistor M42. The drain electrode of MOS pipe M42 is connected with the drain electrode of MOS pipe M41, the gate electrode of MOS pipe M42 is connected with the drain electrode of MOS pipe M37, the source electrode of MOS pipe M42 is connected with the upper end of resistor R2, and the lower end of resistor R2 is connected with the drain electrode of MOS pipe M43. The drain of the MOS transistor M43 is connected with the drain of the MOS transistor M44, the gate of the MOS transistor M43 is connected with the gate of the MOS transistor M13, and the source of the MOS transistor M43 is grounded. The drain of MOS pipe M44 is connected with the lower end of resistor R2, the gate of MOS pipe M44 is connected with the drain of MOS pipe M44, and the source of MOS pipe M44 is grounded. The upper end of the capacitor C2 is connected with the grid of the MOS tube M32, and the lower end of the capacitor C2 is connected with the upper end of the resistor R2. The upper end of the capacitor C3 is connected with the drain electrode of the MOS tube M37, and the lower end of the capacitor C3 is connected with the source electrode of the MOS tube M42. The voltage output port VT is connected with the source electrode of the MOS transistor M42.
The above features are combined with each other to form various embodiments not listed above, and all of them are regarded as the scope of the present invention described in the specification; also, modifications and variations may be suggested to those skilled in the art in light of the above teachings, and it is intended to cover all such modifications and variations as fall within the true spirit and scope of the invention as defined by the appended claims.

Claims (3)

1. A high-stability low-power-consumption linear voltage stabilization integrated circuit composed of a plurality of MOS tubes is characterized by comprising a reference current generation circuit and a stabilized voltage output circuit;
the reference current generating circuit and the stable voltage output circuit can work normally under the working voltage of 0.5V;
the reference current generating circuit can generate the reference current required by the stable voltage output circuit under the condition of not being influenced by the working voltage change and the temperature change;
the stabilized voltage output circuit can output accurate and stable voltage for the use of a post-stage circuit module, and has lower power consumption and higher loop gain.
2. The linear voltage regulator integrated circuit of claim 1, wherein the reference current generating circuit comprises MOS transistors M1-M13, a resistor R1, and a capacitor C1;
the source electrode of the MOS tube M1 is connected with a power supply VDD, the gate electrode of the MOS tube M1 is connected with the gate electrode of the MOS tube M5, and the drain electrode of the MOS tube M1 is connected with the drain electrode of the MOS tube M2; the drain electrode of the MOS tube M2 is connected with the gate electrode of the MOS tube M1, the gate electrode of the MOS tube M2 is connected with the drain electrode of the MOS tube M2, and the source electrode of the MOS tube M2 is connected with the drain electrode of the MOS tube M3; the drain electrode of the MOS tube M3 is connected with the source electrode of the MOS tube M2, the gate electrode of the MOS tube M3 is connected with the gate electrode of the MOS tube M6, and the source electrode of the MOS tube M3 is connected with the drain electrode of the MOS tube M4; the drain electrode of the MOS tube M4 is connected with the source electrode of the MOS tube M3, the gate electrode of the MOS tube M4 is connected with the gate electrode of the M7, and the source electrode of the MOS tube M4 is grounded; the source electrode of the MOS tube M5 is connected with a power supply VDD, the gate electrode of the MOS tube M5 is connected with the drain electrode of the MOS tube M1, the drain electrode of the MOS tube M5 is connected with the upper end of a resistor R1, and the lower end of a resistor R1 is connected with the drain electrode of the MOS tube M6; the drain electrode of the MOS tube M6 is connected with the drain electrode of the MOS tube M8, the gate electrode of the MOS tube M6 is connected with the drain electrode of the MOS tube M6, and the source electrode of the MOS tube M6 is connected with the drain electrode of the MOS tube M7; the drain electrode of the MOS tube M7 is connected with the gate electrode of the MOS tube M7, the gate electrode of the MOS tube M7 is connected with the source electrode of the MOS tube M6, and the source electrode of the MOS tube M7 is grounded; the source electrode of the MOS tube M8 is connected with the source electrode of the MOS tube M9, the gate electrode of the MOS tube M8 is connected with the drain electrode of the MOS tube M9, and the drain electrode of the MOS tube M8 is connected with the lower end of the resistor R1; the source electrode of the MOS tube M9 is connected with a power supply VDD, the gate electrode of the MOS tube M9 is connected with the drain electrode of the MOS tube M10, the drain electrode of the MOS tube M9 is connected with the upper end of a capacitor C1, and the lower end of a capacitor C1 is grounded; the drain electrode of the MOS transistor M10 is connected with the grid electrode of the MOS transistor M10, the grid electrode of the MOS transistor M10 is connected with the grid electrode of the MOS transistor M9, and the source electrode of the MOS transistor M10 is grounded; the source electrode of the MOS tube M11 is connected with a power supply VDD, the gate electrode of the MOS tube M11 is connected with the drain electrode of the MOS tube M11, and the drain electrode of the MOS tube M11 is connected with the source electrode of the MOS tube M12; the source electrode of the MOS tube M12 is connected with the grid electrode of the MOS tube M29, the grid electrode of the MOS tube M12 is connected with the drain electrode of the MOS tube M12, and the drain electrode of the MOS tube M12 is connected with the drain electrode of the MOS tube M13; the drain of the MOS transistor M13 is connected to the gate of the MOS transistor M12, the gate of the MOS transistor M13 is connected to the gate of the MOS transistor M7, and the source of the MOS transistor M13 is grounded.
3. The linear voltage stabilizing integrated circuit with high stability and low power consumption composed of a plurality of MOS tubes as claimed in claim 1, wherein the voltage stabilizing output circuit comprises MOS tubes M14-M43, a resistor R2, capacitors C2-C3, a voltage output port VT;
the source electrode of the MOS tube M14 is connected with a power supply VDD, the gate electrode of the MOS tube M14 is connected with the drain electrode of the MOS tube M14, and the drain electrode of the MOS tube M14 is connected with the source electrode of the MOS tube M15; the source electrode of the MOS tube M15 is connected with the grid electrode of the MOS tube M22, the grid electrode of the MOS tube M15 is connected with the drain electrode of the MOS tube M15, and the drain electrode of the MOS tube M15 is connected with the drain electrode of the MOS tube M16; the drain electrode of the MOS tube M16 is connected with the gate electrode of the MOS tube M15, the gate electrode of the MOS tube M16 is connected with the gate electrode of the MOS tube M44, and the source electrode of the MOS tube M16 is grounded; the source electrode of the MOS transistor M17 is connected with a power supply VDD, the grid electrode of the MOS transistor M17 is connected with the grid electrode of the MOS transistor M18, and the drain electrode of the MOS transistor M17 is connected with the drain electrode of the MOS transistor M18; the drain electrode of the MOS tube M18 is connected with the gate electrode of the MOS tube M17, the gate electrode of the MOS tube M18 is connected with the drain electrode of the MOS tube M17, and the source electrode of the MOS tube M18 is connected with the drain electrode of the MOS tube M19; the drain electrode of the MOS tube M19 is connected with the gate electrode of the MOS tube M19, the gate electrode of the MOS tube M19 is connected with the source electrode of the MOS tube M18, and the source electrode of the MOS tube M19 is connected with the drain electrode of the MOS tube M20; the drain electrode of the MOS tube M20 is connected with the source electrode of the MOS tube M19, the gate electrode of the MOS tube M20 is connected with the gate electrode of the MOS tube M21, and the source electrode of the MOS tube M20 is grounded; the drain electrode of the MOS tube M21 is connected with the drain electrode of the MOS tube M24, the gate electrode of the MOS tube M21 is connected with the drain electrode of the MOS tube M21, and the source electrode of the MOS tube M21 is grounded; the source electrode of the MOS tube M22 is connected with a power supply VDD, the gate electrode of the MOS tube M22 is connected with the gate electrode of the MOS tube M26, and the drain electrode of the MOS tube M22 is connected with the source electrode of the MOS tube M23; the source electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M22, the gate electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M23, and the drain electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M24; the drain electrode of the MOS tube M24 is connected with the grid electrode of the MOS tube M23, the grid electrode of the MOS tube M24 is connected with the grid electrode of the MOS tube M30, and the source electrode of the MOS tube M24 is connected with the drain electrode of the MOS tube M25; the drain electrode of the MOS tube M25 is connected with the source electrode of the MOS tube M24, the gate electrode of the MOS tube M25 is connected with the gate electrode of the MOS tube M31, and the source electrode of the MOS tube M25 is grounded; the source electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M22, the gate electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M23, and the drain electrode of the MOS tube M23 is connected with the drain electrode of the MOS tube M24; the source electrode of the MOS tube M26 is connected with a power supply VDD, the gate electrode of the MOS tube M26 is connected with the drain electrode of the MOS tube M14, and the drain electrode of the MOS tube M26 is connected with the drain electrode of the MOS tube M27; the drain electrode of the MOS tube M27 is connected with the grid electrode of the MOS tube M27, the grid electrode of the MOS tube M27 is connected with the grid electrode of the MOS tube M34, and the source electrode of the MOS tube M27 is connected with the drain electrode of the MOS tube M28; the drain electrode of the MOS tube M28 is connected with the gate electrode of the MOS tube M28, the gate electrode of the MOS tube M28 is connected with the gate electrode of the MOS tube M35, and the source electrode of the MOS tube M28 is grounded;
the source electrode of the MOS tube M29 is connected with a power supply VDD, the gate electrode of the MOS tube M29 is connected with the gate electrode of the MOS tube M32, and the drain electrode of the MOS tube M29 is connected with the drain electrode of the MOS tube M30; the drain electrode of the MOS tube M30 is connected with the gate electrode of the MOS tube M30, the gate electrode of the MOS tube M30 is connected with the drain electrode of the MOS tube M29, and the source electrode of the MOS tube M30 is connected with the source electrode of the MOS tube M31; the drain electrode of the MOS tube M31 is connected with the gate electrode of the MOS tube M31, the gate electrode of the MOS tube M31 is connected with the source electrode of the MOS tube M30, and the source electrode of the MOS tube M31 is grounded; the source electrode of the MOS tube M32 is connected with a power supply VDD, the gate electrode of the MOS tube M32 is connected with the drain electrode of the MOS tube M11, and the drain electrode of the MOS tube M32 is connected with the source electrode of the MOS tube M33; the source electrode of the MOS tube M33 is connected with the drain electrode of the MOS tube M32, the gate electrode of the MOS tube M33 is connected with the drain electrode of the MOS tube M33, and the drain electrode of the MOS tube M33 is connected with the drain electrode of the MOS tube M34; the drain electrode of the MOS tube M34 is connected with the gate electrode of the MOS tube M33, the gate electrode of the MOS tube M34 is connected with the drain electrode of the MOS tube M27, and the source electrode of the MOS tube M34 is connected with the drain electrode of the MOS tube M35; the drain electrode of the MOS tube M35 is connected with the source electrode of the MOS tube M34, the gate electrode of the MOS tube M35 is connected with the drain electrode of the MOS tube M28, and the source electrode of the MOS tube M35 is grounded; the drain electrode of the MOS transistor M36 is connected with the drain electrode of the MOS transistor M34, the gate electrode of the MOS transistor M36 is connected with the gate electrode of the MOS transistor M40, and the source electrode of the MOS transistor M36 is grounded; the source electrode of the MOS tube M37 is connected with a power supply VDD, the gate electrode of the MOS tube M37 is connected with the gate electrode of the MOS tube M38, and the drain electrode of the MOS tube M37 is connected with the drain electrode of the MOS tube M38; the drain electrode of the MOS transistor M38 is connected with the grid electrode of the MOS transistor M41, the grid electrode of the MOS transistor M38 is connected with the grid electrode of the MOS transistor M18, and the source electrode of the MOS transistor M38 is connected with the drain electrode of the MOS transistor M39; the drain electrode of the MOS tube M39 is connected with the gate electrode of the MOS tube M39, the gate electrode of the MOS tube M39 is connected with the source electrode of the MOS tube M38, and the source electrode of the MOS tube M39 is connected with the drain electrode of the MOS tube M40; the drain electrode of the MOS tube M40 is connected with the source electrode of the MOS tube M39, the gate electrode of the MOS tube M40 is connected with the drain electrode of the MOS tube M36, and the source electrode of the MOS tube M40 is grounded; the source electrode of the MOS tube M41 is connected with a power supply VDD, the gate electrode of the MOS tube M41 is connected with the gate electrode of the MOS tube M42, and the drain electrode of the MOS tube M41 is connected with the drain electrode of the MOS tube M42; the drain electrode of the MOS tube M42 is connected with the drain electrode of the MOS tube M41, the gate electrode of the MOS tube M42 is connected with the drain electrode of the MOS tube M37, the source electrode of the MOS tube M42 is connected with the upper end of the resistor R2, and the lower end of the resistor R2 is connected with the drain electrode of the MOS tube M43; the drain electrode of the MOS transistor M43 is connected with the drain electrode of the MOS transistor M44, the gate electrode of the MOS transistor M43 is connected with the gate electrode of the MOS transistor M13, and the source electrode of the MOS transistor M43 is grounded; the drain electrode of the MOS transistor M44 is connected with the lower end of the resistor R2, the gate electrode of the MOS transistor M44 is connected with the drain electrode of the MOS transistor M44, and the source electrode of the MOS transistor M44 is grounded; the upper end of the capacitor C2 is connected with the grid of the MOS tube M32, and the lower end of the capacitor C2 is connected with the upper end of the resistor R2; the upper end of the capacitor C3 is connected with the drain electrode of the MOS tube M37, and the lower end of the capacitor C3 is connected with the source electrode of the MOS tube M42; the voltage output port VT is connected with the source electrode of the MOS transistor M42.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114967817A (en) * 2022-07-13 2022-08-30 深圳爱仕特科技有限公司 Low-power-consumption current source integrated circuit

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1253499A1 (en) * 2001-04-27 2002-10-30 STMicroelectronics S.r.l. Current reference circuit for low supply voltages
US20050035813A1 (en) * 2003-08-13 2005-02-17 Xiaoyu Xi Low voltage low power bandgap circuit
US20080224761A1 (en) * 2007-03-16 2008-09-18 Shenzhen Sts Microelectronics Co., Ltd Opamp-less bandgap voltage reference with high psrr and low voltage in cmos process
US20110109296A1 (en) * 2009-11-10 2011-05-12 STMicroelectronics (Shenzhen) R&D Co. Ltd Voltage Regulator Architecture
CN102073335A (en) * 2011-01-21 2011-05-25 西安华芯半导体有限公司 Pure metal-oxide-semiconductor (MOS) structure high-precision voltage reference source
CN206292654U (en) * 2016-12-28 2017-06-30 桂林电子科技大学 A kind of low-voltage nanowatt magnitude whole CMOS current-mode reference voltage source
CN108241398A (en) * 2018-01-16 2018-07-03 何金昌 A kind of low-power consumption non-resistance reference voltage source and supply unit
CN110502061A (en) * 2018-05-19 2019-11-26 丹阳恒芯电子有限公司 A kind of super low-power consumption reference circuit
CN113608568A (en) * 2021-06-18 2021-11-05 西安电子科技大学 Low-power-consumption low-voltage low-temperature-drift band-gap reference voltage source
US20210356982A1 (en) * 2019-01-31 2021-11-18 Focaltech Electronics (Shenzhen) Co., Ltd. Voltage reference source circuit and low power consumption power supply system

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1253499A1 (en) * 2001-04-27 2002-10-30 STMicroelectronics S.r.l. Current reference circuit for low supply voltages
US20050035813A1 (en) * 2003-08-13 2005-02-17 Xiaoyu Xi Low voltage low power bandgap circuit
US20080224761A1 (en) * 2007-03-16 2008-09-18 Shenzhen Sts Microelectronics Co., Ltd Opamp-less bandgap voltage reference with high psrr and low voltage in cmos process
US20110109296A1 (en) * 2009-11-10 2011-05-12 STMicroelectronics (Shenzhen) R&D Co. Ltd Voltage Regulator Architecture
CN102073335A (en) * 2011-01-21 2011-05-25 西安华芯半导体有限公司 Pure metal-oxide-semiconductor (MOS) structure high-precision voltage reference source
CN206292654U (en) * 2016-12-28 2017-06-30 桂林电子科技大学 A kind of low-voltage nanowatt magnitude whole CMOS current-mode reference voltage source
CN108241398A (en) * 2018-01-16 2018-07-03 何金昌 A kind of low-power consumption non-resistance reference voltage source and supply unit
CN110502061A (en) * 2018-05-19 2019-11-26 丹阳恒芯电子有限公司 A kind of super low-power consumption reference circuit
US20210356982A1 (en) * 2019-01-31 2021-11-18 Focaltech Electronics (Shenzhen) Co., Ltd. Voltage reference source circuit and low power consumption power supply system
CN113608568A (en) * 2021-06-18 2021-11-05 西安电子科技大学 Low-power-consumption low-voltage low-temperature-drift band-gap reference voltage source

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
余华;邹雪城;陈朝阳;: "超低压差线性稳压器的带隙基准电路设计", 半导体技术, no. 07 *
汪宁, 魏同立: "一种具有高电源抑制比的低功耗CMOS带隙基准电压源", 微电子学, no. 03 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114967817A (en) * 2022-07-13 2022-08-30 深圳爱仕特科技有限公司 Low-power-consumption current source integrated circuit

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