CN112486234B - MOS chip sub-threshold low-power-supply reference voltage source circuit - Google Patents
MOS chip sub-threshold low-power-supply reference voltage source circuit Download PDFInfo
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- CN112486234B CN112486234B CN202011430151.2A CN202011430151A CN112486234B CN 112486234 B CN112486234 B CN 112486234B CN 202011430151 A CN202011430151 A CN 202011430151A CN 112486234 B CN112486234 B CN 112486234B
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Abstract
The invention provides a MOS chip sub-threshold low-power supply reference voltage source circuit, which comprises a current temperature compensation circuit and a current-voltage conversion circuit; the current temperature compensation circuit is mainly used for generating reference current which is not greatly influenced by temperature change, and outputting the reference current after obtaining n times of gain; the current-voltage conversion circuit converts the input reference current into reference voltage and outputs the reference voltage; the reference current which is not greatly influenced by temperature change is obtained through the temperature compensation circuit, and the temperature compensation is further carried out in the process of converting the current into the voltage so as to obtain the low-temperature coefficient reference voltage source; most MOS tubes of the invention work in a sub-threshold region, the requirement on the working power supply voltage is low, and the low power supply voltage work of the circuit is realized.
Description
Technical Field
The invention relates to design of a reference voltage source circuit system, in particular to design of a MOS chip sub-threshold low-power supply reference voltage source circuit.
Background
With the increasing demand of electronic equipment on the power consumption of circuits, more and more circuits work in a low-voltage power supply mode. However, the performance of the circuit operating at low supply voltages is degraded, which increases the size and complexity of the circuitry if associated auxiliary circuitry is added. For a reference voltage source circuit, MOS tubes in the circuit are all operated in a sub-threshold region, the requirement on power supply voltage can be effectively reduced, but the linear sensitivity of output voltage is high, and the circuit structure for realizing the output voltage with low temperature coefficient is complex. Aiming at the problems, the invention provides the MOS chip sub-threshold low-power-supply reference voltage source circuit, which effectively reduces the linear sensitivity of output voltage and realizes the output of low-temperature coefficient reference voltage through a simpler circuit structure.
Disclosure of Invention
The invention aims to solve the technical problem of providing a sub-threshold low-power-supply reference voltage source circuit of an MOS chip.
The technical scheme of the invention is as follows:
a MOS chip sub-threshold low-power-supply reference voltage source circuit comprises a current temperature compensation circuit and a current-voltage conversion circuit. The current temperature compensation circuit is mainly used for generating a reference current which is not greatly influenced by temperature change. The current temperature compensation circuit carries out temperature compensation on the substrate of the related MOS tube, so that the drain current of the MOS tube has only small change under the influence of temperature change, and the threshold voltage of the MOS tube is also reduced by the temperature compensation circuit structure. Except that the MOS tube generating the reference current in the current temperature compensation circuit works in a linear region, other MOS tubes all work in a sub-threshold region so as to reduce the requirement of the circuit on the power supply voltage and realize the work under the low power supply voltage. The current temperature compensation circuit enables the generated reference current to obtain n times of gain and then output, and the linear sensitivity of the output reference current is effectively reduced. The current-voltage conversion circuit converts an input reference current into a reference voltage and outputs the reference voltage. The current-voltage conversion circuit enables the output reference voltage to be basically not affected by temperature change, namely to have a lower temperature coefficient by carrying out temperature compensation on the substrate of the related MOS tube. The current temperature compensation circuit and the current voltage conversion circuit avoid the generation of the channel length modulation effect of the circuit and the use of a double-well manufacturing process by adopting a P-type MOS tube and a related circuit connection structure, and effectively reduce the linear sensitivity and the production cost of the circuit.
In a MOS chip sub-threshold low power supply reference voltage source circuit, a current temperature compensation circuit comprises MOS tubes M1-M18. The current temperature compensation circuit is mainly used for generating a reference current which is not greatly influenced by temperature change. MOS transistors M5, M6, and M7 operate in the linear region, and MOS transistors M1 to M4 and MOS transistors M8 to M18 all operate in the subthreshold region. The MOS tubes M1 to M4 are connected to form a temperature compensation circuit and are respectively connected with the substrates of the MOS tubes M5, M6 and M7. Under the action of the temperature compensation circuit, the current values of the branches where the MOS tubes M5, M6 and M7 are located are in inverse proportion to the change of the temperature, and only slightly change under the influence of the change of the temperature. The circuit connection structure of the temperature compensation circuit and the substrate of the MOS transistors M5, M6 and M7 also reduces the threshold voltage of the MOS transistors M5, M6 and M7, and even if the MOS transistors M5, M6 and M7 work in a linear region, the requirement on the power supply voltage is not high, so that the circuit can work under a low power supply voltage. The MOS tubes M5, M6 and M7 adopt the maximum channel length in parameter setting as much as possible so as to further reduce the threshold voltage of the MOS tubes. The circuit formed by connecting the MOS transistors M9 to M18 obtains n-fold gain and outputs the reference current generated in the branches of the MOS transistors M5, M6 and M7 through parameter setting and related circuit structure setting, and the linear sensitivity of the output reference current is effectively reduced.
In the current temperature compensation circuit, the source of the MOS transistor M1 is connected with a power supply VDD, the gate of the MOS transistor M1 is connected with the drain of the MOS transistor M2, and the drain of the MOS transistor M1 is connected with the source of the MOS transistor M2. The source of MOS transistor M2 is connected to the drain of MOS transistor M4, the gate of MOS transistor M2 is connected to the gate of MOS transistor M1, and the drain of MOS transistor M2 is connected to the drain of MOS transistor M3. The drain of the MOS transistor M3 is connected with the gate of the MOS transistor M2, the gate of the MOS transistor M3 is connected with the gate of the MOS transistor M8, and the source of the MOS transistor M3 is grounded. The source of MOS transistor M4 is connected to power VDD, the gate of MOS transistor M4 is connected to the drain of MOS transistor M4, and the drain of MOS transistor M4 is connected to the drain of MOS transistor M1. The source of MOS pipe M5 is connected with power VDD, the gate of MOS pipe M5 is connected with the gate of MOS pipe M6, the drain of MOS pipe M5 is connected with the source of MOS pipe M6, and the substrate of MOS pipe M5 is connected with the gate of MOS pipe M4. The source of MOS transistor M6 is connected with the source of MOS transistor M9, the gate of MOS transistor M6 is connected with the gate of MOS transistor M7, the drain of MOS transistor M6 is connected with the source of MOS transistor M7, and the substrate of MOS transistor M6 is connected with the gate of MOS transistor M2. The source electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M6, the gate electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M7, the drain electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M8, and the substrate of the MOS tube M7 is connected with the substrate of the MOS tube M6. The drain of the MOS transistor M8 is connected with the gate of the MOS transistor M7, the gate of the MOS transistor M8 is connected with the gate of the MOS transistor M10, and the source of the MOS transistor M8 is grounded. The source of MOS transistor M9 is connected to the drain of MOS transistor M5, the gate of MOS transistor M9 is connected to the gate of MOS transistor M12, and the drain of MOS transistor M9 is connected to the drain of MOS transistor M10. The drain of the MOS transistor M10 is connected with the gate of the MOS transistor M9, the gate of the MOS transistor M10 is connected with the gate of the MOS transistor M18, and the source of the MOS transistor M10 is grounded. The source of MOS pipe M11 is connected with power VDD, the gate of MOS pipe M11 is connected with the source of MOS pipe M11, and the drain of MOS pipe M11 is connected with the source of MOS pipe M12. The source of MOS transistor M12 is connected to the drain of MOS transistor M11, the gate of MOS transistor M12 is connected to the drain of MOS transistor M9, and the drain of MOS transistor M12 is connected to the drain of MOS transistor M13. The drain of MOS transistor M13 is connected with the drain of MOS transistor M12, the gate of MOS transistor M13 is connected with the gate of MOS transistor M16, and the source of MOS transistor M13 is grounded. The source of MOS pipe M14 is connected with power VDD, the gate of MOS pipe M14 is connected with the source of MOS pipe M14, and the drain of MOS pipe M14 is connected with the source of MOS pipe M15. The source of MOS transistor M15 is connected to the drain of MOS transistor M14, the gate of MOS transistor M15 is connected to the gate of MOS transistor M17, and the drain of MOS transistor M15 is connected to the drain of MOS transistor M16. The drain of MOS transistor M16 is connected to the gate of MOS transistor M18, the gate of MOS transistor M16 is connected to the drain of MOS transistor M13, and the source of MOS transistor M16 is grounded. The source of MOS transistor M17 is connected to power VDD, the gate of MOS transistor M17 is connected to the drain of MOS transistor M17, and the drain of MOS transistor M17 is connected to the drain of MOS transistor M18. The drain of the MOS transistor M18 is connected with the gate of the MOS transistor M17, the gate of the MOS transistor M18 is connected with the gate of the MOS transistor M10, and the source of the MOS transistor M18 is grounded.
In the MOS chip sub-threshold low power supply reference voltage source circuit, a current-voltage conversion circuit comprises MOS transistors M19-M30 and an output port VREF. The current-voltage conversion circuit converts an input reference current into a reference voltage and outputs the reference voltage. The MOS transistors M19-M30 all operate in the subthreshold region. The circuit structure formed by connecting the MOS transistors M20 to M30 realizes the temperature compensation of the output reference voltage through the substrates connected with the MOS transistors M27, M28 and M29 respectively, so that the output reference voltage has a low temperature coefficient. The difference between the gate-source voltages of the MOS transistor M30 and the MOS transistor M27 is used as a reference voltage and is output through a port VREF.
In the current-voltage conversion circuit, the source of the MOS transistor M19 is connected to the power supply VDD, the gate of the MOS transistor M19 is connected to the gate of the MOS transistor M17, and the drain of the MOS transistor M19 is connected to the source of the MOS transistor M20. The source of MOS transistor M20 is connected with the drain of MOS transistor M19, the gate of MOS transistor M20 is connected with the source of MOS transistor M20, and the drain of MOS transistor M20 is connected with the source of MOS transistor M22. The source of MOS transistor M21 is connected to the drain of MOS transistor M20, the gate of MOS transistor M21 is connected to the drain of MOS transistor M21, and the drain of MOS transistor M21 is connected to the drain of MOS transistor M22. The source of MOS transistor M22 is connected with the source of MOS transistor M21, the gate of MOS transistor M22 is connected with the gate of MOS transistor M23, and the drain of MOS transistor M22 is connected with the drain of MOS transistor M24. The source of MOS transistor M23 is connected with the source of MOS transistor M22, the gate of MOS transistor M23 is connected with the drain of MOS transistor M22, and the drain of MOS transistor M23 is connected with the gate of MOS transistor M22. The drain of the MOS transistor M24 is connected with the drain of the MOS transistor M21, the gate of the MOS transistor M24 is connected with the source of the MOS transistor M21, and the source of the MOS transistor M24 is grounded. The source of MOS pipe M25 is connected with power VDD, the gate of MOS pipe M25 is connected with the gate of MOS pipe M19, and the drain of MOS pipe M25 is connected with the source of MOS pipe M26. The source of MOS transistor M26 is connected with the drain of MOS transistor M25, the gate of MOS transistor M26 is connected with the source of MOS transistor M26, and the drain of MOS transistor M26 is connected with the source of MOS transistor M28. The source of MOS transistor M27 is connected with the source of MOS transistor M28, the gate of MOS transistor M27 is connected with the drain of MOS transistor M27, the drain of MOS transistor M27 is connected with the drain of MOS transistor M28, and the substrate of MOS transistor M27 is connected with the substrate of MOS transistor M28. The source of MOS transistor M28 is connected with the source of MOS transistor M29, the gate of MOS transistor M28 is connected with the gate of MOS transistor M27, the drain of MOS transistor M28 is connected with the drain of MOS transistor M30, and the substrate of MOS transistor M28 is connected with the drain of MOS transistor M23. The source electrode of the MOS tube M29 is connected with the grid electrode of the MOS tube M30, the grid electrode of the MOS tube M29 is connected with the drain electrode of the MOS tube M29, the drain electrode of the MOS tube M29 is connected with the drain electrode of the MOS tube M28, and the substrate of the MOS tube M29 is connected with the substrate of the MOS tube M28. The drain of the MOS transistor M30 is connected to the port VREF, the gate of the MOS transistor M30 is connected to the source of the MOS transistor M27, and the source of the MOS transistor M30 is grounded.
The invention provides a sub-threshold low-power-supply reference voltage source circuit of an MOS chip. The invention obtains the reference current which is not greatly influenced by temperature change through the temperature compensation circuit, and further performs temperature compensation in the process of converting the current into the voltage so as to obtain the low-temperature coefficient reference voltage source. Most MOS tubes of the invention work in a sub-threshold region, the requirement on the working power supply voltage is low, and the low power supply voltage work of the circuit is realized. The circuit of the invention adopts the P-type MOS tube and the related circuit connection structure, thereby avoiding the generation of the channel length modulation effect of the circuit and the use of the double-well manufacturing process and effectively reducing the linear sensitivity and the production cost of the circuit.
Drawings
Fig. 1 is a circuit configuration diagram of the present invention.
Detailed Description
In order to facilitate an understanding of the invention, the invention is described in more detail below with reference to the accompanying drawings and specific examples. The preferred embodiments of the present invention are set forth in the specification and drawings, however, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It should be noted that when an element is fixed to another element, it includes fixing the element directly to the other element or fixing the element to the other element through at least one other element interposed therebetween. When an element is connected to another element, it includes directly connecting the element to the other element or connecting the element to the other element through at least one intervening other element.
As shown in fig. 1, the present invention includes a current temperature compensation circuit and a current-voltage conversion circuit. The current temperature compensation circuit is mainly used for generating a reference current which is not greatly influenced by temperature change. The current temperature compensation circuit carries out temperature compensation on the substrate of the related MOS tube, so that the drain current of the MOS tube has only small change under the influence of temperature change, and the threshold voltage of the MOS tube is also reduced by the temperature compensation circuit structure. Except that the MOS tube generating the reference current in the current temperature compensation circuit works in a linear region, other MOS tubes all work in a sub-threshold region so as to reduce the requirement of the circuit on the power supply voltage and realize the work under the low power supply voltage. The current temperature compensation circuit enables the generated reference current to obtain n times of gain and then output, and the linear sensitivity of the output reference current is effectively reduced. The current-voltage conversion circuit converts an input reference current into a reference voltage and outputs the reference voltage. The current-voltage conversion circuit enables the output reference voltage to be basically not affected by temperature change, namely to have a lower temperature coefficient by carrying out temperature compensation on the substrate of the related MOS tube. The current temperature compensation circuit and the current voltage conversion circuit avoid the generation of the channel length modulation effect of the circuit and the use of a double-well manufacturing process by adopting a P-type MOS tube and a related circuit connection structure, and effectively reduce the linear sensitivity and the production cost of the circuit.
As shown in fig. 1, the current temperature compensation circuit includes MOS transistors M1 to M18. The current temperature compensation circuit is mainly used for generating a reference current which is not greatly influenced by temperature change. MOS transistors M5, M6, and M7 operate in the linear region, and MOS transistors M1 to M4 and MOS transistors M8 to M18 all operate in the subthreshold region. The MOS tubes M1 to M4 are connected to form a temperature compensation circuit and are respectively connected with the substrates of the MOS tubes M5, M6 and M7. Under the action of the temperature compensation circuit, the current values of the branches where the MOS tubes M5, M6 and M7 are located are in inverse proportion to the change of the temperature, and only slightly change under the influence of the change of the temperature. The circuit connection structure of the temperature compensation circuit and the substrate of the MOS transistors M5, M6 and M7 also reduces the threshold voltage of the MOS transistors M5, M6 and M7, and even if the MOS transistors M5, M6 and M7 work in a linear region, the requirement on the power supply voltage is not high, so that the circuit can work under a low power supply voltage. The MOS tubes M5, M6 and M7 adopt the maximum channel length in parameter setting as much as possible so as to further reduce the threshold voltage of the MOS tubes. The circuit formed by connecting the MOS transistors M9 to M18 obtains n-fold gain and outputs the reference current generated in the branches of the MOS transistors M5, M6 and M7 through parameter setting and related circuit structure setting, and the linear sensitivity of the output reference current is effectively reduced.
As shown in fig. 1, the source of the MOS transistor M1 is connected to the power supply VDD, the gate of the MOS transistor M1 is connected to the drain of the MOS transistor M2, and the drain of the MOS transistor M1 is connected to the source of the MOS transistor M2. The source of MOS transistor M2 is connected to the drain of MOS transistor M4, the gate of MOS transistor M2 is connected to the gate of MOS transistor M1, and the drain of MOS transistor M2 is connected to the drain of MOS transistor M3. The drain of the MOS transistor M3 is connected with the gate of the MOS transistor M2, the gate of the MOS transistor M3 is connected with the gate of the MOS transistor M8, and the source of the MOS transistor M3 is grounded. The source of MOS transistor M4 is connected to power VDD, the gate of MOS transistor M4 is connected to the drain of MOS transistor M4, and the drain of MOS transistor M4 is connected to the drain of MOS transistor M1. The source of MOS pipe M5 is connected with power VDD, the gate of MOS pipe M5 is connected with the gate of MOS pipe M6, the drain of MOS pipe M5 is connected with the source of MOS pipe M6, and the substrate of MOS pipe M5 is connected with the gate of MOS pipe M4. The source of MOS transistor M6 is connected with the source of MOS transistor M9, the gate of MOS transistor M6 is connected with the gate of MOS transistor M7, the drain of MOS transistor M6 is connected with the source of MOS transistor M7, and the substrate of MOS transistor M6 is connected with the gate of MOS transistor M2. The source electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M6, the gate electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M7, the drain electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M8, and the substrate of the MOS tube M7 is connected with the substrate of the MOS tube M6. The drain of the MOS transistor M8 is connected with the gate of the MOS transistor M7, the gate of the MOS transistor M8 is connected with the gate of the MOS transistor M10, and the source of the MOS transistor M8 is grounded. The source of MOS transistor M9 is connected to the drain of MOS transistor M5, the gate of MOS transistor M9 is connected to the gate of MOS transistor M12, and the drain of MOS transistor M9 is connected to the drain of MOS transistor M10. The drain of the MOS transistor M10 is connected with the gate of the MOS transistor M9, the gate of the MOS transistor M10 is connected with the gate of the MOS transistor M18, and the source of the MOS transistor M10 is grounded. The source of MOS pipe M11 is connected with power VDD, the gate of MOS pipe M11 is connected with the source of MOS pipe M11, and the drain of MOS pipe M11 is connected with the source of MOS pipe M12. The source of MOS transistor M12 is connected to the drain of MOS transistor M11, the gate of MOS transistor M12 is connected to the drain of MOS transistor M9, and the drain of MOS transistor M12 is connected to the drain of MOS transistor M13. The drain of MOS transistor M13 is connected with the drain of MOS transistor M12, the gate of MOS transistor M13 is connected with the gate of MOS transistor M16, and the source of MOS transistor M13 is grounded. The source of MOS pipe M14 is connected with power VDD, the gate of MOS pipe M14 is connected with the source of MOS pipe M14, and the drain of MOS pipe M14 is connected with the source of MOS pipe M15. The source of MOS transistor M15 is connected to the drain of MOS transistor M14, the gate of MOS transistor M15 is connected to the gate of MOS transistor M17, and the drain of MOS transistor M15 is connected to the drain of MOS transistor M16. The drain of MOS transistor M16 is connected to the gate of MOS transistor M18, the gate of MOS transistor M16 is connected to the drain of MOS transistor M13, and the source of MOS transistor M16 is grounded. The source of MOS transistor M17 is connected to power VDD, the gate of MOS transistor M17 is connected to the drain of MOS transistor M17, and the drain of MOS transistor M17 is connected to the drain of MOS transistor M18. The drain of the MOS transistor M18 is connected with the gate of the MOS transistor M17, the gate of the MOS transistor M18 is connected with the gate of the MOS transistor M10, and the source of the MOS transistor M18 is grounded.
As shown in fig. 1, the current-voltage conversion circuit includes MOS transistors M19 to M30, and an output port VREF. The current-voltage conversion circuit converts an input reference current into a reference voltage and outputs the reference voltage. The MOS transistors M19-M30 all operate in the subthreshold region. The circuit structure formed by connecting the MOS transistors M20 to M30 realizes the temperature compensation of the output reference voltage through the substrates connected with the MOS transistors M27, M28 and M29 respectively, so that the output reference voltage has a low temperature coefficient. The difference between the gate-source voltages of the MOS transistor M30 and the MOS transistor M27 is used as a reference voltage and is output through a port VREF.
As shown in fig. 1, the source of the MOS transistor M19 is connected to the power supply VDD, the gate of the MOS transistor M19 is connected to the gate of the MOS transistor M17, and the drain of the MOS transistor M19 is connected to the source of the MOS transistor M20. The source of MOS transistor M20 is connected with the drain of MOS transistor M19, the gate of MOS transistor M20 is connected with the source of MOS transistor M20, and the drain of MOS transistor M20 is connected with the source of MOS transistor M22. The source of MOS transistor M21 is connected to the drain of MOS transistor M20, the gate of MOS transistor M21 is connected to the drain of MOS transistor M21, and the drain of MOS transistor M21 is connected to the drain of MOS transistor M22. The source of MOS transistor M22 is connected with the source of MOS transistor M21, the gate of MOS transistor M22 is connected with the gate of MOS transistor M23, and the drain of MOS transistor M22 is connected with the drain of MOS transistor M24. The source of MOS transistor M23 is connected with the source of MOS transistor M22, the gate of MOS transistor M23 is connected with the drain of MOS transistor M22, and the drain of MOS transistor M23 is connected with the gate of MOS transistor M22. The drain of the MOS transistor M24 is connected with the drain of the MOS transistor M21, the gate of the MOS transistor M24 is connected with the source of the MOS transistor M21, and the source of the MOS transistor M24 is grounded. The source of MOS pipe M25 is connected with power VDD, the gate of MOS pipe M25 is connected with the gate of MOS pipe M19, and the drain of MOS pipe M25 is connected with the source of MOS pipe M26. The source of MOS transistor M26 is connected with the drain of MOS transistor M25, the gate of MOS transistor M26 is connected with the source of MOS transistor M26, and the drain of MOS transistor M26 is connected with the source of MOS transistor M28. The source of MOS transistor M27 is connected with the source of MOS transistor M28, the gate of MOS transistor M27 is connected with the drain of MOS transistor M27, the drain of MOS transistor M27 is connected with the drain of MOS transistor M28, and the substrate of MOS transistor M27 is connected with the substrate of MOS transistor M28. The source of MOS transistor M28 is connected with the source of MOS transistor M29, the gate of MOS transistor M28 is connected with the gate of MOS transistor M27, the drain of MOS transistor M28 is connected with the drain of MOS transistor M30, and the substrate of MOS transistor M28 is connected with the drain of MOS transistor M23. The source electrode of the MOS tube M29 is connected with the grid electrode of the MOS tube M30, the grid electrode of the MOS tube M29 is connected with the drain electrode of the MOS tube M29, the drain electrode of the MOS tube M29 is connected with the drain electrode of the MOS tube M28, and the substrate of the MOS tube M29 is connected with the substrate of the MOS tube M28. The drain of the MOS transistor M30 is connected to the port VREF, the gate of the MOS transistor M30 is connected to the source of the MOS transistor M27, and the source of the MOS transistor M30 is grounded.
In the MOS chip sub-threshold low-power-supply reference voltage source circuit, under the condition of a 0.18 mu M production process, the width-length ratio of an MOS tube M1 is 4:10, the width-length ratio of an MOS tube M2 is 6:10, the width-length ratio of an MOS tube M3 is 12:10, the width-length ratio of an MOS tube M4 is 32:10, the width-length ratio of an MOS tube M5 is 5:10, the width-length ratio of an MOS tube M6 is 0.25:10, the width-length ratio of an MOS tube M7 is 0.25:10, the width-length ratio of an MOS tube M8 is 0.25:10, the width-length ratio of an MOS tube M9 is 12:10, the width-length ratio of an MOS tube M10 is 18:10, the width-length ratio of an MOS tube M11 is 0.35:10, the width-length ratio of an MOS tube M12 is 4:10, the width-length ratio of an MOS tube M13 is 6:10, the width-length ratio of an MOS tube M14 is 16, the width-length ratio of an MOS tube M638 is 3: 10, the width-length ratio of an MOS tube M638 is 19: 10, the width-length ratio of the MOS transistor M20 is 32:10, the width-length ratio of the MOS transistor M21 is 2:10, the width-length ratio of the MOS transistor M22 is 12:10, the width-length ratio of the MOS transistor M23 is 4:10, the width-length ratio of the MOS transistor M24 is 6:10, the width-length ratio of the MOS transistor M25 is 32:10, the width-length ratio of the MOS transistor M26 is 2:10, the width-length ratio of the MOS transistor M27 is 18:10, the width-length ratio of the MOS transistor M28 is 9:10, the width-length ratio of the MOS transistor M29 is 4:10, and the width-length ratio of the MOS transistor M30 is 1: 10. The power supply VDD is 0.6V, the output reference voltage is 160mV, the temperature coefficient is 35.7 ppm/DEG C, and the linear sensitivity is 0.08%.
The technical features mentioned above are combined with each other to form various embodiments which are not listed above, and all of them are regarded as the scope of the present invention described in the specification; also, modifications and variations may be suggested to those skilled in the art in light of the above teachings, and it is intended to cover all such modifications and variations as fall within the true spirit and scope of the invention as defined by the appended claims.
Claims (1)
1. A MOS chip sub-threshold low power supply reference voltage source circuit is characterized by comprising a current temperature compensation circuit and a current-voltage conversion circuit;
the current temperature compensation circuit is mainly used for generating reference current which is not greatly influenced by temperature change;
the current-voltage conversion circuit converts the input reference current into reference voltage and outputs the reference voltage;
the current temperature compensation circuit comprises MOS transistors M1-M18;
the current-voltage conversion circuit comprises MOS transistors M19-M30 and an output port VREF;
the source electrode of the MOS tube M1 is connected with a power supply VDD, the gate electrode of the MOS tube M1 is connected with the drain electrode of the MOS tube M2, and the drain electrode of the MOS tube M1 is connected with the source electrode of the MOS tube M2; the source electrode of the MOS transistor M2 is connected with the drain electrode of the MOS transistor M4, the gate electrode of the MOS transistor M2 is connected with the gate electrode of the MOS transistor M1, and the drain electrode of the MOS transistor M2 is connected with the drain electrode of the MOS transistor M3; the drain electrode of the MOS transistor M3 is connected with the gate electrode of the MOS transistor M2, the gate electrode of the MOS transistor M3 is connected with the gate electrode of the MOS transistor M8, and the source electrode of the MOS transistor M3 is grounded; the source electrode of the MOS tube M4 is connected with a power supply VDD, the gate electrode of the MOS tube M4 is connected with the drain electrode of the MOS tube M4, and the drain electrode of the MOS tube M4 is connected with the drain electrode of the MOS tube M1; the source electrode of the MOS tube M5 is connected with a power supply VDD, the gate electrode of the MOS tube M5 is connected with the gate electrode of the MOS tube M6, the drain electrode of the MOS tube M5 is connected with the source electrode of the MOS tube M6, and the substrate of the MOS tube M5 is connected with the gate electrode of the MOS tube M4; the source electrode of the MOS tube M6 is connected with the source electrode of the MOS tube M9, the gate electrode of the MOS tube M6 is connected with the gate electrode of the MOS tube M7, the drain electrode of the MOS tube M6 is connected with the source electrode of the MOS tube M7, and the substrate of the MOS tube M6 is connected with the gate electrode of the MOS tube M2; the source electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M6, the gate electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M7, the drain electrode of the MOS tube M7 is connected with the drain electrode of the MOS tube M8, and the substrate of the MOS tube M7 is connected with the substrate of the MOS tube M6; the drain electrode of the MOS transistor M8 is connected with the gate electrode of the MOS transistor M7, the gate electrode of the MOS transistor M8 is connected with the gate electrode of the MOS transistor M10, and the source electrode of the MOS transistor M8 is grounded; the source electrode of the MOS transistor M9 is connected with the drain electrode of the MOS transistor M5, the gate electrode of the MOS transistor M9 is connected with the gate electrode of the MOS transistor M12, and the drain electrode of the MOS transistor M9 is connected with the drain electrode of the MOS transistor M10; the drain electrode of the MOS transistor M10 is connected with the gate electrode of the MOS transistor M9, the gate electrode of the MOS transistor M10 is connected with the gate electrode of the MOS transistor M18, and the source electrode of the MOS transistor M10 is grounded; the source electrode of the MOS tube M11 is connected with a power supply VDD, the gate electrode of the MOS tube M11 is connected with the source electrode of the MOS tube M11, and the drain electrode of the MOS tube M11 is connected with the source electrode of the MOS tube M12; the source electrode of the MOS tube M12 is connected with the drain electrode of the MOS tube M11, the gate electrode of the MOS tube M12 is connected with the drain electrode of the MOS tube M9, and the drain electrode of the MOS tube M12 is connected with the drain electrode of the MOS tube M13; the drain electrode of the MOS tube M13 is connected with the drain electrode of the MOS tube M12, the gate electrode of the MOS tube M13 is connected with the gate electrode of the MOS tube M16, and the source electrode of the MOS tube M13 is grounded; the source electrode of the MOS tube M14 is connected with a power supply VDD, the gate electrode of the MOS tube M14 is connected with the source electrode of the MOS tube M14, and the drain electrode of the MOS tube M14 is connected with the source electrode of the MOS tube M15; the source electrode of the MOS transistor M15 is connected with the drain electrode of the MOS transistor M14, the gate electrode of the MOS transistor M15 is connected with the gate electrode of the MOS transistor M17, and the drain electrode of the MOS transistor M15 is connected with the drain electrode of the MOS transistor M16; the drain electrode of the MOS tube M16 is connected with the gate electrode of the MOS tube M18, the gate electrode of the MOS tube M16 is connected with the drain electrode of the MOS tube M13, and the source electrode of the MOS tube M16 is grounded; the source electrode of the MOS tube M17 is connected with a power supply VDD, the gate electrode of the MOS tube M17 is connected with the drain electrode of the MOS tube M17, and the drain electrode of the MOS tube M17 is connected with the drain electrode of the MOS tube M18; the drain electrode of the MOS transistor M18 is connected with the gate electrode of the MOS transistor M17, the gate electrode of the MOS transistor M18 is connected with the gate electrode of the MOS transistor M10, and the source electrode of the MOS transistor M18 is grounded;
the source electrode of the MOS tube M19 is connected with a power supply VDD, the gate electrode of the MOS tube M19 is connected with the gate electrode of the MOS tube M17, and the drain electrode of the MOS tube M19 is connected with the source electrode of the MOS tube M20; the source electrode of the MOS transistor M20 is connected with the drain electrode of the MOS transistor M19, the gate electrode of the MOS transistor M20 is connected with the source electrode of the MOS transistor M20, and the drain electrode of the MOS transistor M20 is connected with the source electrode of the MOS transistor M22; the source electrode of the MOS tube M21 is connected with the drain electrode of the MOS tube M20, the gate electrode of the MOS tube M21 is connected with the drain electrode of the MOS tube M21, and the drain electrode of the MOS tube M21 is connected with the drain electrode of the MOS tube M22; the source electrode of the MOS transistor M22 is connected with the source electrode of the MOS transistor M21, the gate electrode of the MOS transistor M22 is connected with the gate electrode of the MOS transistor M23, and the drain electrode of the MOS transistor M22 is connected with the drain electrode of the MOS transistor M24; the source electrode of the MOS transistor M23 is connected with the source electrode of the MOS transistor M22, the gate electrode of the MOS transistor M23 is connected with the drain electrode of the MOS transistor M22, and the drain electrode of the MOS transistor M23 is connected with the gate electrode of the MOS transistor M22; the drain electrode of the MOS tube M24 is connected with the drain electrode of the MOS tube M21, the gate electrode of the MOS tube M24 is connected with the source electrode of the MOS tube M21, and the source electrode of the MOS tube M24 is grounded; the source electrode of the MOS tube M25 is connected with a power supply VDD, the gate electrode of the MOS tube M25 is connected with the gate electrode of the MOS tube M19, and the drain electrode of the MOS tube M25 is connected with the source electrode of the MOS tube M26; the source electrode of the MOS transistor M26 is connected with the drain electrode of the MOS transistor M25, the gate electrode of the MOS transistor M26 is connected with the source electrode of the MOS transistor M26, and the drain electrode of the MOS transistor M26 is connected with the source electrode of the MOS transistor M28; the source electrode of the MOS tube M27 is connected with the source electrode of the MOS tube M28, the gate electrode of the MOS tube M27 is connected with the drain electrode of the MOS tube M27, the drain electrode of the MOS tube M27 is connected with the drain electrode of the MOS tube M28, and the substrate of the MOS tube M27 is connected with the substrate of the MOS tube M28; the source electrode of the MOS tube M28 is connected with the source electrode of the MOS tube M29, the gate electrode of the MOS tube M28 is connected with the gate electrode of the MOS tube M27, the drain electrode of the MOS tube M28 is connected with the drain electrode of the MOS tube M30, and the substrate of the MOS tube M28 is connected with the drain electrode of the MOS tube M23; the source electrode of the MOS tube M29 is connected with the gate electrode of the MOS tube M30, the gate electrode of the MOS tube M29 is connected with the drain electrode of the MOS tube M29, the drain electrode of the MOS tube M29 is connected with the drain electrode of the MOS tube M28, and the substrate of the MOS tube M29 is connected with the substrate of the MOS tube M28; the drain of the MOS transistor M30 is connected to the port VREF, the gate of the MOS transistor M30 is connected to the source of the MOS transistor M27, and the source of the MOS transistor M30 is grounded.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5479091A (en) * | 1992-12-11 | 1995-12-26 | Texas Instruments Incorporated | Output current reference circuit and method |
| CN103294100A (en) * | 2013-06-01 | 2013-09-11 | 湘潭芯力特电子科技有限公司 | Reference current source circuit compensating resistor temperature drift coefficient |
| CN104102265A (en) * | 2014-06-30 | 2014-10-15 | 电子科技大学 | Current source circuit with high-precision temperature compensation |
| CN107422775A (en) * | 2017-09-01 | 2017-12-01 | 无锡泽太微电子有限公司 | Suitable for the voltage reference circuit of low supply voltage work |
-
2020
- 2020-12-09 CN CN202011430151.2A patent/CN112486234B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5479091A (en) * | 1992-12-11 | 1995-12-26 | Texas Instruments Incorporated | Output current reference circuit and method |
| CN103294100A (en) * | 2013-06-01 | 2013-09-11 | 湘潭芯力特电子科技有限公司 | Reference current source circuit compensating resistor temperature drift coefficient |
| CN104102265A (en) * | 2014-06-30 | 2014-10-15 | 电子科技大学 | Current source circuit with high-precision temperature compensation |
| CN107422775A (en) * | 2017-09-01 | 2017-12-01 | 无锡泽太微电子有限公司 | Suitable for the voltage reference circuit of low supply voltage work |
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Effective date of registration: 20220809 Address after: 518000 804-807, 8th floor, Huangjia center, 1st East Ring Road, Yousong community, Longhua street, Longhua District, Shenzhen City, Guangdong Province Patentee after: Shenzhen Daohe Industry Co.,Ltd. Address before: 518000 Room 201, building A, No. 1, Qian Wan Road, Qianhai Shenzhen Hong Kong cooperation zone, Shenzhen, Guangdong (Shenzhen Qianhai business secretary Co., Ltd.) Patentee before: Zonghan Diantong Technology (Shenzhen) Co.,Ltd. |