CN204595665U - A kind of low-temperature coefficient low voltage CMOS band-gap reference - Google Patents

Abstract

The utility model discloses a kind of low-temperature coefficient low voltage CMOS band-gap reference, it relates to reference source technical field.3rd insulated gate bipolar transistor, the collector of the 4th insulated gate bipolar transistor all connects the gate pole of the second insulated gate bipolar transistor, the gate pole of the 4th insulated gate bipolar transistor connects the gate pole of the 6th insulated gate bipolar transistor, first triode, the emitter of the 3rd triode connects the 7th insulated gate bipolar transistor respectively, the collector of the 9th insulated gate bipolar transistor, 7th insulated gate bipolar transistor, the collector of the 8th insulated gate bipolar transistor connects the negative pole end of operation amplifier circuit respectively, positive terminal, the gate pole of output termination first insulated gate bipolar transistor of operation amplifier circuit.The utility model reduces the temperature coefficient of band gap reference, ensure that high-precision request for utilization, has very wide using value.

Description

A kind of low-temperature coefficient low voltage CMOS band-gap reference

Technical field

The utility model relates to reference source technical field, be specifically related to a kind of low-temperature coefficient low voltage CMOS band-gap reference.

Background technology

Integrated circuit technique and semiconductor technology are developed so far, particularly under the support of deep-submicron and sub-micro technology, the supply voltage of various chip is more and more lower, for meeting more and more lower supply voltage application, reference source circuit also should improve in the trend of low pressure, in addition, along with the appearance of the High Definition Systems such as such as more than 18 ADC, common band-gap reference is difficult to meet more high-precision requirement, and any deviation of benchmark and noise all seriously can affect the linearity and the precision of other circuit.Therefore, the degree of accuracy of system depends on the precision of inside or outside reference to a great extent, the reference circuit that neither one meets the demands, just correctly effectively can not realize the performance that system presets, so must be reduced the temperature coefficient of band gap reference further by business rank technique for temperature compensation, the performance and the integrated level that how to improve reference source are the focuses that this field people study always.

Utility model content

For the deficiency that prior art exists, the utility model object is to provide a kind of low-temperature coefficient low voltage CMOS band-gap reference, and structure is simple, reasonable in design, reduce the temperature coefficient of band gap reference, ensure that high-precision request for utilization, there is very wide using value.

To achieve these goals, the utility model realizes by the following technical solutions: a kind of low-temperature coefficient low voltage CMOS band-gap reference, comprise the first insulated gate bipolar transistor-ten insulated gate bipolar transistor, first resistance-six resistance, first triode-three triode and operation amplifier circuit, the gate pole of the first insulated gate bipolar transistor respectively with the 5th insulated gate bipolar transistor, the gate pole of the 7th insulated gate bipolar transistor-ten insulated gate bipolar transistor connects, the gate pole of the first insulated gate bipolar transistor also connects the collector of the second insulated gate bipolar transistor, the collector of the first insulated gate bipolar transistor is connected with emitter, first insulated gate bipolar transistor, 3rd insulated gate bipolar transistor, 5th insulated gate bipolar transistor, the emitter of the 7th insulated gate bipolar transistor-ten insulated gate bipolar transistor is all connected to power supply vdd terminal, 3rd insulated gate bipolar transistor, the collector of the 4th insulated gate bipolar transistor all connects the gate pole of the second insulated gate bipolar transistor, the emitter of the second insulated gate bipolar transistor, the gate pole of the 3rd insulated gate bipolar transistor, the emitter of the 4th insulated gate bipolar transistor, the equal earth terminal of emitter of the 6th insulated gate bipolar transistor, the collector of the tenth insulated gate bipolar transistor connects the 6th resistance and extremely holds, the gate pole of the 4th insulated gate bipolar transistor connects the gate pole of the 6th insulated gate bipolar transistor, the gate pole of the 6th insulated gate bipolar transistor, collector all connects the collector of the 5th insulated gate bipolar transistor, the base stage of the first triode-three triode, the equal earth terminal of collector, the first resistance is connected between the base stage of the first triode and emitter, the emitter of the first triode connects the emitter of the 4th resistance to the 3rd triode, first triode, the emitter of the 3rd triode connects the 7th insulated gate bipolar transistor respectively, the collector of the 9th insulated gate bipolar transistor, the emitter of the second triode connects the collector of the second resistance to the 8th insulated gate bipolar transistor, the collector of the 8th insulated gate bipolar transistor connects the 3rd resistance respectively, 5th resistance is to the emitter of the 3rd triode, collector, 7th insulated gate bipolar transistor, the collector of the 8th insulated gate bipolar transistor connects the negative pole end of operation amplifier circuit respectively, positive terminal, the gate pole of output termination first insulated gate bipolar transistor of operation amplifier circuit.

As preferably, described operation amplifier circuit is by the 11 insulated gate bipolar transistor-17 insulated gate bipolar transistor, electric capacity, 7th resistance composition, 12 insulated gate bipolar transistor, the gate pole of the 14 insulated gate bipolar transistor connects the 7th insulated gate bipolar transistor respectively, the collector of the 8th insulated gate bipolar transistor, 12 insulated gate bipolar transistor, the emitter of the 14 insulated gate bipolar transistor all connects the collector of the 11 insulated gate bipolar transistor, 12 insulated gate bipolar transistor, the collector of the 14 insulated gate bipolar transistor connects the 13 insulated gate bipolar transistor respectively, the collector of the 15 insulated gate bipolar transistor, the collector of the 13 insulated gate bipolar transistor, gate pole is all connected with the gate pole of the 15 insulated gate bipolar transistor, the gate pole of the 15 insulated gate bipolar transistor connects the gate pole of the 17 insulated gate bipolar transistor, the collector of the 17 insulated gate bipolar transistor connects the 7th resistance successively, electric capacity is to the gate pole of the 15 insulated gate bipolar transistor, 17 insulated gate bipolar transistor, 15 insulated gate bipolar transistor, the equal earth terminal of emitter of the 13 insulated gate bipolar transistor, the collector of the 17 insulated gate bipolar transistor connects the gate pole of the 16 insulated gate bipolar transistor respectively, collector, 16 insulated gate bipolar transistor, the emitter of the 11 insulated gate bipolar transistor all connects power supply vdd terminal, the gate pole of the 16 insulated gate bipolar transistor connects the gate pole of the first insulated gate bipolar transistor.

As preferably, the first described triode-three triode all adopts PNP type triode.

The beneficial effects of the utility model: ensure that high-precision request for utilization, reduce the temperature coefficient of band gap reference, have very wide using value.

Accompanying drawing explanation

The utility model is described in detail below in conjunction with the drawings and specific embodiments;

Fig. 1 is circuit diagram of the present utility model;

Fig. 2 is the circuit diagram of the utility model operation amplifier circuit;

Fig. 3 is that the utility model benchmark exports temperature variant curve map;

Fig. 4 is that the utility model benchmark exports the relation schematic diagram with mains voltage variations.

Embodiment

The technological means realized for making the utility model, creation characteristic, reaching object and effect is easy to understand, below in conjunction with embodiment, setting forth the utility model further.

With reference to Fig. 1-4, this embodiment is by the following technical solutions: a kind of low-temperature coefficient low voltage CMOS band-gap reference, comprise the first insulated gate bipolar transistor M1-the tenth insulated gate bipolar transistor M10, first resistance R1-the 6th resistance R6, first triode Q1-the 3rd triode Q3 and operation amplifier circuit, the gate pole of the first insulated gate bipolar transistor M1 respectively with the 5th insulated gate bipolar transistor M5, the gate pole of the 7th insulated gate bipolar transistor M7-the tenth insulated gate bipolar transistor M10 connects, the gate pole of the first insulated gate bipolar transistor M1 also connects the collector of the second insulated gate bipolar transistor M2, the collector of the first insulated gate bipolar transistor M1 is connected with emitter, first insulated gate bipolar transistor M1, 3rd insulated gate bipolar transistor M3, 5th insulated gate bipolar transistor M5, the emitter of the 7th insulated gate bipolar transistor M7-the tenth insulated gate bipolar transistor M10 is all connected to power supply vdd terminal, 3rd insulated gate bipolar transistor M3, the collector of the 4th insulated gate bipolar transistor M4 all connects the gate pole of the second insulated gate bipolar transistor M2, the emitter of the second insulated gate bipolar transistor M2, the gate pole of the 3rd insulated gate bipolar transistor M3, the emitter of the 4th insulated gate bipolar transistor M4, the equal earth terminal of emitter of the 6th insulated gate bipolar transistor M6, the collector of the tenth insulated gate bipolar transistor M10 meets the 6th resistance R6 and extremely holds, the gate pole of the 4th insulated gate bipolar transistor M4 connects the gate pole of the 6th insulated gate bipolar transistor M6, the gate pole of the 6th insulated gate bipolar transistor M6, collector all connects the collector of the 5th insulated gate bipolar transistor M5, the base stage of the first triode Q1-the 3rd triode Q3, the equal earth terminal of collector, the first resistance R1 is connected between the base stage of the first triode Q1 and emitter, the emitter of the first triode Q1 connects the emitter of the 4th resistance R4 to the 3rd triode Q3, first triode Q1, the emitter of the 3rd triode Q3 meets the 7th insulated gate bipolar transistor M7 respectively, the collector of the 9th insulated gate bipolar transistor M9, the emitter of the second triode Q2 connects the collector of the second resistance R2 to the 8th insulated gate bipolar transistor M8, the collector of the 8th insulated gate bipolar transistor M8 meets the 3rd resistance R3 respectively, 5th resistance R5 is to the emitter of the 3rd triode Q3, collector, 7th insulated gate bipolar transistor M7, the collector of the 8th insulated gate bipolar transistor M8 connects the negative pole end of operation amplifier circuit respectively, positive terminal, the gate pole of the output termination first insulated gate bipolar transistor M1 of operation amplifier circuit.

It should be noted that, described operation amplifier circuit is by the 11 insulated gate bipolar transistor M11-the 17 insulated gate bipolar transistor M17, electric capacity C, 7th resistance R7 forms, 12 insulated gate bipolar transistor M12, the gate pole of the 14 insulated gate bipolar transistor M14 meets the 7th insulated gate bipolar transistor M7 respectively, the collector of the 8th insulated gate bipolar transistor M8, 12 insulated gate bipolar transistor M12, the emitter of the 14 insulated gate bipolar transistor M14 all connects the collector of the 11 insulated gate bipolar transistor M11, 12 insulated gate bipolar transistor M12, the collector of the 14 insulated gate bipolar transistor M14 meets the 13 insulated gate bipolar transistor M13 respectively, the collector of the 15 insulated gate bipolar transistor M15, the collector of the 13 insulated gate bipolar transistor M13, gate pole is all connected with the gate pole of the 15 insulated gate bipolar transistor M15, the gate pole of the 15 insulated gate bipolar transistor M15 connects the gate pole of the 17 insulated gate bipolar transistor M17, the collector of the 17 insulated gate bipolar transistor M17 meets the 7th resistance R7 successively, electric capacity C is to the gate pole of the 15 insulated gate bipolar transistor M15, 17 insulated gate bipolar transistor M17, 15 insulated gate bipolar transistor M15, the equal earth terminal of emitter of the 13 insulated gate bipolar transistor M13, the collector of the 17 insulated gate bipolar transistor M17 connects the gate pole of the 16 insulated gate bipolar transistor M16 respectively, collector, 16 insulated gate bipolar transistor M16, the emitter of the 11 insulated gate bipolar transistor M11 all connects power supply vdd terminal, the gate pole of the 16 insulated gate bipolar transistor M16 connects the gate pole of the first insulated gate bipolar transistor M1.

This embodiment amplifier adopts a simple two stage amplifer, 11 insulated gate bipolar transistor M11 is tail current source, 12 insulated gate bipolar transistor M12, 14 insulated gate bipolar transistor M14 is pmos input pipe, large input voltage range is provided, there is less 1/f noise, 16 insulated gate bipolar transistor M16, 17 insulated gate bipolar transistor M17 forms the output stage of amplifier, the reference circuit of exporting to of whole amplifier provides feedback biasing, 7th resistance R7 and electric capacity C provides frequency compensation for amplifier, experiment proves, the ac gain of amplifier is about 81dB, phase margin is about 66 °, amplifier performance is fine as can be seen here, well can play a part profound and negative feedbck.

This embodiment adopts VBE method of linearization circuit structure, analyzes below to reference circuit:

$I_1=\frac{\mathrm{\Δ}{V}_{\mathrm{BE}}}{R2}---\left(1\right)$

$I_2=\frac{V_{\mathrm{BE}.Q1}}{R2}---\left(2\right)$

$I_{\mathrm{NL}}=\frac{V_{\mathrm{NL}}}{R3}=\frac{V_{\mathrm{BE}.Q2}\left(T\right)-V_{\mathrm{BE}.Q3}\left(T\right)}{R3}=\frac{V_T\ln \frac{T}{T_0}}{R3}---\left(3\right)$

I ₃＝I ₁+I ₂+I _NL(4)

$V_{\mathrm{REF}}=I_{3}R6=(\frac{\mathrm{\Δ}{V}_{\mathrm{BE}}}{R2}+\frac{V_{\mathrm{BE}.Q1}}{R2}+\frac{V_T\ln T/T0}{R3})\×R6---\left(5\right)$

Local derviation about temperature is asked for (5) formula, order

Can draw $R3=\frac{R5}{\mathrm{\η}-1}$

As can be seen from above-mentioned derivation, namely zero-temperature coefficient system can be obtained by arranging suitable resistance value, so just significantly reduce the temperature coefficient in whole temperature range, the relation of reference output voltage and temperature as shown in Figure 3, can find out when temperature scans from-40 DEG C to 100 DEG C, benchmark exports variation with temperature and is only 0.3mV, and the temperature coefficient of reference source is only 2.14ppm/ DEG C; Fig. 4 is that benchmark exports the graph of a relation with mains voltage variations, can find out, when supply voltage changes from 1.2V to 3V, reference output voltage can normally work, illustrate that benchmark can be applied in the low supply voltage system of high-precision requirement completely, and then ensure that high-precision request for utilization, reduce the temperature coefficient of band gap reference, there is very wide using value.

More than show and describe ultimate principle of the present utility model and principal character and advantage of the present utility model.The technician of the industry should understand; the utility model is not restricted to the described embodiments; what describe in above-described embodiment and instructions just illustrates principle of the present utility model; under the prerequisite not departing from the utility model spirit and scope; the utility model also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the utility model.The claimed scope of the utility model is defined by appending claims and equivalent thereof.

Claims (2)

1. a low-temperature coefficient low voltage CMOS band-gap reference, it is characterized in that, comprise the first insulated gate bipolar transistor (M1)-ten insulated gate bipolar transistor (M10), first resistance (R1)-six resistance (R6), first triode (Q1)-three triode (Q3) and operation amplifier circuit, the gate pole of the first insulated gate bipolar transistor (M1) respectively with the 5th insulated gate bipolar transistor (M5), the gate pole of the 7th insulated gate bipolar transistor (M7)-ten insulated gate bipolar transistor (M10) connects, the gate pole of the first insulated gate bipolar transistor (M1) also connects the collector of the second insulated gate bipolar transistor (M2), the collector of the first insulated gate bipolar transistor (M1) is connected with emitter, first insulated gate bipolar transistor (M1), 3rd insulated gate bipolar transistor (M3), 5th insulated gate bipolar transistor (M5), the emitter of the 7th insulated gate bipolar transistor (M7)-ten insulated gate bipolar transistor (M10) is all connected to power supply vdd terminal, 3rd insulated gate bipolar transistor (M3), the collector of the 4th insulated gate bipolar transistor (M4) all connects the gate pole of the second insulated gate bipolar transistor (M2), the emitter of the second insulated gate bipolar transistor (M2), the gate pole of the 3rd insulated gate bipolar transistor (M3), the emitter of the 4th insulated gate bipolar transistor (M4), the equal earth terminal of emitter of the 6th insulated gate bipolar transistor (M6), the collector of the tenth insulated gate bipolar transistor (M10) connects the 6th resistance (R6) and extremely holds, the gate pole of the 4th insulated gate bipolar transistor (M4) connects the gate pole of the 6th insulated gate bipolar transistor (M6), the gate pole of the 6th insulated gate bipolar transistor (M6), collector all connects the collector of the 5th insulated gate bipolar transistor (M5), the base stage of the first triode (Q1)-three triode (Q3), the equal earth terminal of collector, the first resistance (R1) is connected between the base stage of the first triode (Q1) and emitter, the emitter of the first triode (Q1) connects the emitter of the 4th resistance (R4) to the 3rd triode (Q3), first triode (Q1), the emitter of the 3rd triode (Q3) connects the 7th insulated gate bipolar transistor (M7) respectively, the collector of the 9th insulated gate bipolar transistor (M9), the emitter of the second triode (Q2) connects the collector of the second resistance (R2) to the 8th insulated gate bipolar transistor (M8), the collector of the 8th insulated gate bipolar transistor (M8) connects the 3rd resistance (R3) respectively, 5th resistance (R5) is to the emitter of the 3rd triode (Q3), collector, 7th insulated gate bipolar transistor (M7), the collector of the 8th insulated gate bipolar transistor (M8) connects the negative pole end of operation amplifier circuit respectively, positive terminal, the gate pole of output termination first insulated gate bipolar transistor (M1) of operation amplifier circuit.

2. a kind of low-temperature coefficient low voltage CMOS band-gap reference according to claim 1, it is characterized in that, described operation amplifier circuit is by the 11 insulated gate bipolar transistor (M11)-17 insulated gate bipolar transistor (M17), electric capacity (C), 7th resistance (R7) composition, 12 insulated gate bipolar transistor (M12), the gate pole of the 14 insulated gate bipolar transistor (M14) connects the 7th insulated gate bipolar transistor (M7) respectively, the collector of the 8th insulated gate bipolar transistor (M8), 12 insulated gate bipolar transistor (M12), the emitter of the 14 insulated gate bipolar transistor (M14) all connects the collector of the 11 insulated gate bipolar transistor (M11), 12 insulated gate bipolar transistor (M12), the collector of the 14 insulated gate bipolar transistor (M14) connects the 13 insulated gate bipolar transistor (M13) respectively, the collector of the 15 insulated gate bipolar transistor (M15), the collector of the 13 insulated gate bipolar transistor (M13), gate pole is all connected with the gate pole of the 15 insulated gate bipolar transistor (M15), the gate pole of the 15 insulated gate bipolar transistor (M15) connects the gate pole of the 17 insulated gate bipolar transistor (M17), the collector of the 17 insulated gate bipolar transistor (M17) connects the 7th resistance (R7) successively, electric capacity (C) is to the gate pole of the 15 insulated gate bipolar transistor (M15), 17 insulated gate bipolar transistor (M17), 15 insulated gate bipolar transistor (M15), the equal earth terminal of emitter of the 13 insulated gate bipolar transistor (M13), the collector of the 17 insulated gate bipolar transistor (M17) connects the gate pole of the 16 insulated gate bipolar transistor (M16) respectively, collector, 16 insulated gate bipolar transistor (M16), the emitter of the 11 insulated gate bipolar transistor (M11) all connects power supply vdd terminal, the gate pole of the 16 insulated gate bipolar transistor (M16) connects the gate pole of the first insulated gate bipolar transistor (M1).