CN203950228U - Current source circuit - Google Patents
Current source circuit Download PDFInfo
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- CN203950228U CN203950228U CN201420372294.6U CN201420372294U CN203950228U CN 203950228 U CN203950228 U CN 203950228U CN 201420372294 U CN201420372294 U CN 201420372294U CN 203950228 U CN203950228 U CN 203950228U
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- Prior art keywords
- field effect
- effect transistor
- electric current
- drain electrode
- amplifier
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Abstract
The utility model discloses a kind of current source circuit, it comprises that positive temperature coefficient voltages produces electronic circuit, current mirror electronic circuit and electric current and produces electronic circuit, electric current produces electronic circuit and comprises the first amplifier, the first field effect transistor, the second field effect transistor and the 3rd field effect transistor, positive temperature coefficient voltages produces electronic circuit and produces first voltage identical with temperature changing trend, and the first voltage is inputed to the positive input of the first amplifier, electric current produces the first electric current first field effect transistor of flowing through that electronic circuit produces, the second electric current of its generation second field effect transistor of flowing through; Current mirror electronic circuit comprises the second amplifier, the 4th field effect transistor, the 5th field effect transistor and the 6th field effect transistor; The 4th field effect transistor mirror image the second electric current to the six field effect transistor, the 5th field effect transistor mirror image the first electric current to the six field effect transistor, the electric current that the drain electrode output of the 6th field effect transistor produces.Current source circuit of the present utility model can effectively reduce temperature voltage, the impact on output current such as processing technology and processing procedure, the stability and the accuracy that have improved output current.
Description
Technical field
The utility model relates to integrated circuit fields, relates more specifically to a kind of current source circuit.
Background technology
Current source is the elementary cell in integrated circuit, is widely used in various simulations and integrated digital circuit.The structure species of current source is various, but in most integrated circuit, be all adopt voltage divided by resistance again the mode of mirror image produce the needed electric current of integrated circuit.The resistance of the current source producing is in this way owing to being subject to temperature, voltage, the impact of processing technology and processing procedure etc., especially temperature is very large on the impact of the electric current producing, can produce the variation of 20% left and right, field effect transistor also exists variation in the parameter on different process border in addition, makes same circuit output current value have more than 30% difference.Therefore in the time producing in enormous quantities, the yield rate of product can be greatly affected, and the precision of the electric current of this current source generation does not reach industry requirement yet.
Therefore, be necessary to provide a kind of improved current source circuit to overcome above-mentioned defect.
Utility model content
The purpose of this utility model is to provide a kind of current source circuit, and this current source circuit can effectively reduce the impact on output current such as temperature, voltage, processing technology and processing procedure, the stability and the accuracy that have improved output current.
For achieving the above object, the utility model provides a kind of current source circuit, it comprises that positive temperature coefficient voltages produces electronic circuit, current mirror electronic circuit and electric current produce electronic circuit, described electric current produces electronic circuit and comprises the first amplifier, the first field effect transistor, the second field effect transistor and the 3rd field effect transistor, described positive temperature coefficient voltages produces electronic circuit and produces first voltage identical with temperature changing trend, and described the first voltage is inputed to the positive input of described the first amplifier, the reverse input end of described the first amplifier is connected with the source electrode of described the 3rd field effect transistor and the drain electrode of the second field effect transistor, the output terminal of described the first amplifier is connected with the grid of described the 3rd field effect transistor, the source grounding of the source electrode of described the first field effect transistor and the second field effect transistor, the grid of described the first field effect transistor, the grid of drain electrode and the second field effect transistor connects jointly, and described electric current produces the first electric current that electronic circuit produces described the first field effect transistor of flowing through, the second electric current of its generation described the second field effect transistor of flowing through, described the first field effect transistor and the electron mobility of the second field effect transistor are the technological parameters contrary with temperature changing trend, described current mirror electronic circuit comprises the second amplifier, the 4th field effect transistor, the 5th field effect transistor and the 6th field effect transistor, the drain electrode of the normal phase input end of described the second amplifier and described the 3rd field effect transistor, the drain electrode of the 4th field effect transistor connects, the drain electrode of the reverse input end of described the second amplifier and described the first field effect transistor, the drain electrode of the 5th field effect transistor connects, the grid of the output terminal of described the second amplifier and described the 4th field effect transistor, the grid of the 5th field effect transistor, the grid of the 6th field effect transistor connects, the source electrode of described the 4th field effect transistor, the source electrode of the 5th field effect transistor, the source electrode of the 6th field effect transistor is all connected with external power source, described in described the 4th field effect transistor mirror image, the second electric current is to described the 6th field effect transistor, described in described the 5th field effect transistor mirror image the first electric current to described the 6th field effect transistor, the electric current that the drain electrode output of described the 6th field effect transistor produces.
Preferably, described the first field effect transistor, the second field effect transistor and the 3rd field effect transistor are N-type field effect transistor.
Preferably, described the 4th field effect transistor, the 5th field effect transistor and the 6th field effect transistor have identical breadth length ratio.
Preferably, the breadth length ratio of described the first field effect transistor is the twice of described the second field effect transistor breadth length ratio.
Preferably, described current mirror electronic circuit also comprises the 7th field effect transistor, the 8th field effect transistor and the 9th field effect transistor, the positive input of described the second amplifier is connected with the drain electrode of described the 7th field effect transistor, the reverse input end of described the second amplifier is connected with the drain electrode of described the 8th field effect transistor, the grid of described the 7th field effect transistor, the grid of the 8th field effect transistor, the grid of the 9th field effect transistor connects jointly, the source electrode of described the 7th field effect transistor is connected with the drain electrode of the 4th field effect transistor, the source electrode of described the 8th field effect transistor is connected with the drain electrode of the 5th field effect transistor, the source electrode of described the 9th field effect transistor is connected with the drain electrode of the 6th field effect transistor, the electric current that the drain electrode output of described the 9th field effect transistor produces.
Preferably, described the 7th field effect transistor, the 8th field effect transistor and the 9th field effect transistor have identical breadth length ratio.
Compared with prior art, current source circuit of the present utility model produces first voltage identical with temperature changing trend because described positive temperature coefficient voltages produces electronic circuit, and described the first voltage is inputed to the positive input of the first amplifier of described electric current generation electronic circuit, and described electric current generation the first field effect transistor of electronic circuit and the electron mobility of the second field effect transistor are the technological parameter contrary with temperature changing trend, and the electric current producing by the drain electrode output of described the first field effect transistor and the second field effect transistor; Make electron mobility and described first voltage of described the first field effect transistor and the second field effect transistor can mutually weaken or offset the impact of the other side because of the electric current of temperature variation on output, the stability and the accuracy that have improved output current.
By following description also by reference to the accompanying drawings, it is more clear that the utility model will become, and these accompanying drawings are used for explaining the utility model.
Brief description of the drawings
Fig. 1 is the structured flowchart of the utility model current source circuit.
Fig. 2 is the structured flowchart of another embodiment of the utility model current source circuit.
Embodiment
With reference now to accompanying drawing, describe embodiment of the present utility model, in accompanying drawing, similarly element numbers represents similar element.As mentioned above, the utility model provides a kind of current source circuit, and this current source circuit can effectively reduce temperature voltage, the impact on output current such as processing technology and processing procedure, the stability and the accuracy that have improved output current.
Please refer to Fig. 1, Fig. 1 is the structured flowchart of the utility model current source circuit.As shown in the figure, current source circuit of the present utility model comprises that positive temperature coefficient voltages produces electronic circuit, current mirror electronic circuit and electric current and produces electronic circuit, and described electric current produces electronic circuit and comprises the first amplifier OP1, the first field effect transistor M1, the second field effect transistor M2 and the 3rd field effect transistor M3, described positive temperature coefficient voltages produces electronic circuit and produces a first voltage Vref identical with temperature changing trend, and described the first voltage Vref is inputed to the positive input of described the first amplifier OP1, the reverse input end of described the first amplifier OP1 is connected with the source electrode of described the 3rd field effect transistor M3 and the drain electrode of the second field effect transistor M2, the output terminal of described the first amplifier OP1 is connected with the grid of described the 3rd field effect transistor M3, the source grounding of the source electrode of described the first field effect transistor M1 and the second field effect transistor M2, the grid of described the first field effect transistor M1, the grid of drain electrode and the second field effect transistor M2 connects jointly, wherein, described the first field effect transistor M1 and the electron mobility of the second field effect transistor M2 are the technological parameters contrary with temperature changing trend, described electric current produces the first electric current I 1 that electronic circuit produces described the first field effect transistor M1 that flows through, the second electric current I 2 of its generation described the second field effect transistor M2 that flows through.Described current mirror electronic circuit comprises the second amplifier OP2, the 4th field effect transistor M4, the 5th field effect transistor M5 and the 6th field effect transistor M6, the drain electrode of the normal phase input end of described the second amplifier OP2 and described the 3rd field effect transistor M3, the drain electrode of the 4th field effect transistor M4 connects, the drain electrode of the reverse input end of described the second amplifier OP2 and described the first field effect transistor M1, the drain electrode of the 5th field effect transistor M5 connects, the grid of the output terminal of described the second amplifier OP2 and described the 4th field effect transistor M4, the grid of the 5th field effect transistor M5, the grid of the 6th field effect transistor M6 connects, the source electrode of described the 4th field effect transistor M4, the source electrode of the 5th field effect transistor M5, the source electrode of the 6th field effect transistor M6 is all connected with external power source VDD, described in described the 4th field effect transistor M4 mirror image, the second electric current I 2 is to described the 6th field effect transistor M6, described in described the 5th field effect transistor M5 mirror image, the first electric current I 1 is to described the 6th field effect transistor M6, the electric current I ref that the drain electrode output of described the 6th field effect transistor M6 produces.In addition, in preferred implementation of the present utility model, described the first field effect transistor M1, the second field effect transistor M2 and the 3rd field effect transistor M3 are N-type field effect transistor.
In preferred implementation of the present utility model, described the 4th field effect transistor M4, the 5th field effect transistor M5 and the 6th field effect transistor M6 have identical breadth length ratio, and the breadth length ratio of described the first field effect transistor M1 is the twice of described the second field effect transistor M2 breadth length ratio; Wherein, use respectively (W/L)
1, (W/L)
2, (W/L)
3, (W/L)
4, (W/L)
5, (W/L)
6represent the breadth length ratio of the first field effect transistor M1 to the six field effect transistor M6.
In current mirror electronic circuit of the present utility model, the 4th field effect transistor M4, the 5th field effect transistor M5 and the 6th field effect transistor M6 are mirror image field effect transistor; Because the clamping action of the second amplifier OP2, make voltage Vp=Vn, its output voltage provides gate bias voltage for the 4th field effect transistor M4, the 5th field effect transistor M5 and the 6th field effect transistor M6, because the 4th field effect transistor M4, the 5th field effect transistor M5 and the 6th field effect transistor M6 have identical breadth length ratio, and due to the clamper of described the second amplifier OP2, make the 4th field effect transistor M4 identical with each node voltage of the 5th field effect transistor M5, so the electric current of its generation is also identical, that is:
I
1=I
2=I
ref (
1)
Electric current produces in electronic circuit, and described the first field effect transistor M1 is operated in saturation region, and the electric current I 1 that flows through described the first field effect transistor M1 is
Wherein μ
n, c
oxwith V
tHbe respectively the carrier mobility of N-type field effect transistor, gate oxide unit-area capacitance amount and and threshold voltage, V
gS1it is the source gate voltage of the first field effect transistor M1.
Because the first amplifier OP1 and the 3rd field effect transistor M3 composition negative feedback loop, so the drain voltage of the second field effect transistor M2 is also the first voltage Vref for positive temperature coefficient (PTC) voltage-reference voltage, thus the drain-source voltage V of described the second field effect transistor M2
dS2=V
ref, here can by designing described positive temperature coefficient (PTC) voltage, to produce the voltage Vref that electronic circuit makes it output be a lower voltage, make described the second field effect transistor M2 be operated in linear zone, i.e. V
dS2=V
ref< V
gS2-V
tH, the electric current of the second field effect transistor M2 that flows through
Wherein (W/L) 2, V
gS2with V
dS2be respectively the breadth length ratio of N-type field effect transistor M2, source gate voltage and drain-to-gate voltage.
Due to (W/L)
1=2 (W/L)
2, can be drawn by formula (1), (2) and (3),
(4) gate oxide unit-area capacitance amount c in formula
ox, (W/L)
2for constant, and carrier mobility μ
nproducing voltage Vref with positive temperature coefficient (PTC) voltage source is and the amount of temperature correlation that, for making output current Iref and technique and temperature irrelevant, (4) formula is necessary for zero to the partial derivative of temperature, thereby draws
Again because
Wherein, T is real work thermodynamic temperature, T0=300K, μ
0for the carrier mobility at T0 temperature.
In conjunction with (5) (6) two formulas, can draw
Require the voltage-reference output voltage of positive temperature coefficient (PTC) to meet (7) formula, can obtain an output current Iref not with the current source of technique and temperature variation.
Thereby only need positive temperature coefficient (PTC) voltage to produce the first voltage V of electronic circuit output
rEFmeet (7) formula, the electric current I ref drawing from (4) formula is a temperature independent constant.Therefore the electric current that the utility model current source circuit produces, not with technique and temperature variation, has improved stability and the accuracy of output current Iref.
In addition, please combination is with reference to figure 2 again, and as preferred implementation of the present utility model, described current mirror electronic circuit also comprises the 7th field effect transistor M7, the 8th field effect transistor M8 and the 9th field effect transistor M9, the positive input of described the second amplifier OP2 is connected with the drain electrode of described the 7th field effect transistor M7, the reverse input end of described the second amplifier OP2 is connected with the drain electrode of described the 8th field effect transistor M8, the grid of described the 7th field effect transistor M7, the grid of the 8th field effect transistor M8, the grid of the 9th field effect transistor M9 connects jointly, the source electrode of described the 7th field effect transistor M7 is connected with the drain electrode of the 4th field effect transistor M4, the source electrode of described the 8th field effect transistor M8 is connected with the drain electrode of the 5th field effect transistor M5, the source electrode of described the 9th field effect transistor M9 is connected with the drain electrode of the 6th field effect transistor M6, the electric current that the drain electrode output of described the 9th field effect transistor M9 produces, and described the 7th field effect transistor M7, the 8th field effect transistor M8 and the 9th field effect transistor M9 have identical breadth length ratio, thereby described field effect transistor M7, M8, M9 and described field effect transistor M4, M5, M6 are equal to, be that described the 7th field effect transistor M7 mirror image the second electric current I 2 is to described the 9th field effect transistor M9, described the 8th field effect transistor M8 mirror image the first electric current I 1 is to described the 9th field effect transistor M9, and the electric current I ref of the drain electrode of described the 9th field effect transistor M9 output generation, thereby described field effect transistor M7, M8, M9 can prevent in the time that described field effect transistor M4, M5, M6 meet accident normally image current, described field effect transistor M7, M8, M9 also can image current I1, I2, with normal output current Iref.
In conjunction with most preferred embodiment, the utility model is described above, but the utility model is not limited to the embodiment of above announcement, and should contains the various amendments of carrying out according to essence of the present utility model, equivalent combinations.
Claims (6)
1. a current source circuit, it is characterized in that comprising that positive temperature coefficient voltages produces electronic circuit, current mirror electronic circuit and electric current produce electronic circuit, described electric current produces electronic circuit and comprises the first amplifier, the first field effect transistor, the second field effect transistor and the 3rd field effect transistor, described positive temperature coefficient voltages produces electronic circuit and produces first voltage identical with temperature changing trend, and described the first voltage is inputed to the positive input of described the first amplifier, the reverse input end of described the first amplifier is connected with the source electrode of described the 3rd field effect transistor and the drain electrode of the second field effect transistor, the output terminal of described the first amplifier is connected with the grid of described the 3rd field effect transistor, the source grounding of the source electrode of described the first field effect transistor and the second field effect transistor, the grid of described the first field effect transistor, the grid of drain electrode and the second field effect transistor connects jointly, and described electric current produces the first electric current that electronic circuit produces described the first field effect transistor of flowing through, the second electric current of its generation described the second field effect transistor of flowing through, described the first field effect transistor and the electron mobility of the second field effect transistor are the technological parameters contrary with temperature changing trend, described current mirror electronic circuit comprises the second amplifier, the 4th field effect transistor, the 5th field effect transistor and the 6th field effect transistor, the drain electrode of the normal phase input end of described the second amplifier and described the 3rd field effect transistor, the drain electrode of the 4th field effect transistor connects, the drain electrode of the reverse input end of described the second amplifier and described the first field effect transistor, the drain electrode of the 5th field effect transistor connects, the grid of the output terminal of described the second amplifier and described the 4th field effect transistor, the grid of the 5th field effect transistor, the grid of the 6th field effect transistor connects, the source electrode of described the 4th field effect transistor, the source electrode of the 5th field effect transistor, the source electrode of the 6th field effect transistor is all connected with external power source, described in described the 4th field effect transistor mirror image, the second electric current is to described the 6th field effect transistor, described in described the 5th field effect transistor mirror image the first electric current to described the 6th field effect transistor, the electric current that the drain electrode output of described the 6th field effect transistor produces.
2. current source circuit as claimed in claim 1, is characterized in that, described the first field effect transistor, the second field effect transistor and the 3rd field effect transistor are N-type field effect transistor.
3. current source circuit as claimed in claim 2, is characterized in that, described the 4th field effect transistor, the 5th field effect transistor and the 6th field effect transistor have identical breadth length ratio.
4. current source circuit as claimed in claim 3, is characterized in that, the breadth length ratio of described the first field effect transistor is the twice of described the second field effect transistor breadth length ratio.
5. current source circuit as claimed in claim 4, it is characterized in that, described current mirror electronic circuit also comprises the 7th field effect transistor, the 8th field effect transistor and the 9th field effect transistor, the positive input of described the second amplifier is connected with the drain electrode of described the 7th field effect transistor, the reverse input end of described the second amplifier is connected with the drain electrode of described the 8th field effect transistor, the grid of described the 7th field effect transistor, the grid of the 8th field effect transistor, the grid of the 9th field effect transistor connects jointly, the source electrode of described the 7th field effect transistor is connected with the drain electrode of the 4th field effect transistor, the source electrode of described the 8th field effect transistor is connected with the drain electrode of the 5th field effect transistor, the source electrode of described the 9th field effect transistor is connected with the drain electrode of the 6th field effect transistor, the electric current that the drain electrode output of described the 9th field effect transistor produces.
6. current source circuit as claimed in claim 5, is characterized in that, described the 7th field effect transistor, the 8th field effect transistor and the 9th field effect transistor have identical breadth length ratio.
Priority Applications (1)
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CN201420372294.6U CN203950228U (en) | 2014-07-07 | 2014-07-07 | Current source circuit |
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CN201420372294.6U CN203950228U (en) | 2014-07-07 | 2014-07-07 | Current source circuit |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104090616A (en) * | 2014-07-07 | 2014-10-08 | 四川和芯微电子股份有限公司 | Current source circuit |
CN106444953A (en) * | 2016-12-26 | 2017-02-22 | 圣邦微电子(北京)股份有限公司 | Low-temperature-drift precise current generating circuit |
CN106560758A (en) * | 2015-10-05 | 2017-04-12 | 株式会社村田制作所 | Current output circuit |
-
2014
- 2014-07-07 CN CN201420372294.6U patent/CN203950228U/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104090616A (en) * | 2014-07-07 | 2014-10-08 | 四川和芯微电子股份有限公司 | Current source circuit |
CN106560758A (en) * | 2015-10-05 | 2017-04-12 | 株式会社村田制作所 | Current output circuit |
CN106444953A (en) * | 2016-12-26 | 2017-02-22 | 圣邦微电子(北京)股份有限公司 | Low-temperature-drift precise current generating circuit |
CN106444953B (en) * | 2016-12-26 | 2018-01-23 | 圣邦微电子(北京)股份有限公司 | Low Drift Temperature precision current generation circuit |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141119 Termination date: 20160707 |
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CF01 | Termination of patent right due to non-payment of annual fee |