CN201936216U - Reference voltage source with wide input voltage and high power supply rejection ratio - Google Patents

Reference voltage source with wide input voltage and high power supply rejection ratio Download PDF

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CN201936216U
CN201936216U CN2011200331364U CN201120033136U CN201936216U CN 201936216 U CN201936216 U CN 201936216U CN 2011200331364 U CN2011200331364 U CN 2011200331364U CN 201120033136 U CN201120033136 U CN 201120033136U CN 201936216 U CN201936216 U CN 201936216U
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circuit
triode
reference voltage
base stage
resistance
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林秀龙
刘中伟
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CHENGDU PROMISING-CHIP ELECTRONIC Co Ltd
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CHENGDU PROMISING-CHIP ELECTRONIC Co Ltd
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Abstract

The utility model discloses a reference voltage source with wide input voltage and high power supply rejection ratio. The reference voltage source comprises a self bias circuit (1), a first stage pre-adjusting circuit (2), a second stage pre-adjusting circuit (3), a band gap reference core circuit (4) and a signal feedback circuit (5) which are connected in sequence. The utility model adopts the self bias circuit with a self bias current mirror structure, so that the circuit can self-start and no extra starting circuits is needed; the output of the second stage pre-adjusting circuit directly serves as reference voltage output and supplies power for the band gap reference core circuit at the same time, so that the load capability of the reference voltage can be improved owing to the connection mode; by adopting an operational amplifier-free feedback loop circuit for adjustment, an operational amplifier for clamping is omitted compared with a traditional reference voltage source circuit, so that the area is saved and the static state power consumption is lower; and compared with a conventional band gap reference voltage source circuit, the power supply rejection ratio of the output reference voltage, especially the properties under high frequency, is improved greatly.

Description

The high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage
Technical field
The utility model relates to a kind of reference voltage source, specifically is meant the high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage.
Background technology
No matter be at digital circuit, mimic channel or be in the Digital Analog Hybrid Circuits that high performance reference voltage source all is indispensable, it is to the performance decisive role of total system.Generally reference voltage has determined the important system indexs such as current value that flow through in the oscillation frequency, power tube of upset level, the oscillator of comparer.Just be based on above situation, improving constantly, a lot of circuit structures occurring for the requirement of reference voltage source circuit.As shown in Figure 1, be a kind of method for designing of traditional reference voltage source.This circuit has comprised the operational amplifier with positive-negative input end and output port, resistance R 1, R2, R3 and two transistor Q1, Q2.Resistance R 1=R2=R wherein, the emitter area of transistor Q1 be Q2 emitter area N doubly.In the practical work process of circuit, because the open-loop gain of operational amplifier is very big, so the differential mode voltage of two input ends is very little, can think approximately equal, V (+)=V (-) is so just arranged, V (+), V (-) are respectively the normal phase input end voltage and the inverting input voltage of operational amplifier, that is:
V BE1+I C1*R3=V BE2
V in the formula BE1, V BE2Be respectively Q1, the base-emitter voltage of Q2, I C1Be the collector current of Q1, because collector current
Figure 769573DEST_PATH_IMAGE001
I wherein SBe the PN junction reverse saturation current, VT=KT/q is a thermal voltage, and bringing following formula into can get:
Figure 624397DEST_PATH_IMAGE002
Wherein, N is the ratio of the emitter area of Q1 and Q2,
So, just produced the road electric current that is directly proportional with absolute temperature, this electric current has produced the voltage that presents positive temperature characterisitic in resistance R 2, then with the VBE2 with negative temperature characteristic mutually
Add, just can obtain one and vary with temperature very little reference voltage source VREF,
Figure 404134DEST_PATH_IMAGE003
In this traditional reference voltage source generating circuit, the Power Supply Rejection Ratio PSRR of output reference voltage mainly depends on the characteristic of operational amplifier itself.The characteristic of the PSRR of common two-level operating amplifier under high frequency is very poor, and in order to improve the performance under the high frequency, the structure of operational amplifier has increased the area and the power consumption of circuit with regard to more complicated; Simultaneously, there is the degeneracy point in traditional reference voltage source generating circuit, needs extra start-up circuit to make circuit break away from " zero " degeneracy state, and this has increased the cost of circuit again.
The utility model content
The purpose of this utility model is to overcome in the present hoister operational process, and its running orbit instability departs from the difficult problem of former planned course easily, and a kind of locating device of hoister running orbit is provided.
The purpose of this utility model is achieved through the following technical solutions:
The high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage of the utility model, comprise the auto bias circuit, first order pre-adjustment circuit, the second level pre-adjustment circuit that connect successively, described second level pre-adjustment circuit is connected with signal feedback circuit with the band-gap reference core circuit respectively, and described band-gap reference core circuit is connected with signal feedback circuit.
Described auto bias circuit comprises metal-oxide-semiconductor MP1, resistance R 1, triode Q1, triode Q2, wherein the source electrode of metal-oxide-semiconductor MP1 is connected with external power source VIN, the drain and gate of MP1 connects the back and is connected with base stage with the collector of triode Q1 simultaneously by resistance R 1, the emitter of triode Q1 is connected with base stage with the collector of triode Q2 simultaneously, the grounded emitter of Q2, the grid of MP1 is connected with first order pre-adjustment circuit as the output of auto bias circuit, and the collector of triode Q1 is connected the back and is connected with second level pre-adjustment circuit with resistance R 1.
Described first order pre-adjustment circuit comprises metal-oxide-semiconductor MP2, MN1, diode ZD1, capacitor C 1, the source electrode of described MP2 is connected with external power source VIN, the grid of MP2 is connected with auto bias circuit, the drain electrode of MP2 is connected with the grid of MN1, the negative electrode of diode ZD1 respectively, the drain electrode of MN1 is connected with external power source VIN, the source electrode of MN1 is connected with second level pre-adjustment circuit as the output terminal VDD1 of first order pre-adjustment circuit, the plus earth of diode ZD1, and be parallel with capacitor C 1 at the two ends of diode ZD1.
Described diode ZD1 is a Zener diode.
Described second level pre-adjustment circuit comprises three metal-oxide-semiconductor MP3, MP4, MP5, two triode Q3, Q4, a resistance R 2, the source electrode of described MP3 is connected with the output terminal VDD1 of first order pre-adjustment circuit, the grid of MP3 is connected with auto bias circuit, the drain electrode of MP3 respectively with the collector of Q4, one end of resistance R 2 connects, the other end of resistance R 2 respectively with the collector of triode Q3, the base stage of Q3, the base stage of Q4 connects, the base stage of Q3 is connected with the base stage of Q4, the emitter of Q3 is connected with the source electrode of MP4, the emitter of Q4 is connected with the source electrode of MP5, and as the output terminal VREF of second level pre-adjustment circuit respectively with the band-gap reference core circuit, signal feedback circuit connects, the grid of MP4 is connected the back and is connected with signal feedback circuit with the grid of MP5, the drain electrode of MP4 and the drain electrode of MP5 be ground connection simultaneously.
Described band-gap reference core circuit comprises three resistance R 3, R4, R5, two triode Q6, Q7, the end of described resistance R 3 and R4 is connected the back and is connected with the output terminal VREF of second level pre-adjustment circuit, the other end of R3 is connected with the collector of signal feedback circuit, triode Q6 respectively, the base stage of Q6 is connected with signal feedback circuit with the continuous back of the base stage of Q7, the emitter of Q6 is by resistance R 5 ground connection, the other end of resistance R 4 is received collector and the base stage of triode Q7, the grounded emitter of Q7.
Described signal feedback circuit comprises two metal-oxide-semiconductor MP6, MP7, two triode Q5, Q8, a capacitor C 2, wherein, the source electrode of MP6 is connected with the output terminal VREF of second level pre-adjustment circuit respectively with the source electrode of MP7, the grid of MP6, the grid of MP7 is connected with the drain electrode of MP7, the drain electrode of MP6 is connected with the collector of triode Q5, the base stage of Q5 is connected with the band-gap reference core circuit, and be connected with the output terminal VREF of second level pre-adjustment circuit by capacitor C 2, the grounded emitter of Q5, the grid of MP7 is connected the back and is connected with the collector of triode Q8 with the drain electrode of MP7, the base stage of Q8 is connected with the band-gap reference core circuit, the grounded emitter of Q8.
The principle of work of the utility model circuit is as follows:
Suppose resistance R 3=R4=R, then after the circuit operate as normal,, then the difference of two branch currents is converted into the variation of Q5 base voltage by the mirror of Q6, Q7 if the electric current that flows through on the resistance R 3, R4 is unequal, Q5 can regard the amplifier of a single-stage as, and MP6 is its active load.This error voltage that is sent to the Q5 base stage is through arriving the output terminal VREF of reference voltage with device MP5 through the one-level source after the amplification of Q5, feedback control loop can be regulated the benchmark output voltage thus, as long as loop gain is enough big, the electric current that then can guarantee to flow through on resistance R 3, the R4 is equal, that is:
I*R3=I*R4=I*R
Can get:
V BE6+I*R5=V BE7
VBE6, VBE7 are respectively base stage-emitter voltage of Q6, Q7 in the formula.With the same the getting of derivation in traditional bandgap voltage reference:
Wherein, N is the ratio of the emitter area of Q6 and Q7, and VT is a thermal voltage, is about 26mV under the normal temperature.The expression formula of benchmark output voltage is like this:
Figure 990547DEST_PATH_IMAGE005
Can see that feedback loop has guaranteed that not only the electric current that flows through resistance R 3, R4 equates, and helps to reduce the variation of output reference voltage VREF with pre-adjustment voltage VDD2.When pre-adjustment voltage VDD2 generation fluctuation makes that output reference voltage VREF increases, feedback loop makes the base voltage of Q3 reduce by MP4, because the base stage of Q4 and the base stage of Q3 connect together, so can suppress the variation of output reference voltage with pre-adjustment voltage VDD2.
Simultaneously, owing to adopted the pre-adjustment circuit of two-stage, the Power Supply Rejection Ratio of output reference voltage is further enhanced, and the expression formula of Power Supply Rejection Ratio that provides output reference voltage is as follows:
PSRR VREF/?VINdB=?PSRR VREF/VDD1,2dB?+?PSRR VDD1,2/VINdB
PSRR VREF/ VINDBBe the Power Supply Rejection Ratio of benchmark VREF with respect to supply voltage VIN, PSRR VREF/VDD1,2DBBe the Power Supply Rejection Ratio of benchmark VREF with respect to pre-adjustment voltage VDD1, VDD2, PSRR VDD1,2/VINDBBe pre-adjustment voltage VDD1, VDD2 is with respect to the Power Supply Rejection Ratio of supply voltage VIN.
This shows that the output reference voltage Power Supply Rejection Ratio improves a lot than traditional bandgap voltage reference circuit really in the utility model circuit, particularly the characteristic under high frequency.
The utility model compared with prior art has following advantage and beneficial effect:
The high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage of 1 the utility model has adopted the auto bias circuit of automatic biasing current-mirror structure, and so, circuit just can self-starting, and no longer needs extra start-up circuit;
The high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage of 2 the utility model, directly also give the power supply of band-gap reference core circuit simultaneously as reference voltage output with the output of second level pre-adjustment circuit, such connected mode can improve the load capacity of reference voltage;
The high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage of 3 the utility model has adopted no amplifier feedback control loop to regulate, and compares with traditional reference voltage source circuit, has reduced by an amplifier of carrying out clamper, has saved area, has reduced quiescent dissipation;
The high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage of 4 the utility model, the Power Supply Rejection Ratio of output reference voltage improves a lot than traditional bandgap voltage reference circuit, particularly the characteristic under high frequency.
Description of drawings
Fig. 1 is traditional bandgap voltage reference circuit diagram;
Fig. 2 is the utility model circuit diagram.
Mark and corresponding parts title in the accompanying drawing:
The 1-auto bias circuit, 2-first order pre-adjustment circuit, 3-second level pre-adjustment circuit, 4-band-gap reference core circuit, 5-signal feedback circuit.
Embodiment
The utility model is described in further detail below in conjunction with embodiment, but embodiment of the present utility model is not limited thereto.
Embodiment
As shown in Figure 2, the high Power Supply Rejection Ratio PSRR reference voltage source of a kind of wide input voltage of the utility model comprises the auto bias circuit 1, first order pre-adjustment circuit 2, second level pre-adjustment circuit 3, signal feedback circuit 5, the band-gap reference core circuit 4 that connect successively.Auto bias circuit 1 comprises metal-oxide-semiconductor MP1, resistance R 1, triode Q1, triode Q2, the source electrode of metal-oxide-semiconductor MP1 is connected with external power source VIN, the drain and gate of MP1 connects the back and is connected with base stage with the collector of triode Q1 by resistance R 1, the emitter of Q1 is connected with base stage with the collector of triode Q2 simultaneously, the grounded emitter of Q2, the grid of MP1 is connected with MP2 grid in the first order pre-adjustment circuit 2, and the collector of triode Q1 is connected the MP3 in back and the second level pre-adjustment circuit 3 with resistance R 1 grid is connected; First order pre-adjustment circuit 2 comprises metal-oxide-semiconductor MP2, MN1, Zener diode ZD1, capacitor C 1, the source electrode of MP2 is connected with external power source VIN, the drain electrode of MP2 is connected with the grid of MN1, the negative electrode of Zener diode ZD1 respectively, the drain electrode of MN1 is connected with external power source VIN, the source electrode of MN1 is connected as the output terminal VDD1 of first order pre-adjustment circuit 2 and with resistance R 2 in the second level pre-adjustment circuit 3, the plus earth of Zener diode ZD1, and be parallel with capacitor C 1 at the two ends of Zener diode ZD1; Second level pre-adjustment circuit 3 comprises three metal-oxide-semiconductor MP3, MP4, MP5, two triode Q3, Q4, a resistance R 2, the drain electrode of MP3 respectively with the collector of Q4, one end of resistance R 2 connects, the other end of resistance R 2 respectively with the collector of triode Q3, the base stage of Q3, the base stage of Q4 connects, the base stage of Q3 is connected with the base stage of Q4, the emitter of Q3 is connected with the source electrode of MP4, the emitter of Q4 as the output terminal VREF of second level pre-adjustment circuit 3 respectively with band-gap reference core circuit 4 in resistance R 3, resistance R 4, MP6 source electrode in the signal feedback circuit 5, the MP7 source electrode, capacitor C 2, the source electrode of MP5 connects, the grid of MP4 is connected the drain electrode of back and MP6 with the grid of MP5, the collector of Q6 connects, and the drain electrode of MP4 and the drain electrode of MP5 be ground connection simultaneously; Band-gap reference core circuit 4 comprises three resistance R 3, R4, R5, two triode Q6, Q7, the end of described resistance R 3 and R4 is connected the back and is connected with the output terminal VREF of second level pre-adjustment circuit, the other end of R3 is connected with the base stage of capacitor C 2, triode Q5, the collector of triode Q6 respectively, the emitter of Q6 is by resistance R 5 ground connection, the other end of resistance R 4 is connected the grounded emitter of Q7 with the base stage of Q6, the base stage of Q7, the collector of Q7, the base stage of Q8 respectively; The drain electrode of the grid of MP6, the grid of MP7 and MP7 is connected, the drain electrode of MP6 is connected with the collector of triode Q5, the base stage of Q5 is connected with the band-gap reference core circuit, and be connected with the output terminal VREF of second level pre-adjustment circuit by capacitor C 2, the grounded emitter of Q5, the grid of MP7 is connected the back and is connected with the collector of triode Q8 with the drain electrode of MP7, the base stage of Q8 is connected with the band-gap reference core circuit, the grounded emitter of Q8.
The course of work:
After power supply electrifying, auto bias circuit is just started working, generation electric current I 1 and mirror image are managed to MP2 in MP1, required bias current when providing operate as normal for Zener diode, simultaneously to capacitor C 1 charging, when the pressure drop on the electric capacity is higher than the threshold value of MN1 pipe, MN1 manages conducting, source electrode at the MN1 pipe obtains pre-adjustment voltage VDD1, switching tube MP3 opens simultaneously, the voltage of VDD1 is passed to VDD2 and produces electric current simultaneously in entire circuit, make the core circuit of band gap reference break away from " zero " state.
As to the analysis of traditional bandgap voltage reference, after the entire circuit operate as normal, the difference of the emitter junction voltage of Q6, Q7 produces the electric current that is proportional to absolute temperature on resistance R 5, this electric current has produced the voltage with positive temperature coefficient (PTC) on resistance R 4, add that the emitter junction voltage of the Q7 with negative temperature coefficient has just produced the bandgap voltage reference VREF that almost has zero-temperature coefficient.The negative feedback loop that is made of Q3, Q4, Q5, Q8, MP4, MP5, MP6, MP7, R2, C2 has higher loop gain, the electric current that can guarantee to flow through on resistance R 3, the R4 equates, and helps to reduce the variation of output reference voltage VREF with pre-adjustment voltage VDD2.When pre-adjustment voltage VDD2 generation fluctuation makes that output reference voltage VREF increases, feedback loop makes the base voltage of Q3 reduce by MP4, because the base stage of Q4 and the base stage of Q3 connect together, so can suppress the variation of output reference voltage, improve Power Supply Rejection Ratio with pre-adjustment voltage VDD2.
As mentioned above, just can realize the utility model well.

Claims (7)

1. high Power Supply Rejection Ratio reference voltage source of wide input voltage, it is characterized in that: comprise the auto bias circuit (1), first order pre-adjustment circuit (2), the second level pre-adjustment circuit (3) that connect successively, described second level pre-adjustment circuit (3) is connected with signal feedback circuit (5) with band-gap reference core circuit (4) respectively, and described band-gap reference core circuit (4) is connected with signal feedback circuit (5).
2. the high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage according to claim 1, it is characterized in that: described auto bias circuit (1) comprises metal-oxide-semiconductor MP1, resistance R 1, triode Q1, triode Q2, wherein the source electrode of metal-oxide-semiconductor MP1 is connected with external power source VIN, the drain and gate of MP1 connects the back and is connected with base stage with the collector of triode Q1 simultaneously by resistance R 1, the emitter of triode Q1 is connected with base stage with the collector of triode Q2 simultaneously, the grounded emitter of Q2, the grid of MP1 is connected with first order pre-adjustment circuit (2) as the output of auto bias circuit (1), and the collector of triode Q1 is connected the back and is connected with second level pre-adjustment circuit (3) with resistance R 1.
3. the high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage according to claim 1, it is characterized in that: described first order pre-adjustment circuit (2) comprises metal-oxide-semiconductor MP2, MN1, diode ZD1, capacitor C 1, the source electrode of described MP2 is connected with external power source VIN, the grid of MP2 is connected with auto bias circuit (1), the drain electrode of MP2 respectively with the grid of MN1, the negative electrode of diode ZD1 connects, the drain electrode of MN1 is connected with external power source VIN, the source electrode of MN1 is connected with second level pre-adjustment circuit (3) as the output terminal VDD1 of first order pre-adjustment circuit (2), the plus earth of diode ZD1, and be parallel with capacitor C 1 at the two ends of diode ZD1.
4. the high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage according to claim 3 is characterized in that: described diode ZD1 is a Zener diode.
5. the high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage according to claim 1, it is characterized in that: described second level pre-adjustment circuit (3) comprises three metal-oxide-semiconductor MP3, MP4, MP5, two triode Q3, Q4, a resistance R 2, the source electrode of described MP3 is connected with the output terminal VDD1 of first order pre-adjustment circuit (2), the grid of MP3 is connected with auto bias circuit (1), the drain electrode of MP3 respectively with the collector of Q4, one end of resistance R 2 connects, the other end of resistance R 2 respectively with the collector of triode Q3, the base stage of Q3, the base stage of Q4 connects, the base stage of Q3 is connected with the base stage of Q4, the emitter of Q3 is connected with the source electrode of MP4, the emitter of Q4 is connected with the source electrode of MP5, and as the output terminal VREF of second level pre-adjustment circuit (3) respectively with band-gap reference core circuit (4), signal feedback circuit (5) connects, the grid of MP4 is connected the back and is connected with signal feedback circuit (5) with the grid of MP5, the drain electrode of MP4 and the drain electrode of MP5 be ground connection simultaneously.
6. the high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage according to claim 1, it is characterized in that: described band-gap reference core circuit (4) comprises three resistance R 3, R4, R5, two triode Q6, Q7, the end of described resistance R 3 and R4 is connected the back and is connected with the output terminal VREF of second level pre-adjustment circuit (3), the other end of R3 respectively with signal feedback circuit (5), the collector of triode Q6 connects, the base stage of Q6 is connected with signal feedback circuit (5) with the continuous back of the base stage of Q7, the emitter of Q6 is by resistance R 5 ground connection, the other end of resistance R 4 is received collector and the base stage of triode Q7, the grounded emitter of Q7.
7. the high Power Supply Rejection Ratio reference voltage source of a kind of wide input voltage according to claim 1, it is characterized in that: described signal feedback circuit (5) comprises two metal-oxide-semiconductor MP6, MP7, two triode Q5, Q8, a capacitor C 2, wherein, the source electrode of MP6 is connected with the output terminal VREF of second level pre-adjustment circuit (3) respectively with the source electrode of MP7, the grid of MP6, the grid of MP7 is connected with the drain electrode of MP7, the drain electrode of MP6 is connected with the collector of triode Q5, the base stage of Q5 is connected with band-gap reference core circuit (4), and be connected with the output terminal VREF of second level pre-adjustment circuit (3) by capacitor C 2, the grounded emitter of Q5, the grid of MP7 is connected the back and is connected with the collector of triode Q8 with the drain electrode of MP7, the base stage of Q8 is connected the grounded emitter of Q8 with band-gap reference core circuit (4).
CN2011200331364U 2011-01-31 2011-01-31 Reference voltage source with wide input voltage and high power supply rejection ratio Expired - Fee Related CN201936216U (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103345290A (en) * 2013-07-24 2013-10-09 东南大学 Band-gap reference voltage source with high power source restraining and low technology deviation
CN104731158A (en) * 2013-12-20 2015-06-24 亚德诺半导体集团 Low drift voltage reference
CN105027017A (en) * 2013-06-20 2015-11-04 富士电机株式会社 Reference voltage circuit
CN107272818A (en) * 2017-06-27 2017-10-20 福建省福芯电子科技有限公司 A kind of high voltage band-gap reference circuit structure
CN109765962A (en) * 2019-01-17 2019-05-17 深圳能芯半导体有限公司 The band-gap reference circuit of the high PSRR of low-power consumption
CN111026217A (en) * 2019-12-18 2020-04-17 西安航天民芯科技有限公司 Reference current compensation circuit applied to high-precision analog-to-digital converter
CN111240395A (en) * 2020-01-20 2020-06-05 中国电子科技集团公司第二十四研究所 Reference voltage source with high power supply rejection ratio
CN114265461A (en) * 2021-12-15 2022-04-01 深圳飞骧科技股份有限公司 Reference voltage source

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105027017A (en) * 2013-06-20 2015-11-04 富士电机株式会社 Reference voltage circuit
CN103345290A (en) * 2013-07-24 2013-10-09 东南大学 Band-gap reference voltage source with high power source restraining and low technology deviation
CN103345290B (en) * 2013-07-24 2014-10-15 东南大学 Band-gap reference voltage source with high power source restraining and low technology deviation
CN104731158A (en) * 2013-12-20 2015-06-24 亚德诺半导体集团 Low drift voltage reference
US9448579B2 (en) 2013-12-20 2016-09-20 Analog Devices Global Low drift voltage reference
CN107272818A (en) * 2017-06-27 2017-10-20 福建省福芯电子科技有限公司 A kind of high voltage band-gap reference circuit structure
CN109765962A (en) * 2019-01-17 2019-05-17 深圳能芯半导体有限公司 The band-gap reference circuit of the high PSRR of low-power consumption
CN111026217A (en) * 2019-12-18 2020-04-17 西安航天民芯科技有限公司 Reference current compensation circuit applied to high-precision analog-to-digital converter
CN111240395A (en) * 2020-01-20 2020-06-05 中国电子科技集团公司第二十四研究所 Reference voltage source with high power supply rejection ratio
CN111240395B (en) * 2020-01-20 2021-12-21 中国电子科技集团公司第二十四研究所 Reference voltage source with high power supply rejection ratio
CN114265461A (en) * 2021-12-15 2022-04-01 深圳飞骧科技股份有限公司 Reference voltage source

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