CN114714754A - 一种在晶片上印刷焊料的方法及其系统 - Google Patents

一种在晶片上印刷焊料的方法及其系统 Download PDF

Info

Publication number
CN114714754A
CN114714754A CN202210003309.0A CN202210003309A CN114714754A CN 114714754 A CN114714754 A CN 114714754A CN 202210003309 A CN202210003309 A CN 202210003309A CN 114714754 A CN114714754 A CN 114714754A
Authority
CN
China
Prior art keywords
wafer
solder
solder paste
defluxing
solder bumps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210003309.0A
Other languages
English (en)
Inventor
张文成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Enali Technology Pte Ltd
Original Assignee
Enali Technology Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Enali Technology Pte Ltd filed Critical Enali Technology Pte Ltd
Publication of CN114714754A publication Critical patent/CN114714754A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41F—PRINTING MACHINES OR PRESSES
    • B41F15/00—Screen printers
    • B41F15/08—Machines
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41F—PRINTING MACHINES OR PRESSES
    • B41F15/00—Screen printers
    • B41F15/14—Details
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41F—PRINTING MACHINES OR PRESSES
    • B41F35/00—Cleaning arrangements or devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
    • B41M1/00—Inking and printing with a printer's forme
    • B41M1/12—Stencil printing; Silk-screen printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/742—Apparatus for manufacturing bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41P—INDEXING SCHEME RELATING TO PRINTING, LINING MACHINES, TYPEWRITERS, AND TO STAMPS
    • B41P2215/00—Screen printing machines
    • B41P2215/10—Screen printing machines characterised by their constructional features
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41P—INDEXING SCHEME RELATING TO PRINTING, LINING MACHINES, TYPEWRITERS, AND TO STAMPS
    • B41P2215/00—Screen printing machines
    • B41P2215/50—Screen printing machines for particular purposes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41P—INDEXING SCHEME RELATING TO PRINTING, LINING MACHINES, TYPEWRITERS, AND TO STAMPS
    • B41P2235/00—Cleaning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
    • H01L2224/1132—Screen printing, i.e. using a stencil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11332—Manufacturing methods by local deposition of the material of the bump connector in solid form using a powder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/117—Manufacturing methods involving monitoring, e.g. feedback loop
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/118—Post-treatment of the bump connector
    • H01L2224/1181—Cleaning, e.g. oxide removal step, desmearing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/118—Post-treatment of the bump connector
    • H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
    • H01L2224/11849—Reflowing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/13198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298—Fillers
    • H01L2224/13299—Base material
    • H01L2224/133—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7515—Means for applying permanent coating, e.g. in-situ coating
    • H01L2224/75161—Means for screen printing, e.g. roller, squeegee, screen stencil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/759—Means for monitoring the connection process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81908—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving monitoring, e.g. feedback loop
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81909—Post-treatment of the bump connector or bonding area
    • H01L2224/8191—Cleaning, e.g. oxide removal step, desmearing
    • H01L2224/81911—Chemical cleaning, e.g. etching, flux
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)

Abstract

本发明公开了一种将焊料印刷到晶片(101)上的方法，包括将焊膏(102)沉积到晶片(101)上、对沉积的焊膏(102)应用在线回流工艺以在晶片(101)上形成焊料凸点(103)以及清洁回流焊料凸点(103)的步骤。将焊料打印到晶片(101)上的方法基于其系统，该系统包括晶片焊料打印机(1)、在线回流装置(2)和去焊剂装置(3)，其中每个步骤具有通过分段过程控制优化的参数。

Description

一种在晶片上印刷焊料的方法及其系统
发明领域
本发明涉及一种用于将焊料印刷到晶片上的方法，尤其是在所采用的分段过程控制中具有优化的参数，以在预定时间内实现上可观地成品率。
发明背景
目前，在晶片级电路和组件组装行业中，焊料印刷技术利用一个模板在晶片顶面上印刷焊膏或用焊料填充晶片上的通孔。由于通孔的垂直深度远大于印刷在晶片表面上的焊盘的低的高度，因此模板制造和使用成本高且复杂。在晶片级焊料图案化过程中使用模板也很耗时，因为用焊料填充通孔比在晶片表面上打印薄焊盘需要更长的时间。试图加速该过程会留下定位不准确的焊料图案，或焊料量不足的通孔。
许多与焊料印刷相关的技术已经被提出以改进该系统。例如，Kay等人发表的题为“使用无铅合金在低于100微米间距下进行晶片级凸点的模板印刷技术”的出版物公开了使用IPC 6型(15-5μm)粒径分布的无铅焊膏在低于100μm间距下进行焊膏印刷的工艺。研究结果证实，使用模版印刷工艺，可以在具有超细间距几何形状的晶片上产生尺寸一致的浆料沉积。还公开了可通过选择不同形状的模板孔来控制焊膏沉积，其中产生的焊料凸点的印刷一致性和均匀性也由每个沉积的焊膏的体积控制。除此之外，公开号为US5740730A的美国专利公开了一种用于在印刷电路板上形成粘合剂和焊盘以将电气元件表面安装到印刷电路板上的方法和设备。焊膏通过具有多个第一开口的第一模板沉积到印刷电路板上。然后，焊膏在电路板上形成多个焊盘。此外，第二模板随后定位在印刷电路板上，该第二模板具有多个第二开口，并且在其底面中具有凹口，该凹口被配置为接收多个焊盘。在将第二模板定位在印刷电路板上之后，通过第二模板的第二开口将粘合材料沉积到该板上以在该板上形成多个粘合垫。
公开号为US5996488A的另一项美国专利公开了一种为电子源制造基板的方法，该基板包括多个电子发射装置，每个电子发射装置包括一对相对的电极，多个电子发射装置布置在基板上。该方法包括以下步骤：制备凹版印刷板，该凹版印刷板具有与电极图案相对应的凹进部分，凹进部分的深度具有油墨，将橡皮布压在凹版印刷板上，以便油墨从凹进部分的内部转移到橡皮布上，以及使所述橡皮布与所述基板接触，使得所述油墨从所述橡皮布转移到所述基板上，从而在所述基板上形成所述电极图案。
公开号为US6443059B1的美国专利中披露的另一项技术叙述了一种焊接丝网印刷工艺，包括提供其上具有多个芯片的晶片和覆盖芯片的钝化层的步骤，其中，所述焊盘具有形成在其上的多个凸点下金属层(UBM)结构；在所述晶片上形成图案层，其中所述图案层具有多个第一开口，所述第一开口限定芯片上随后形成凸起的位置；提供具有晶片安装位置的载体，提供安装在载体上的安装支撑装置，其中安装支撑装置具有晶片尺寸的第二开口，使得载体的晶片安装位置通过第二开口暴露；通过安装支撑装置的第二开口将晶片安装在载体上；以及用焊膏填充第一开口。
发明内容
本发明的目的是提供一种具有优化参数的分段过程控制，以在预定时间段内实现可观地高的产率。另一个目的是为晶片焊料印刷工艺流程中的每个阶段提供这些优化参数，以便在制造半导体制品时实现更高的效率和产率。
在本发明的一个方面中，提供了一种将焊料打印到晶片上的方法，该方法包括以下步骤：通过晶片焊料打印机将焊膏沉积到晶片上，通过在线回流装置对沉积的焊膏应用在线回流工艺以在晶片上形成焊料凸点，以及通过去焊剂装置清洁回流焊料凸点，其中每个步骤通过分段过程控制优化其参数。
优选地，该方法还包括检查焊料凸点的步骤。
优选地，分段过程控制用于在约7小时的最大操作时间内实现约99％至99.5％的目标产率。
优选地，晶片焊料打印机以大约30mm/s到40mm/s的速度范围沉积焊膏。
优选地，晶片焊料打印机使用刮板在沉积的焊膏上施加大致6kg到8kg的压力。
优选地，使用去焊剂装置来完成焊料凸点的清洁。
优选地，在清洁期间，以预定间隔将晶片装入去焊剂装置中。
优选地，去焊剂装置在大致50℃至120℃的温度范围内工作。
优选地，使用三维自动光学检查(AOI)装置和X射线装置检查焊料凸点。
在本发明的另一个方面中，还提供了一种用于将焊料打印到晶片上的系统，该系统包括：用于将焊膏沉积到晶片上的晶片焊料打印机，用于对沉积的焊膏应用在线回流工艺以在晶片上形成焊料凸点的在线回流装置，以及用于清洁焊料凸点的去焊剂装置，其中系统使用通过分段过程控制优化的参数执行如上所述的方法。
优选地，分段过程控制用于在约7小时的最大操作时间内实现约99％至99.5％的目标产率。
优选地，通过三维(3D)自动光学检查(AOI)方法和X射线方法检查焊料凸点。
本领域技术人员将容易理解，本发明适于实现所述目的并获得所述目的和优点以及其中固有的目的和优点。本文所描述的实施例不打算作为对本发明范围的限制。
附图说明
为了促进对本发明的理解，在附图中示出了优选实施例，当结合以下描述考虑时，本发明、其构造和操作以及其许多优点将容易理解和领会。
图1示意了在晶片上印刷焊料的方法的框图。
图2图示了用于将焊料印刷到晶片上的方法的示例性实施例。
图3图示了将焊膏沉积到晶片上的示例性实施例。
具体实施方式
在下文中，应根据本发明的优选实施例并通过参考说明和附图来描述本发明。然而，应当理解，将描述限制到本发明的优选实施例仅仅是为了促进对本发明的讨论，并且可以预期，本领域技术人员可以在不脱离所附权利要求的范围的情况下设计各种修改。
现在将通过参考附图的示例更详细地描述本发明。
图1示出了用于将焊料打印到晶片101上的系统的框图，该系统包括配置成将焊膏102沉积到晶片上的晶片焊料打印机1。焊膏102是一种特殊形式的焊剂内保持的微小焊料球的混合物，该混合物具有焊膏的纹理。打印机1的目的是在要焊接的晶片101上的每个焊盘上准确地沉积正确的量。这是由优选通过模板103的丝网印刷焊膏102实现的，但也可以通过喷射印刷应用。该系统还包括用于在沉积的焊膏102上应用在线回流工艺以在晶片101上形成焊料凸点104的在线回流装置2，其中在线回流装置2优选为回流炉。在线回流工艺是使用焊膏102将多个微型电气部件临时连接到其接触垫上，然后整个组件经受受控热的一种方法。回流焊工艺的目标是使焊膏102达到共晶温度，在该温度下，焊膏102经历到液态或熔融状态的相变，其中熔融焊膏表现出粘附特性，从而在电气部件和晶片101之间形成永久性焊料凸点。
在优选实施例中，该系统包括用于清洁在线回流工艺期间形成的焊料凸点104的去焊剂装置3。除焊剂是一种清洁工艺，其设计目的不仅是去除晶片101中的焊剂残留物和副产品，而且还去除杂质，如焊球、污垢、灰尘、有机材料和其他污染物。焊料印刷后残留在晶片101上的焊剂材料痕迹必须完全清除，因为这些焊剂材料可能通过腐蚀、吸水和其他影响导致电路永久失效。优选地，去焊剂包括在用水冲洗并干燥晶片101之前，使用能够溶解焊剂残留物的溶剂清洗晶片101的表面。
除此之外，该系统还包括三维(3D)自动光学检查(AOI)装置4和X射线装置5，用于在完成去焊剂处理后检查晶片101上的焊料凸点104。3D AOI装置4操作以检查和检测焊料凸点104，所检测的焊料凸点104可包括污迹、硬点、破碎焊料凸点104、焊料体积不足、小或大焊料凸点104、氧化等。3D AOI装置4可进一步检查和/或检测焊料凸点104表面上的焊剂残留。在特定实施例中，X射线装置5可以检查小焊料凸点104体积和大焊料凸点104体积，并且还可以检测焊料凸点104空隙，其基本上为单个焊料凸点104尺寸的25％。此外，本文将参考图2进一步讨论系统中每台装置的关键参数。
图2示出了基于上述系统将焊料打印到晶片101上的方法的流程图。首先，将晶片101装入晶片焊料打印机1中。在步骤201，将模板放置在晶片101的顶部，随后使用刮板105将焊膏102印刷到所述晶片101上，如图3所示。优选地，模板103的直径可大致为100μm，间距为175μm，每个孔之间的孔间距大致为25μm至75μm。刮板105是一种工具，用于施加必要的力，使焊膏102穿过模板103并移动到晶片101上，其中刮板105可由金属和/或聚氨酯制成。焊料印刷工艺优选地以大致30mm/s至40mm/s的印刷速度将焊膏102沉积到晶片101上，且刮板105刀片施加大致6kg至8kg的压力。在打印循环期间，需要在刮板105的整个长度上施加足够的压力，以确保清洁地擦拭模板103。压力太小会导致焊膏102“污迹”在模板103上、沉积不良以及未完全转移到晶片101。过大的压力会导致焊膏102从较大的孔中“挖取”，在模具103和刮板105上过度磨损，并可能导致焊膏102在模具103和晶片101之间“渗出”。要注意的另一个关键参数是当将焊膏102涂覆到模板103和晶片101上时刮板105的角度。刮板103的角度也优选地由刮板105固定到的保持架设置为60°。如果角度增加，则会导致焊膏102从模板103孔“挖取”，从而导致较少的焊膏102沉积到晶片101上。然而，如果角度减小，则会导致在刮板105完成打印后，焊膏102的残留物留在模板103上。
在优选实施例中，焊料印刷过程最多运行7小时，其中在7小时内采用具有优化参数的分段过程控制。优选地，首先检查焊膏102的粘度，以使所述焊膏102不会粘附在刮板105上。此外，以向后和向前的运动将焊膏102揉在模板103上，直到焊膏102达到所需的粘度。一旦焊膏102达到所需粘度，印刷过程将通过把焊膏102均匀地沉积在跨过晶片101的模板103的孔中开始。在大致7小时的操作内，可检查焊膏102的一致性，以确保打印机1的性能处于最佳效率。
在步骤202，晶片101随后被加载到在线回流装置2中，其中晶片101顶部的焊膏102残留物形成焊料凸点104。在线回流系统2包括多个回流段，优选9个，控制温度基本为250℃，以完全固化焊料凸点104。优选地，以预定速率加热晶片101以确保在回流过程中没有诸如部件开裂或焊膏102飞溅之类的缺陷。此外，在线回流装置2中的氧气水平也可控制为在整个回流循环中至少以百万分之75(PPM)的速度运行。每个焊料凸点104可具有大致45μm至55μm的凸起高度、大致90μm至110μm的直径范围以及大致10μm的最大焊料凸点104共面性。
在步骤203，将晶片101装入去焊剂装置3中进行清洗。在优选实施例中，去焊剂装置3要求在清洁过程中以预定间隔将晶片101装入所述去焊剂装置3中。一旦装入，清洁过程中需要将活性晶片101表面朝下，以便在重力的帮助下冲洗掉活性晶片101表面上的所有柔性残留物或化学物质。清洗过程的一些特征/参数包括清洗夹具旋转速度为60至80RPM，持续3至5秒，温度范围为50至120℃，清洗周期至少为25至60个周期，化学浓度为13％至20％；以及在预热温度下基本上为800至1000秒的容器搅拌时间，以促进容器中的化学反应和晶片101上的清洁效果。
在另一优选实施例中，在转移到生产线中的下一站之前，将干燥的晶片101转移到3D AOI装置4和X射线装置5以进行进一步检查。特别地，3D AOI装置4检查若干标准，其包括在整个晶片101上大致从40到65μm的平均凸点高度(ABH)性能、焊料凸点104缺陷检测和晶片101表面上的焊剂残留检测。焊料凸点104缺陷可包括污迹、硬点、粉碎、焊料量不足、小、大和氧化等。而X射线装置5检查标准，例如达到焊料凸点104尺寸25％的焊料凸点104空隙、大和小焊料凸点104体积以及焊料凸点104的可追溯性。
本发明包括包含在所附权利要求中的内容以及前述描述中的内容。尽管本发明以其优选形式进行了描述，但具有一定程度的特殊性，应当理解，优选形式的本说明仅通过示例的方式进行，并且可以在不脱离本发明范围的情况下对构造细节以及部件的组合和布置进行大量改变。

Claims (12)

1.一种在晶片(101)上印刷焊料的方法，包括以下步骤：
通过晶片焊料打印机(1)将焊膏(102)沉积到晶片(101)上；
通过在线回流装置(2)对沉积的焊膏(102)应用在线回流工艺，以在晶片(101)上形成焊料凸点(103)；和
通过去焊剂装置(3)清洁回流焊料凸点(103)，
其中，每个步骤通过分段过程控制优化其参数。
2.根据权利要求1所述的方法，还包括检查焊料凸点(103)的步骤。
3.根据权利要求1或2所述的方法，其中所述分段过程控制用于在约7小时的最大操作时间内实现约99％至99.5％的目标产率。
4.根据上述任一权利要求所述的方法，其中，晶片焊料打印机(1)以约30mm/s至40mm/s的速度沉积焊膏(102)。
5.根据上述任一权利要求所述的方法，其中所述晶片焊料打印机(1)使用刮板(105)在沉积的焊膏(102)上施加大致6kg到8kg的压力。
6.根据上述任一权利要求所述的方法，其中所述焊料凸点(103)的清洁是使用去焊剂装置(3)完成的。
7.根据权利要求6所述的方法，其中所述晶片(101)在清洁期间以预定间隔加载到所述去焊剂装置(3)中。
8.根据权利要求6或7所述的方法，其中所述去焊剂装置(3)在大致50℃至120℃的温度范围内运行。
9.根据上述任一权利要求所述的方法，其中使用三维(3D)自动光学检查(AOI)装置(4)和X射线装置(5)检查焊料凸点(103)。
10.一种用于在晶片(101)上印刷焊料的系统，包括：
晶片焊料打印机(1)，用于将焊膏(102)沉积到晶片(101)上；
在线回流装置(2)，用于对沉积的焊膏(102)应用在线回流工艺以在晶片(101)上形成焊料凸点(103)；和
用于清洁焊料凸点(103)的去焊剂装置(3)，
其中，系统使用通过分段过程控制优化的参数执行根据权利要求1至9中任一权利要求所述的方法。
11.根据权利要求10所述的系统，所述分段过程控制用于在约7小时的最大操作时间内实现约99％至99.5％的目标产率。
12.根据权利要求10或11中任一权利要求所述的系统，其中通过三维(3D)自动光学检查(AOI)装置(4)和X射线装置(5)检查焊料凸点(103)。
CN202210003309.0A 2021-01-06 2022-01-04 一种在晶片上印刷焊料的方法及其系统 Pending CN114714754A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
MYPI2021000051 2021-01-06
MYPI2021000051 2021-01-06

Publications (1)

Publication Number Publication Date
CN114714754A true CN114714754A (zh) 2022-07-08

Family

ID=82218992

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210003309.0A Pending CN114714754A (zh) 2021-01-06 2022-01-04 一种在晶片上印刷焊料的方法及其系统

Country Status (4)

Country Link
US (1) US20220216170A1 (zh)
KR (1) KR20220099494A (zh)
CN (1) CN114714754A (zh)
TW (2) TW202243041A (zh)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6759319B2 (en) * 2001-05-17 2004-07-06 Institute Of Microelectronics Residue-free solder bumping process
JP5246187B2 (ja) * 2010-03-15 2013-07-24 オムロン株式会社 Ｘ線検査装置、ｘ線検査方法およびプログラム
CN102947103B (zh) * 2010-05-28 2015-03-25 太阳化学工业株式会社 具有非晶质炭膜的网版印刷用孔版及其制造方法
US11450630B2 (en) * 2020-10-27 2022-09-20 Cirrus Logic, Inc. Coupling of integrated circuits (ICS) through a passivation-defined contact pad

Also Published As

Publication number Publication date
TW202243041A (zh) 2022-11-01
TWM644821U (zh) 2023-08-11
US20220216170A1 (en) 2022-07-07
KR20220099494A (ko) 2022-07-13

Similar Documents

Publication Publication Date Title
US5395040A (en) Apparatus for forming surface mount solder joints
US5478700A (en) Method for applying bonding agents to pad and/or interconnection sites in the manufacture of electrical circuits using a bonding agent injection head
US5672542A (en) Method of making solder balls by contained paste deposition
US6992001B1 (en) Screen print under-bump metalization (UBM) to produce low cost flip chip substrate
US7781232B2 (en) Method to recover underfilled modules by selective removal of discrete components
Mearig et al. An overview of manufacturing BGA technology
US6523736B1 (en) Methods and apparatus for forming solder balls
JP2005197649A (ja) フリップチップバンプパッド形成方法及びその構造
US20160345443A1 (en) Stencil set and system for printing solder paste for printed circuit boards
GB2350320A (en) Squeegee for screen printing that agitates, rotates and fills
CN114714754A (zh) 一种在晶片上印刷焊料的方法及其系统
US7159758B1 (en) Circuit board processing techniques using solder fusing
JP3779490B2 (ja) バンプ形成方法
US20010052536A1 (en) Method and apparatus for making an electrical device
US6637641B1 (en) Systems and methods for manufacturing a circuit board
WO2002035289A2 (en) Method and materials for printing particle-enhanced electrical contacts
EP2017882B1 (en) Conductive ball mounting method and apparatus
JP3366155B2 (ja) バンプ形成方法及びバンプ形成装置
Ryu et al. Novel approaches to current bga packaging challenges
JP2013152962A (ja) 半田ボールの搭載方法
JPH0799216A (ja) バンプ付き回路基板の製造方法
JP4623777B2 (ja) 回路基板の洗浄方法
JP4990325B2 (ja) 導電性ボール搭載方法及び装置
JP2005340282A (ja) バンプ形成装置及びバンプ形成方法
JP2010073763A (ja) 半田印刷方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination