CN114664657A - 一种晶圆表面处理方法 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 43
- 238000004381 surface treatment Methods 0.000 title claims abstract description 7
- 238000000137 annealing Methods 0.000 claims abstract description 18
- 230000003647 oxidation Effects 0.000 claims abstract description 15
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 15
- 238000001816 cooling Methods 0.000 claims abstract description 12
- 238000010438 heat treatment Methods 0.000 claims abstract description 10
- 239000012298 atmosphere Substances 0.000 claims description 23
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 229910052739 hydrogen Inorganic materials 0.000 claims description 8
- 230000003746 surface roughness Effects 0.000 abstract description 7
- 235000012431 wafers Nutrition 0.000 description 25
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 7
- 239000001257 hydrogen Substances 0.000 description 6
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 5
- 229910052786 argon Inorganic materials 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000004151 rapid thermal annealing Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000007774 longterm Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000012300 argon atmosphere Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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Abstract
本发明涉及一种晶圆表面处理方法。本发明通过控制处理过程中各个阶段的气体配置以及相应的升温退火和降温氧化减薄过程,使最终晶圆表面粗糙度小于5A,有效减少了最终处理工艺成本,具有良好的应用前景。
Description
技术领域
本发明属于绝缘层上硅领域,特别涉及一种晶圆表面处理方法。
背景技术
随着后摩尔时代的持续推进,人们对半导体晶圆,特别是硅晶圆在结构、厚度均匀性以及表面平坦度等方面提出了更加苛刻的要求。目前硅结构晶圆SOI(Silicon onInsulator)已经被人们在微电子、光学以及光电领域取得了广泛的应用,对应的在材料方面也增加了更多的挑战。先进SOI器件要求顶层硅越来越薄,这直接体现出了传统机械化学抛光方法的弊端(厚度不均匀,并且容易引入额外的表面缺陷)。最终阶段热处理被认为是取代传统机械化学抛光的有利手段,包括长时间的热处理以及快速热退火。其中长时间的热退火更容易对晶圆长程起伏(低频)进行平坦化;而快速热退火的优势在于短程起伏(高频),并且其整个过程快速,节省时间。SOI热退火处理中通常是在氩气/氢气混合气氛下进行的,氢气主要作用是防止氧的存在恶化表面颗粒程度,但是由于氢气在高温下对硅片表面具有刻蚀作用,因此氢气的含量至关重要。具体用途的SOI对应的顶层硅厚度往往不同,因此在热退火过程后,需要跟减薄工艺进行整合。
US9202711B2描述了一种降低半导体晶片自由表面粗糙度的方法,包括处理晶片、硅层以及处理晶片和硅层之间的介电层。硅层具有定义结构外表面的解理表面。该方法利用氩气、氢气、氦气的单纯气体或者其混合物气体(优选5%-7%),在至少约950℃的温度(优先是 1050-1200℃)下对结构进行热退火(时间为1到4小时),然后在剥离的表面上执行非接触式平坦化处理。但是在整个平坦化过程中,氢氩混合气中氢气的浓度太大会对晶圆表面存在刻蚀作用,最终的表面状态很难达到预期目标。
US8389412B2将快速热退火与氧化减薄工艺进行整合,通过RTA/Sacrox/RTA/Sacrox流程对晶圆进行最终处理,在一定程度上降低了SOI晶圆表面粗糙度。RTA在一定范围内可以达到降低SOI晶圆表面粗糙度的效果,但受制于其对低频起伏的有限性,该流程最终能够达到的粗糙度无法满足目前工艺的要求。
发明内容
本发明所要解决的技术问题是提供一种晶圆表面处理方法,通过控制处理过程中各个阶段的气体配置以及相应的升温退火和降温氧化减薄过程,使最终晶圆表面粗糙度小于5A,有效减少了最终处理工艺成本,具有良好的应用前景。
本发明提供了一种晶圆表面处理方法,包括:
将具有SOI结构的晶圆装载进入至垂直炉管中,装载温度为500℃-800℃(优选为560℃),气氛为纯Ar,保持1min-10min(优选为5min);然后将气氛切换为Ar+n%H2混合气氛开始升温,n小于10(优选小于3);升温至1050℃-1250℃(优选为1100℃-1200℃)后开始退火,退火时间为1min-120min(优选为30min-60min);退火过程结束后保持气氛环境为纯Ar,降温至700℃以下取出,即可。
所述升温速率为0.5-20℃/min。
所述升温至1050℃-1300℃后继续保持升温阶段的Ar+n%H2混合气氛,或者切换成纯 Ar气氛。
所述降温至室温的速率为0.5-10℃/min。
可选的,所述退火过程结束后进行氧化减薄,再降温至室温。
所述氧化温度为800℃-1000℃,降温至氧化温度的速率为1-10℃/min。
所述氧化减薄气氛为干氧、湿氧或干氧湿氧结合。
可选的,在氧化减薄结束后气氛切换为纯氩气,缓慢降温至500℃-800℃,优选为650℃,降温速率为0.5-10℃/min。
可选的,氧化减薄后在HF溶液中移除表面氧化层,HF溶液浓度小于20%。
有益效果
本发明通过控制处理过程中各个阶段的气体配置以及相应的升温退火和降温氧化减薄过程,使最终晶圆表面粗糙度小于5A,并且直接达到了目标顶层硅厚度,有效减少了最终处理工艺成本,具有良好的应用前景。
附图说明
图1为本发明第一种工艺的温度曲线和气氛;
图2为本发明第二种工艺的温度曲线和气氛;
图3为实施例1退火前后SOI晶圆表面AFM 10um X10 um非接触式扫面图。
具体实施方式
下面结合具体实施例,进一步阐述本发明。应理解,这些实施例仅用于说明本发明而不用于限制本发明的范围。此发明也适用于其他类似的半导体材料。此外应理解,在阅读了本发明讲授的内容之后,本领域技术人员可以对本发明作各种改动或修改,这些等价形式同样落于本申请所附权利要求书所限定的范围。
实施例1
图3左图为使用Smart-cut工艺得到的剥离后的SOI晶圆表面AFM 10um X10 um非接触式扫面图,其表面粗糙度为93.5A;
将上述晶圆装载进入CVD反应炉中,装载温度为800℃,气氛为纯Ar,保持5min;然后将气氛切换为Ar+2.5%H2混合气氛开始升温,升温速率为5℃/min;升温至目标温度开始退火阶段,气氛切换成纯氩气氛,温度为1100℃,退火时间为40min;退火阶段结束后气氛环境设置为纯Ar,降温至600℃以下后取出,降温速率为0.5-10℃/min。图3右图为退火后的AFM 10um X10 um非接触式扫面图,退火后晶圆表面粗糙度为4.4A。
Claims (8)
1.一种晶圆表面处理方法,包括:
将具有SOI结构的晶圆装载进入至垂直炉管中,装载温度为500℃-800℃,气氛为纯Ar,保持1min-10min;然后将气氛切换为Ar+n%H2混合气氛开始升温,n小于10;升温至1050℃-1300℃后开始退火,退火时间为1min-120min;退火过程结束后保持气氛环境为纯Ar,降温至700℃以下取出,即可。
2.根据权利要求1所述的方法,其特征在于:所述升温速率为0.5-20℃/min。
3.根据权利要求1所述的方法,其特征在于:所述升温至1050℃-1300℃后继续保持升温阶段的Ar+n%H2混合气氛,或者切换成纯Ar气氛。
4.根据权利要求1所述的方法,其特征在于:所述降温至室温的速率为0.5-10℃/min。
5.根据权利要求1所述的方法,其特征在于:所述退火过程结束后进行氧化减薄,再降温至室温。
6.根据权利要求5所述的方法,其特征在于:所述氧化温度为800℃-1000℃,降温至氧化温度的速率为0.5-10℃/min。
7.根据权利要求5所述的方法,其特征在于:所述氧化减薄气氛为干氧、湿氧或干氧湿氧结合。
8.根据权利要求5所述的方法,其特征在于:氧化减薄后在HF溶液中移除表面氧化层,HF溶液浓度小于20%。
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Application Number | Priority Date | Filing Date | Title |
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CN202111269451.1A CN114664657A (zh) | 2021-10-29 | 2021-10-29 | 一种晶圆表面处理方法 |
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