CN114650663B - Forming method of double-sided embedded circuit - Google Patents
Forming method of double-sided embedded circuit Download PDFInfo
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- CN114650663B CN114650663B CN202210317745.5A CN202210317745A CN114650663B CN 114650663 B CN114650663 B CN 114650663B CN 202210317745 A CN202210317745 A CN 202210317745A CN 114650663 B CN114650663 B CN 114650663B
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- Prior art keywords
- circuit
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- polyimide film
- layer
- film material
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- 238000000034 method Methods 0.000 title claims abstract description 11
- 239000000463 material Substances 0.000 claims abstract description 71
- 239000010410 layer Substances 0.000 claims abstract description 47
- 229920001721 polyimide Polymers 0.000 claims abstract description 42
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 29
- 229910052802 copper Inorganic materials 0.000 claims abstract description 29
- 239000010949 copper Substances 0.000 claims abstract description 29
- 238000005530 etching Methods 0.000 claims abstract description 22
- 229910018487 Ni—Cr Inorganic materials 0.000 claims abstract description 17
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 claims abstract description 17
- 238000009713 electroplating Methods 0.000 claims abstract description 17
- 239000007788 liquid Substances 0.000 claims abstract description 8
- 239000002344 surface layer Substances 0.000 claims abstract description 6
- 238000004544 sputter deposition Methods 0.000 claims abstract description 4
- 230000002378 acidificating effect Effects 0.000 claims abstract description 3
- 238000000354 decomposition reaction Methods 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 3
- 238000004080 punching Methods 0.000 claims description 3
- 239000000047 product Substances 0.000 claims 8
- 239000012467 final product Substances 0.000 claims 1
- 239000004642 Polyimide Substances 0.000 abstract description 4
- 239000003814 drug Substances 0.000 abstract 1
- 238000009459 flexible packaging Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 238000005553 drilling Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000012779 reinforcing material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/032—Organic insulating material consisting of one material
- H05K1/0346—Organic insulating material consisting of one material containing N
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The invention relates to a forming method of a double-sided embedded circuit, and belongs to the technical field of circuit boards. Connecting the circuits of the first surface and the second surface of the product to the electroplating leads outside the outline of the product in the product design stage, covering a layer of photosensitive material on the upper surface and the lower surface of the flexible polyimide material, carrying out anisotropic compensation design on the edges of the non-conductive circuits in the exposure mask plate design stage, and carrying out exposure and development treatment on the photosensitive material on the upper surface and the lower surface. And performing PI etching by using an acidic PI etching liquid, forming grooves with inverted trapezoid cross-section line shapes on the surface of the polyimide material, sputtering nickel-chromium conductive layers on two sides of the polyimide material, stripping the photosensitive material by using an alkaline stripping liquid medicine, removing a nickel-chromium seed layer in the surface layer of the photosensitive material, and electroplating copper on the product line and the electroplated lead area to form the flexible packaging substrate with the double-sided embedded line structure.
Description
Technical Field
The invention relates to a forming method of a double-sided embedded circuit, and belongs to the technical field of circuit boards.
Background
Along with the gradual improvement of the circuit fineness of the flexible circuit board products, the demands of the market on the double-sided flexible fine circuit board are gradually strong, but the alignment problem of the double-sided circuit relative to the through holes always limits the fine development of the double-sided circuit to the circuit, and the double-sided flexible fine circuit board is a technological difficulty in continuously pursuing breakthrough in the industry. In addition, the limitation requirements of the internal space of the equipment are more strict, and the overall thickness of the flexible circuit board also tends to be ultrathin.
At present, the technical scheme for realizing double-sided circuit conduction of double-sided circuit board products generally adopts the following defects of a mechanical drilling mode and a laser drilling mode, and then the circuit patterns on the two sides are transferred by using an exposure principle:
The mechanical drilling has machining position errors, and the deviation of the drilling has great influence on the alignment of the two-sided circuits. In order to realize the alignment of two-sided circuits, alignment points on a product need to be grasped during exposure, and alignment tolerance exists in alignment of exposure equipment, so that hole rings are required to be designed at two-sided through holes during circuit design, and the fine degree of the circuits is difficult to promote due to the existence of the hole rings. Under the condition of hole ring design, the alignment of the two-sided circuits relative to the through holes needs to be satisfied at the same time when exposure alignment is performed, and defects such as hole deviation and even broken holes and the like, which are caused by overlarge single-sided or double-sided exposure alignment deviation, still occur, so that the functional conduction of the product is affected.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a forming method of a double-sided embedded circuit, which omits the machining step of mechanical drilling and adopts a scheme of forming a double-sided conducting circuit by PI etching.
The invention is realized by the following technical scheme: the method for forming the double-sided embedded circuit is characterized by comprising the following steps of:
Step 1: in the product design stage, connecting a first layer of circuit and a second layer of circuit on two sides of a product to an electroplating lead outside a product outline, realizing electric function conduction during copper electroplating, and adopting a conduction PAD at the conduction position of the first layer of circuit and the second layer of circuit;
Step 2: respectively pressing a layer of photosensitive material on the upper surface and the lower surface of a layer of ultrathin polyimide film material;
Step 3: in the design stage of the exposure mask plate, carrying out anisotropic compensation design on the edge of a non-conducting circuit, carrying out non-compensation design on the edge of a conducting PAD, carrying out exposure treatment on the photosensitive materials on the upper surface and the lower surface simultaneously, transferring the circuit pattern on the mask plate onto the photosensitive materials, developing after exposure, and removing the photosensitive materials subjected to decomposition reaction by using a developing solution to expose the polyimide film material;
Step 4: PI etching is carried out on the upper surface and the lower surface of the polyimide film material, a circuit groove is formed on the surface of the polyimide film material, and etching conduction on two sides of the polyimide film material is realized only at a conduction PAD;
Step 5: sputtering nickel-chromium layers on the upper surface and the lower surface of the polyimide film material, forming a conductive seed layer on the bottom and the side wall of a circuit groove of the polyimide film material, wherein due to the difference between the material characteristics of the photosensitive material and the polyimide film material, part of sputtered nickel-chromium particles can enter the surface layer of the photosensitive material but cannot form a continuous nickel-chromium seed layer;
Step 6: stripping the two layers of photosensitive materials on the upper surface and the lower surface by using alkaline stripping liquid, and synchronously removing the nickel-chromium seed layers in the surface layers of the two photosensitive materials, wherein the nickel-chromium seed layers are only arranged at the bottom and the side wall of the circuit groove of the product;
Step 7: electroplating copper on the product by utilizing the electroplated lead area, electroplating and expanding copper on the circuit and the electroplated lead area to form a copper circuit, wherein the copper plating height is flush with the surface of the polyimide film material, so that an embedded copper circuit structure with exposed copper circuit surface is formed;
step 8: and (3) blanking and forming the product, and punching out the electroplated wires outside the outline of the product to form a final finished product of the product.
And 3, performing anisotropic compensation on the edge of the non-conducting circuit to design the non-conducting circuit into a saw-tooth shape.
And step 4, performing PI etching by using an acidic PI etching liquid, and forming grooves with inverted trapezoid cross-section line shapes on the surfaces of polyimide film materials, wherein the anisotropic compensation existing at the edges of the non-conducting lines has the effect of slowing down the etching reaction rate, so that the etching conduction of the two sides of the polyimide film materials is realized only at the conducting PAD, and the two sides of the line grooves at the non-conducting lines are not conducted.
The beneficial effects of the invention are as follows: 1. the influence of drilling deviation existing in mechanical drilling and exposure deviation of the two-sided mask plates relative to the through holes is avoided, the alignment accuracy of the conductive PAD of the upper and lower two-sided circuits can be ensured only by ensuring the accuracy of the relative position relation of the upper and lower two-sided mask plates during exposure, and the technical difficulty of alignment and conduction of the two-sided circuits is greatly reduced.
2. The influence of drilling deviation existing in mechanical drilling and exposure deviation of the two-sided mask plates relative to the through holes is avoided, so that a hole ring design is not needed. And because the relative position relation precision of the upper mask plate and the lower mask plate is easier to ensure, the size of the conducted PAD is greatly reduced compared with the design size of the hole ring of the mechanical drilling, and the development of the double-sided circuit board to a fine circuit can be realized.
3. The surface of the formed embedded copper circuit is flush with the surface of the polyimide material without step difference, which is more beneficial to the adhesion of the subsequent solder resist protective material and reinforcing material, and no capillary effect exists between the circuits when the solder resist ink is printed, thus being more beneficial to the precision control of the ink overflow.
4. Polyimide film materials with different thicknesses can be selected according to requirements, and the thickness of the two-sided circuit is contained in the thickness of the polyimide film, so that the overall thickness of the double-sided circuit board is reduced, and the development of light and thin circuit board is realized.
5. The machining step of mechanical drilling is omitted, the scheme of forming two-sided conducting circuits by PI etching is adopted, and adverse phenomena such as polyimide film pulling and copper scraps residue are avoided.
Drawings
The invention is further described below with reference to the drawings and examples.
FIG. 1 is a schematic diagram of a first layer circuit design of the product of the present invention;
FIG. 2 is a schematic diagram of a second layer circuit design of the product of the present invention;
FIG. 3 is a schematic illustration of the effect of the two-sided line overlap of the product of the present invention; ;
FIG. 4 is a schematic cross-sectional view of step 2 of the present invention;
FIG. 5 is a schematic cross-sectional view of step 3 of the present invention;
FIG. 6 is a schematic cross-sectional view of step 4 of the present invention;
FIG. 7 is a schematic cross-sectional view of step 5 of the present invention;
FIG. 8 is a schematic cross-sectional view of step6 of the present invention;
FIG. 9 is a schematic cross-sectional view of step 7 of the present invention;
FIG. 10 is a schematic perspective view of the present invention at section A of FIG. 3;
FIG. 11 is a schematic perspective view of the present invention at section B of FIG. 3;
FIG. 12 is a schematic perspective view of the present invention at section C of FIG. 3;
FIG. 13 is a schematic diagram of the product of the present invention after blanking in step 8;
FIG. 14 is a schematic diagram of the shape of the anisotropic compensation design of the present invention.
In the figure: 1. a first layer of wiring; 2. a second layer of wiring; 3. a product contour line; 4. electroplating a wire; 5. turning on PAD; 6. polyimide film material; 7. a photosensitive material; 8. exposing the mask plate; 9. a non-conductive line; 10. a line groove; 11. a nickel-chromium layer; 12. a seed layer; 13. a copper line; .
Detailed Description
A method for forming a double-sided buried line as shown in fig. 1 to 14, comprising the steps of:
Step 1: in the product design stage, connecting a first layer of circuit 1 and a second layer of circuit 2 on two sides of a product to an electroplating wire 4 outside a product outline 3 to realize electric function conduction during copper electroplating, adopting a conduction PAD5 at the conduction position of the first layer of circuit 1 and the second layer of circuit 2, and enabling the two sides of the product to be overlapped together, wherein the conduction PAD design is adopted at the conduction position of the two sides of the circuit, and the following steps are described by taking a section A in FIG. 3 as an example;
Step 2: respectively pressing a layer of photosensitive material 7 on the upper surface and the lower surface of a layer of ultrathin polyimide film material 6, wherein the schematic cross section of the photosensitive material is shown in figure 4;
Step 3: in the design stage of the exposure mask plate 8, the edge of the non-conducting circuit 9 is subjected to anisotropic compensation design, the edge of the conducting PAD5 is not subjected to compensation design, the photosensitive material 7 on the upper surface and the lower surface is subjected to exposure treatment simultaneously, the circuit pattern on the mask plate 8 is transferred onto the photosensitive material 7, development is carried out after exposure is finished, the photosensitive material 7 subjected to decomposition reaction is removed by using a developing solution, and the polyimide film material 6 is exposed, wherein the schematic cross section of the polyimide film material is shown in figure 5;
Step 4: PI etching is carried out on the upper surface and the lower surface of the polyimide film material 6, a circuit groove 10 is formed on the surface of the polyimide film material 6, and etching conduction on two sides of the polyimide film material 6 is realized only at a conduction PAD5, and the section schematic diagram is shown in figure 6;
Step 5: sputtering nickel-chromium layers 11 on the upper surface and the lower surface of the polyimide film material 6, forming a conductive seed layer 12 on the bottom and the side wall of the circuit groove 10 of the polyimide film material 6, wherein due to the difference of the material characteristics of the photosensitive material and the polyimide film material, the sputtered nickel-chromium particles partially enter the surface layer of the photosensitive material but cannot form a continuous nickel-chromium seed layer, and the section schematic of the nickel-chromium seed layer is shown in fig. 7;
Step 6: stripping the two layers of photosensitive materials 7 on the upper surface and the lower surface by using alkaline stripping liquid, synchronously removing the nickel-chromium seed layers in the surface layers of the two layers of photosensitive materials 7, and only providing the nickel-chromium seed layers 12 on the bottom and the side walls of the circuit grooves 10 of the product, wherein the section schematic is shown in figure 8;
step 7: electroplating copper on the product by utilizing the area of the electroplated lead 4, electroplating and expanding copper on the circuit and the area of the electroplated lead to form a copper circuit 13, wherein the copper plating height is flush with the surface of the polyimide film material 6 to form an embedded copper circuit structure with the exposed surface of the copper circuit, and the stacking schematic diagram of the copper plated product is shown in fig. 9;
step 8: and (3) blanking and forming the product, and punching out the electroplated lead 4 outside the product outline 3 to form the final finished product of the product.
And 3, the edge of the non-conducting line 9 is subjected to anisotropic compensation design into a saw-tooth shape.
In the step 4, the acid PI etching liquid is used for PI etching, and the groove 10 with the shape of the inverted trapezoid cross section line is formed on the surface of the polyimide film material 6, and the anisotropic compensation existing at the edge of the non-conducting line 9 has the effect of slowing down the etching reaction rate, so that the etching conduction on the two sides of the polyimide film material 6 is realized only at the conducting PAD5, and the two sides of the line groove 10 at the non-conducting line 9 are not conducted.
The applicable range of the invention comprises all flexible circuit board products which contain FPC and COF products and use polyimide films as circuit bearing materials, and the cross section stacking structure of the polyimide film material embedded in the double-sided copper circuit is more beneficial to the control of the overflow precision of the printing ink of the product and can realize the development of the product to be light and thin. The embedded circuit cross section stacking structure can conveniently control the depth of the formed non-conductive inverted trapezoid circuit groove to realize the conduction of the double-sided circuit of the product by changing the different compensation design of the non-conductive circuit and controlling the conveying speed of PI etching and other process conditions according to the thickness requirement of the product, can solve the copper thickness different requirement, realize the formation of the thick copper circuit and improve the heat dissipation performance of the product, and the different compensation design of the non-conductive circuit edge in the design stage of the exposure mask plate is not limited to the design of the saw tooth shape, and can control the speed of PI etching according to the design of the different compensation schemes of other shapes and sizes of the circuit spacing to control the depth of the etched groove, including but not limited to 5 shapes illustrated in FIG. 14.
Claims (3)
1. The method for forming the double-sided embedded circuit is characterized by comprising the following steps of:
Step 1: in the product design stage, connecting a first layer of circuit (1) and a second layer of circuit (2) on two sides of a product to an electroplating wire (4) outside a product outline (3) to realize electrical function conduction during copper electroplating, wherein a conduction PAD (5) is adopted at the conduction position of the first layer of circuit (1) and the second layer of circuit (2);
step 2: respectively pressing a layer of photosensitive material (7) on the upper surface and the lower surface of a layer of ultrathin polyimide film material (6);
step 3: in the design stage of the exposure mask plate (8), carrying out anisotropic compensation design on the edge of a non-conducting circuit (9), carrying out no compensation design on the edge of a conducting PAD (5), carrying out exposure treatment on the photosensitive material (7) on the upper surface and the lower surface simultaneously, transferring a circuit pattern on the mask plate (8) onto the photosensitive material (7), developing after exposure is finished, and removing the photosensitive material (7) subjected to decomposition reaction by using a developing solution to expose the polyimide film material (6);
Step 4: PI etching is carried out on the upper surface and the lower surface of the polyimide film material (6), a circuit groove (10) is formed on the surface of the polyimide film material (6), and etching conduction on two sides of the polyimide film material (6) is realized only at a conduction PAD (5);
step 5: sputtering nickel-chromium layers (11) on the upper surface and the lower surface of the polyimide film material (6), and forming a conductive seed layer (12) on the bottom and the side wall of the circuit groove (10) of the polyimide film material (6);
Step 6: stripping the two layers of photosensitive materials (7) on the upper surface and the lower surface by using alkaline stripping liquid, and synchronously removing the nickel-chromium seed layers in the surface layers of the two layers of photosensitive materials (7), wherein the nickel-chromium seed layers (12) are only arranged at the bottom and the side wall of the circuit groove (10) of the product;
Step 7: electroplating copper on the product by utilizing the area of the electroplating wire (4), electroplating and expanding copper on the circuit and the area of the electroplating wire to form a copper circuit (13), wherein the copper plating height is flush with the surface of the polyimide film material (6), so that a buried copper circuit structure with exposed copper circuit surface is formed;
Step 8: and (3) blanking and forming the product, and punching out the electroplated lead (4) outside the product outline (3) to form the final product of the product.
2. The method for forming a double-sided buried line according to claim 1, wherein: and 3, the edge of the non-conducting circuit (9) is subjected to anisotropic compensation design into a saw-tooth shape.
3. The method for forming a double-sided buried line according to claim 1, wherein: and step 4, performing PI etching by using an acidic PI etching liquid, and forming a groove (10) with an inverted trapezoid cross-section line shape on the surface of the polyimide film material (6).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210317745.5A CN114650663B (en) | 2022-03-29 | 2022-03-29 | Forming method of double-sided embedded circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210317745.5A CN114650663B (en) | 2022-03-29 | 2022-03-29 | Forming method of double-sided embedded circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114650663A CN114650663A (en) | 2022-06-21 |
| CN114650663B true CN114650663B (en) | 2024-05-17 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202210317745.5A Active CN114650663B (en) | 2022-03-29 | 2022-03-29 | Forming method of double-sided embedded circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2004281532A (en) * | 2003-03-13 | 2004-10-07 | Furukawa Electric Co Ltd:The | Method of manufacturing double-sided wiring board |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7666471B2 (en) * | 2006-03-22 | 2010-02-23 | Mark Wojtaszek | Polyimide substrate and method of manufacturing printed wiring board using the same |
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| JP2004281532A (en) * | 2003-03-13 | 2004-10-07 | Furukawa Electric Co Ltd:The | Method of manufacturing double-sided wiring board |
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| Publication number | Publication date |
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| CN114650663A (en) | 2022-06-21 |
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