CN114650663A - Forming method of double-sided embedded type circuit - Google Patents
Forming method of double-sided embedded type circuit Download PDFInfo
- Publication number
- CN114650663A CN114650663A CN202210317745.5A CN202210317745A CN114650663A CN 114650663 A CN114650663 A CN 114650663A CN 202210317745 A CN202210317745 A CN 202210317745A CN 114650663 A CN114650663 A CN 114650663A
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- circuit
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- film material
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- 238000000034 method Methods 0.000 title claims abstract description 12
- 239000000463 material Substances 0.000 claims abstract description 76
- 239000010410 layer Substances 0.000 claims abstract description 47
- 229920001721 polyimide Polymers 0.000 claims abstract description 44
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 30
- 229910052802 copper Inorganic materials 0.000 claims abstract description 30
- 239000010949 copper Substances 0.000 claims abstract description 30
- 238000013461 design Methods 0.000 claims abstract description 30
- 238000009713 electroplating Methods 0.000 claims abstract description 24
- 238000005530 etching Methods 0.000 claims abstract description 24
- 229910018487 Ni—Cr Inorganic materials 0.000 claims abstract description 20
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 claims abstract description 20
- 239000002344 surface layer Substances 0.000 claims abstract description 7
- 239000007788 liquid Substances 0.000 claims abstract description 5
- 239000003814 drug Substances 0.000 claims abstract description 4
- 239000000047 product Substances 0.000 claims description 42
- 230000000694 effects Effects 0.000 claims description 5
- 239000002245 particle Substances 0.000 claims description 4
- 238000007747 plating Methods 0.000 claims description 4
- 230000002378 acidificating effect Effects 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000000354 decomposition reaction Methods 0.000 claims description 3
- 239000012467 final product Substances 0.000 claims description 3
- 238000004080 punching Methods 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 2
- 238000011161 development Methods 0.000 abstract description 6
- 239000004642 Polyimide Substances 0.000 abstract description 4
- 239000002253 acid Substances 0.000 abstract 1
- 238000009459 flexible packaging Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 238000005553 drilling Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000012779 reinforcing material Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/032—Organic insulating material consisting of one material
- H05K1/0346—Organic insulating material consisting of one material containing N
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The invention relates to a method for forming a double-sided embedded circuit, and belongs to the technical field of circuit boards. The method comprises the steps of connecting circuits of a first surface and a second surface of a product to an electroplating lead outside a product outline line in a product design stage, covering a layer of photosensitive material on the upper surface and the lower surface of a flexible polyimide material, carrying out anisotropy compensation design on the edge of a non-conducting circuit in a design stage of an exposure mask plate, and carrying out exposure and development treatment on the photosensitive material on the upper surface and the lower surface. PI etching is carried out by utilizing acid PI etching liquid medicine, a groove with an inverted trapezoidal section line shape is formed on the surface of the polyimide material, nickel-chromium conducting layers are sputtered on two sides of the polyimide material, the photosensitive material is stripped by utilizing alkaline stripping liquid medicine, meanwhile, a nickel-chromium seed layer in the surface layer of the photosensitive material is removed, then, copper electroplating is carried out on a product line and an electroplating lead area, and the flexible packaging substrate with the double-sided embedded type line structure is formed.
Description
Technical Field
The invention relates to a method for forming a double-sided embedded circuit, and belongs to the technical field of circuit boards.
Background
With the gradual improvement of circuit fineness of flexible circuit board products, the market demands for double-sided flexible fine circuit boards are gradually strong, but the alignment problem of the opposite via holes of the circuits on the two sides always limits the development of the double-sided circuit boards to the circuit fineness, and is a technological difficulty for continuously pursuing breakthrough in the industry. In addition, the restriction requirement of the internal space of the device is more strict, and the whole thickness of the flexible circuit board tends to be ultra-thin.
The technical scheme that the double-sided circuit of present double-sided circuit board product realizes that two-sided circuit switches on generally adopts utilizes mechanical drilling and laser beam drilling, recycles the circuit figure of exposure principle transfer two sides, and the defect of mechanical drilling's mode is as follows:
the mechanical drilling has a processing position error, and the deviation of the drilling has a great influence on the alignment of the circuits on two sides. In order to realize the alignment of the circuits on the two sides, alignment points on a product need to be grabbed during exposure, and alignment tolerance exists due to the alignment of exposure equipment, so that ring holes need to be designed at the via holes on the two sides during circuit design, and the fine degree of the circuits is difficult to promote due to the ring holes. Under the condition of hole ring design, the alignment of two-sided circuits relative to a through hole needs to be met during exposure alignment, and the defects of hole deviation and even hole breakage and the like caused by overlarge single-sided or double-sided exposure alignment deviation still occur, so that the functional conduction of a product is influenced.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a method for forming a double-sided embedded type circuit, which cancels the machining step of mechanical drilling and adopts a scheme of forming a double-sided conducting circuit by PI etching.
The invention is realized by the following technical scheme: a method for forming a double-sided embedded circuit is characterized by comprising the following steps:
step 1: in the product design stage, connecting a first layer of circuit and a second layer of circuit on two sides of a product to an electroplating lead outside a product outline line to realize electric function conduction during copper electroplating, and adopting a conduction PAD at the conduction position of the first layer of circuit and the second layer of circuit;
step 2: respectively pressing a layer of photosensitive material on the upper surface and the lower surface of a layer of ultrathin polyimide film material;
and step 3: in the design stage of an exposure mask plate, carrying out opposite compensation design on the edge of a non-conducting circuit, carrying out no compensation design on the edge of a conducting PAD, carrying out exposure treatment on photosensitive materials on the upper surface and the lower surface at the same time, transferring a circuit pattern on the mask plate onto the photosensitive materials, developing after exposure is finished, removing the photosensitive materials subjected to decomposition reaction by using a developing solution, and exposing a polyimide film material;
and 4, step 4: PI etching is carried out on the upper surface and the lower surface of the polyimide film material, a circuit groove is formed on the surface of the polyimide film material, and etching conduction of the two surfaces of the polyimide film material is realized only at the conducting PAD;
and 5: sputtering nickel-chromium layers on the upper surface and the lower surface of the polyimide film material, and forming a conductive seed layer on the bottom and the side wall of the circuit groove of the polyimide film material, wherein due to the difference between the material characteristics of the photosensitive material and the polyimide film material, the sputtered nickel-chromium particle part can enter the surface layer of the photosensitive material but cannot form a continuous nickel-chromium seed layer;
step 6: stripping the two layers of photosensitive materials on the upper surface and the lower surface by using an alkaline stripping liquid, synchronously removing the nickel-chromium seed layers in the surface layers of the two photosensitive materials, and only forming the nickel-chromium seed layers at the bottom and on the side wall of the circuit groove of the product;
and 7: electroplating copper on the product by utilizing the electroplating lead area, electroplating copper on the circuit and the electroplating lead area to form a copper circuit, wherein the copper plating height is flush with the surface of the polyimide film material to form an embedded copper circuit structure with an exposed copper circuit surface;
and 8: and (4) blanking and forming the product, and punching the electroplated conducting wire outside the outline of the product to form the final product of the product.
And 3, performing anisotropic compensation on the edge of the non-conducting circuit and designing the edge into a sawtooth shape.
And 4, performing PI etching by using the acidic PI etching liquid medicine, forming a groove with an inverted trapezoidal section line shape on the surface of the polyimide film material, wherein due to the fact that the anisotropic compensation existing at the edge of the non-conducting line plays a role in slowing down the etching reaction rate, etching conduction of two sides of the polyimide film material is realized only at the conducting PAD, and two sides of the line groove at the non-conducting line are not conducted.
The invention has the beneficial effects that: 1. the influence of drilling deviation existing in mechanical drilling and exposure deviation of the two mask plates relative to the conducting hole is avoided, the alignment precision of the conducting PAD of the upper and lower circuits can be guaranteed only by guaranteeing the relative position relation precision of the upper and lower mask plates during exposure, and the technical difficulty of the alignment conduction of the two circuits is greatly reduced.
2. The influence of the deviation of the drilling holes existing in the mechanical drilling and the exposure deviation of the mask plates on the two sides relative to the conducting holes is avoided, and therefore the design of a hole ring is not needed. And because the relative position relation precision of the upper mask plate and the lower mask plate is easier to ensure, the size of the conducting PAD is greatly reduced compared with the design size of a mechanical drilling hole ring, and the development of a double-sided circuit board to a fine circuit can be realized.
3. The surface of the formed embedded copper circuit is flush with the surface of the polyimide material without section difference, so that the embedded copper circuit is more favorable for the subsequent attachment of a solder resist protective material and a reinforcing material, and the capillary effect does not exist between circuits when the solder resist ink is printed, thereby being more favorable for the precision control of ink overflow.
4. Polyimide film materials with different thicknesses can be selected according to needs, and the thickness of the circuits on the two sides is contained in the thickness of the polyimide film, so that the overall thickness of the double-sided circuit board is reduced, and the development towards lightness and thinness is realized.
5. The machining step of mechanical drilling is cancelled, and the scheme of forming a two-side conducting circuit by PI etching is adopted, so that the adverse phenomena of pulling of a polyimide film, copper scrap residue and the like are avoided.
Drawings
The invention is further illustrated below with reference to the figures and examples.
FIG. 1 is a schematic diagram of a first layer circuit layout of the product of the present invention;
FIG. 2 is a schematic diagram of a second layer circuit design of the product of the present invention;
FIG. 3 is a schematic diagram showing the effect of the overlapping of the circuits on both sides of the product of the present invention; (ii) a
FIG. 4 is a schematic cross-sectional view of step 2 of the present invention;
FIG. 5 is a schematic cross-sectional view of step 3 of the present invention;
FIG. 6 is a schematic cross-sectional view of step 4 of the present invention;
FIG. 7 is a schematic cross-sectional view of step 5 of the present invention;
FIG. 8 is a schematic cross-sectional view of step 6 of the present invention;
FIG. 9 is a schematic cross-sectional view of step 7 of the present invention;
FIG. 10 is a schematic perspective view of the present invention at section A of FIG. 3;
FIG. 11 is a schematic perspective view of the present invention at section B of FIG. 3;
FIG. 12 is a schematic perspective view of the present invention at section C of FIG. 3;
FIG. 13 is a schematic view of the product of the present invention after being blanked and formed in step 8;
FIG. 14 is a schematic representation of the anisotropy compensation design of the present invention.
In the figure: 1. a first layer of wiring; 2. a second layer of circuitry; 3. a product outline; 4. electroplating a lead; 5. switching on the PAD; 6. a polyimide film material; 7. a photosensitive material; 8. exposing a mask plate; 9. a non-conductive line; 10. a circuit groove; 11. a nickel-chromium layer; 12. a seed layer; 13. a copper line; .
Detailed Description
Fig. 1 to 14 show a method for forming a double-sided buried circuit, comprising the steps of:
step 1: in the product design stage, the first layer circuit 1 and the second layer circuit 2 on both sides of the product are connected to the electroplating lead 4 outside the product outline 3 to realize the electric function conduction during the copper electroplating, a conduction PAD5 is adopted at the conduction position of the first layer circuit 1 and the second layer circuit 2, the effect that the circuits on both sides of the product are overlapped is shown in FIG. 2, wherein the conduction position of the circuits on both sides adopts the conduction PAD design, and the following steps are described by taking the section A in FIG. 3 as an example;
step 2: laminating a layer of photosensitive material 7 on the upper surface and the lower surface of a layer of ultrathin polyimide film material 6 respectively, wherein the schematic cross-sectional view of the photosensitive material is shown in FIG. 4;
and step 3: in the design stage of the exposure mask plate 8, the anisotropic compensation design is carried out on the edge of the non-conducting circuit 9, the compensation design is not carried out on the edge of the conducting PAD5, the photosensitive materials 7 on the upper surface and the lower surface are simultaneously subjected to exposure treatment, the circuit pattern on the mask plate 8 is transferred onto the photosensitive material 7, development is carried out after exposure is finished, the photosensitive material 7 which is subjected to decomposition reaction is removed by using a developing solution, the polyimide film material 6 is exposed, and the schematic cross-sectional view of the polyimide film material is shown in FIG. 5;
and 4, step 4: performing PI etching on the upper surface and the lower surface of the polyimide film material 6, forming a circuit groove 10 on the surface of the polyimide film material 6, and realizing etching conduction of two surfaces of the polyimide film material 6 only at the conducting PAD5, wherein the cross section is schematically shown in FIG. 6;
and 5: sputtering nickel-chromium layers 11 on the upper surface and the lower surface of the polyimide film material 6, and forming a conductive seed layer 12 on the bottom and the side wall of the circuit groove 10 of the polyimide film material 6, wherein due to the difference between the material characteristics of the photosensitive material and the polyimide film material, the sputtered nickel-chromium particle part can enter the surface layer of the photosensitive material but cannot form a continuous nickel-chromium seed layer, and the cross section of the sputtered nickel-chromium particle part is schematically shown in fig. 7;
step 6: stripping the two layers of photosensitive materials 7 on the upper surface and the lower surface by using an alkaline stripping solution, synchronously removing the nickel-chromium seed layers in the surface layers of the two layers of photosensitive materials 7, and only the bottom and the side wall of the circuit groove 10 of the product are provided with the nickel-chromium seed layers 12, wherein the cross section of the nickel-chromium seed layers is schematically shown in fig. 8;
and 7: electroplating copper on the product by utilizing the area of the electroplating lead 4, electroplating copper on the circuit and the area of the electroplating lead to form a copper circuit 13, wherein the copper plating height is flush with the surface of the polyimide film material 6 to form an embedded copper circuit structure with the exposed surface of the copper circuit, and the stacking schematic diagram of the product after copper plating is shown in FIG. 9;
and 8: and (3) blanking and forming the product, and punching the electroplating lead 4 outside the product outline 3 to form the final product of the product.
And 3, performing anisotropy compensation on the edge of the non-conducting circuit 9 to design the edge into a sawtooth shape.
In the step 4, the acidic PI etching solution is used for PI etching, the groove 10 with the shape of the inverted trapezoidal section line is formed on the surface of the polyimide film material 6, and due to the effect of slowing down the etching reaction rate of the anisotropic compensation existing at the edge of the non-conductive line 9, the etching conduction of the two sides of the polyimide film material 6 is realized only at the conductive PAD5, and the two sides of the line groove 10 at the non-conductive line 9 are not conductive.
The invention can be applied to all flexible circuit board products which contain FPC and COF products and use polyimide films as circuit bearing materials, and the cross section stacking of the double-sided copper circuit embedded polyimide film material is more beneficial to the control of the printing overflow precision of the product ink and can realize the development of the product towards lightness and thinness. The embedded line cross-section stacking can conveniently control the depth of the formed non-conductive inverted trapezoidal line groove to realize the conduction of a product double-sided line by changing the process conditions of anisotropic compensation design of a non-conductive line, control of the carrying speed of PI etching and the like according to the difference of product thickness requirements, can solve the requirement of copper thickness difference, realize the formation of a thick copper line and improve the heat dissipation performance of the product, and the anisotropic compensation design of the edge of the non-conductive line in the design stage of an exposure mask plate is not limited to the design of a sawtooth shape, and the design of anisotropic compensation schemes of other shapes and sizes can be carried out according to the size of a line interval to control the PI etching rate so as to control the depth of an etched groove, wherein the design of the anisotropic compensation schemes of other shapes and sizes can be carried out according to the size of the line interval, and the embedded line cross-section stacking structure comprises 5 shapes exemplified in figure 14.
Claims (3)
1. A method for forming a double-sided embedded circuit is characterized by comprising the following steps:
step 1: in the product design stage, a first layer of circuit (1) and a second layer of circuit (2) on two sides of a product are connected to an electroplating lead (4) outside a product outline line (3) to realize electric function conduction during copper electroplating, and a conducting PAD (PAD) (5) is adopted at the conducting position of the first layer of circuit (1) and the second layer of circuit (2);
and 2, step: respectively pressing a layer of photosensitive material (7) on the upper surface and the lower surface of a layer of ultrathin polyimide film material (6);
and 3, step 3: in the design stage of an exposure mask plate (8), performing anisotropic compensation design on the edge of a non-conducting circuit (9), performing no compensation design on the edge of a conducting PAD (5), simultaneously performing exposure treatment on photosensitive materials (7) on the upper surface and the lower surface, transferring a circuit pattern on the mask plate (8) onto the photosensitive materials (7), developing after exposure is completed, removing the photosensitive materials (7) which are subjected to decomposition reaction by using a developing solution, and exposing a polyimide film material (6);
and 4, step 4: PI etching is carried out on the upper surface and the lower surface of the polyimide film material (6), a circuit groove (10) is formed on the surface of the polyimide film material (6), and etching conduction of the two surfaces of the polyimide film material (6) is realized only at the position of conducting the PAD (5);
and 5: sputtering nickel-chromium layers (11) on the upper surface and the lower surface of a polyimide film material (6), forming a conductive seed layer (12) on the bottom and the side wall of a circuit groove (10) of the polyimide film material (6), wherein due to the difference between the material characteristics of a photosensitive material and the polyimide film material, sputtered nickel-chromium particle parts can enter the surface layer of the photosensitive material but cannot form a continuous nickel-chromium seed layer;
step 6: stripping the two layers of photosensitive materials (7) on the upper surface and the lower surface by using an alkaline stripping solution, synchronously removing the nickel-chromium seed layers in the surface layers of the two photosensitive materials (7), and only arranging the nickel-chromium seed layers (12) at the bottom and on the side wall of the circuit groove (10) of the product;
and 7: electroplating copper on the product by utilizing the electroplating lead (4) area, electroplating copper on the circuit and the electroplating lead area to form a copper circuit (13), wherein the copper plating height is flush with the surface of the polyimide film material (6) to form an embedded copper circuit structure with the exposed surface of the copper circuit;
and 8: and (3) blanking and forming the product, and punching the electroplating lead (4) outside the product outline (3) to form the final product of the product.
2. The method of claim 1, wherein: and 3, performing anisotropic compensation on the edge of the non-conducting circuit (9) to design the edge into a sawtooth shape.
3. The method of claim 1, wherein: and 4, PI etching is carried out by using an acidic PI etching liquid medicine, a groove (10) with an inverted trapezoidal section line shape is formed on the surface of the polyimide film material (6), due to the effect of slowing down the etching reaction rate of the anisotropy compensation existing at the edge of the non-conductive line (9), the etching conduction of the two sides of the polyimide film material (6) is realized only at the conductive PAD (5), and the two sides of the line groove (10) at the non-conductive line (9) are not conducted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210317745.5A CN114650663B (en) | 2022-03-29 | 2022-03-29 | Forming method of double-sided embedded circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210317745.5A CN114650663B (en) | 2022-03-29 | 2022-03-29 | Forming method of double-sided embedded circuit |
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| Publication Number | Publication Date |
|---|---|
| CN114650663A true CN114650663A (en) | 2022-06-21 |
| CN114650663B CN114650663B (en) | 2024-05-17 |
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| CN202210317745.5A Active CN114650663B (en) | 2022-03-29 | 2022-03-29 | Forming method of double-sided embedded circuit |
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2022
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| JP2004281532A (en) * | 2003-03-13 | 2004-10-07 | Furukawa Electric Co Ltd:The | Method of manufacturing double-sided wiring board |
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| Publication number | Publication date |
|---|---|
| CN114650663B (en) | 2024-05-17 |
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