CN114514603B - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN114514603B CN114514603B CN201980101203.0A CN201980101203A CN114514603B CN 114514603 B CN114514603 B CN 114514603B CN 201980101203 A CN201980101203 A CN 201980101203A CN 114514603 B CN114514603 B CN 114514603B
- Authority
- CN
- China
- Prior art keywords
- power
- power supply
- line
- semiconductor device
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/427—Power or ground buses
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/481—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes on the rear surfaces of the wafers or substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
- H10D84/968—Macro-architecture
- H10D84/974—Layout specifications, i.e. inner core regions
- H10D84/981—Power supply lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
- H10D84/992—Noise prevention, e.g. preventing crosstalk
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2019/040259 WO2021070367A1 (ja) | 2019-10-11 | 2019-10-11 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114514603A CN114514603A (zh) | 2022-05-17 |
| CN114514603B true CN114514603B (zh) | 2024-10-29 |
Family
ID=75438139
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201980101203.0A Active CN114514603B (zh) | 2019-10-11 | 2019-10-11 | 半导体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US12154904B2 (https=) |
| JP (1) | JP7315016B2 (https=) |
| CN (1) | CN114514603B (https=) |
| WO (1) | WO2021070367A1 (https=) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023112682A1 (ja) * | 2021-12-17 | 2023-06-22 | 株式会社ソシオネクスト | 半導体集積回路装置 |
| JPWO2023127385A1 (https=) * | 2021-12-27 | 2023-07-06 | ||
| WO2023166674A1 (ja) * | 2022-03-03 | 2023-09-07 | 株式会社ソシオネクスト | 半導体集積回路装置 |
| US12402293B2 (en) | 2022-09-23 | 2025-08-26 | Apple Inc. | Stacked SRAM cell architecture |
| US12482750B2 (en) | 2022-10-17 | 2025-11-25 | International Business Machines Corporation | Power distribution network with backside power rail |
| WO2024162070A1 (ja) * | 2023-01-31 | 2024-08-08 | 株式会社ソシオネクスト | 半導体集積回路装置 |
| WO2024166906A1 (ja) * | 2023-02-08 | 2024-08-15 | 株式会社ソシオネクスト | 半導体集積回路装置 |
| JPWO2024252660A1 (https=) * | 2023-06-09 | 2024-12-12 | ||
| WO2025009171A1 (ja) * | 2023-07-06 | 2025-01-09 | 株式会社ソシオネクスト | 半導体集積回路装置 |
| WO2026033396A1 (ja) * | 2024-08-08 | 2026-02-12 | 株式会社半導体エネルギー研究所 | 半導体装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009124667A (ja) * | 2007-01-25 | 2009-06-04 | Panasonic Corp | 双方向スイッチ及びその駆動方法 |
| CN104752337A (zh) * | 2013-12-30 | 2015-07-01 | 国际商业机器公司 | 半导体结构及其形成方法 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5326689A (en) * | 1976-08-25 | 1978-03-11 | Hitachi Ltd | Semiconductor integrated circuit unit |
| JP2972425B2 (ja) * | 1992-01-30 | 1999-11-08 | 日本電気アイシーマイコンシステム株式会社 | 半導体集積回路 |
| JPH11102910A (ja) * | 1997-09-29 | 1999-04-13 | Hitachi Ltd | 半導体集積回路 |
| JP2009177200A (ja) * | 1998-05-01 | 2009-08-06 | Sony Corp | 半導体記憶装置 |
| JP2009302198A (ja) | 2008-06-11 | 2009-12-24 | Elpida Memory Inc | 半導体チップ、半導体チップ群および半導体装置 |
| JP2012044042A (ja) | 2010-08-20 | 2012-03-01 | Kawasaki Microelectronics Inc | 半導体集積回路および半導体集積回路装置 |
| US8530273B2 (en) | 2010-09-29 | 2013-09-10 | Guardian Industries Corp. | Method of making oxide thin film transistor array |
| DE102013207324A1 (de) | 2012-05-11 | 2013-11-14 | Semiconductor Energy Laboratory Co., Ltd. | Halbleitervorrichtung und elektronisches Gerät |
| JP2014165358A (ja) * | 2013-02-26 | 2014-09-08 | Panasonic Corp | 半導体装置及びその製造方法 |
| EP2884542A3 (en) | 2013-12-10 | 2015-09-02 | IMEC vzw | Integrated circuit device with power gating switch in back end of line |
| US9754923B1 (en) | 2016-05-09 | 2017-09-05 | Qualcomm Incorporated | Power gate placement techniques in three-dimensional (3D) integrated circuits (ICs) (3DICs) |
| EP3324436B1 (en) | 2016-11-21 | 2020-08-05 | IMEC vzw | An integrated circuit chip with power delivery network on the backside of the chip |
| US10950546B1 (en) | 2019-09-17 | 2021-03-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device including back side power supply circuit |
| US11004789B2 (en) | 2019-09-30 | 2021-05-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device including back side power supply circuit |
-
2019
- 2019-10-11 JP JP2021551078A patent/JP7315016B2/ja active Active
- 2019-10-11 CN CN201980101203.0A patent/CN114514603B/zh active Active
- 2019-10-11 WO PCT/JP2019/040259 patent/WO2021070367A1/ja not_active Ceased
-
2022
- 2022-04-06 US US17/714,683 patent/US12154904B2/en active Active
-
2024
- 2024-10-28 US US18/929,016 patent/US20250056879A1/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009124667A (ja) * | 2007-01-25 | 2009-06-04 | Panasonic Corp | 双方向スイッチ及びその駆動方法 |
| CN104752337A (zh) * | 2013-12-30 | 2015-07-01 | 国际商业机器公司 | 半导体结构及其形成方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP7315016B2 (ja) | 2023-07-26 |
| US20250056879A1 (en) | 2025-02-13 |
| JPWO2021070367A1 (https=) | 2021-04-15 |
| US12154904B2 (en) | 2024-11-26 |
| WO2021070367A1 (ja) | 2021-04-15 |
| US20220231054A1 (en) | 2022-07-21 |
| CN114514603A (zh) | 2022-05-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |