CN114334945A - 一种封装结构及制作方法 - Google Patents
一种封装结构及制作方法 Download PDFInfo
- Publication number
- CN114334945A CN114334945A CN202111452217.2A CN202111452217A CN114334945A CN 114334945 A CN114334945 A CN 114334945A CN 202111452217 A CN202111452217 A CN 202111452217A CN 114334945 A CN114334945 A CN 114334945A
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- package structure
- heat conducting
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 238000004806 packaging method and process Methods 0.000 title abstract description 19
- 239000000758 substrate Substances 0.000 claims description 134
- 239000000463 material Substances 0.000 claims description 30
- 239000002184 metal Substances 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 11
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 238000000465 moulding Methods 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 230000017525 heat dissipation Effects 0.000 description 6
- 230000015654 memory Effects 0.000 description 5
- 150000001875 compounds Chemical class 0.000 description 4
- 238000012536 packaging technology Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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Abstract
本发明提供一种封装结构及制作方法,所述封装结构包括:第一芯片,所述第一芯片包括相背的第一连接表面和第一导热表面;第二芯片,所述第二芯片设置于所述第一连接表面的一侧,且与所述第一芯片电性连接,所述第二芯片远离所述第一芯片的一侧包括第二导热表面;以及第一导热件和第二导热件,所述第一导热件和所述第一导热表面连接,所述第二导热件和所述第二导热表面连接。其中,第一芯片的第一导热表面和第一导热件之间形成第一导热通道,第二芯片的第二导热表面和第二导热件之间形成第二导热通道,第一导热通道和第二导热通道加快热量传导,因此,可显著提高封装结构的散热效率。
Description
技术领域
本发明属于半导体封装技术领域,特别关于一种封装结构及制作方法。
背景技术
基于CoWoS(Chip-on-Wafer-on-Substrate,晶圆基底封装)的2.5D封装技术,是把芯片封装到硅载片(Silicon interposer)上,并使用硅载片上的高密度走线进行互联,进一步与封装载板连接。CoWoS主要针对高性能计算(High Performance Computing,HPC)市场,例如,具备HBM(High-Bandwidth Memory)记忆体的高阶产品。目前,上述硅载片还可以被具有RDL有机转接器(organic interposer with RDL)替代。
另外,基于EMIB(Embedded Multi-Die Interconnect Bridge)嵌入式多芯片互连桥先进封装技术,与硅中介层(Silicon interposer)的2.5D封装类似,通过在封装基板内埋入用来连接裸晶的硅桥(Silicon Bridge),进行局部高密度互连。EMIB技术可以针对独立显卡和高带宽内存芯片之间的封装,提供高密度互联。
上述先进封装技术应用于高带宽内存的有源器件封装时,1)转接器和硅桥的存在限制了I/O速度并导致更高的功耗;2)2.5D封装技术中TSV工艺造成成本高;RDL重布线受布线密度限制大;硅桥工艺组装工艺复杂;3)在有源器件上通过TSV进行3D封装,封装工艺成本高,且存在散热问题。
发明内容
本发明解决的问题是如何提高3D封装的芯片之间的散热能力。
为解决上述问题,本发明技术方案提供了一种封装结构,所述封装结构包括:第一芯片,所述第一芯片包括相背的第一连接表面和第一导热表面;第二芯片,所述第二芯片设置于所述第一连接表面的一侧,且与所述第一芯片电性连接,所述第二芯片远离所述第一芯片的一侧包括第二导热表面;以及第一导热件和第二导热件,所述第一导热件和所述第一导热表面连接,所述第二导热件和所述第二导热表面连接。
作为可选的技术方案,所述封装结构还包括:第一基板,所述第一基板设置空腔,所述第一芯片放置于所述空腔中;其中,所述第一芯片和所述空腔之间的缝隙中填充有结合材料。
作为可选的技术方案,所述空腔为贯通所述第一基板的贯孔,所述第一导热表面自所述贯孔中露出。
作为可选的技术方案,所述第一导热件设置于所述第一基板远离所述第二芯片的一侧,且所述第一导热件和自所述贯孔中露出的所述第一导热表面连接。
作为可选的技术方案,所述封装结构还包括:第二基板,所述第二基板设置于所述第一基板远离所述第二芯片的一侧,所述第二基板和所述第一基板电性连接;所述第一导热件包括导热背板和自所述导热背板上伸出的延伸部;其中,所述第二基板对于所述延伸部设置缺口,所述延伸部插入所述缺口中与所述第一导热表面连接,所述第二基板夹设于所述第一基板和所述导热背板之间。
作为可选的技术方案,所述空腔为未贯通所述第一基板的盲孔,所述第一导热表面和所述盲孔的底部连接。
作为可选的技术方案,所述第一导热件设置于所述盲孔的底部外侧,且和所述盲孔的底部连接。
作为可选的技术方案,所述第二芯片的尺寸大于所述第一芯片尺寸,所述第二芯片面对所述第一基板的第二连接表面上伸出金属凸起,所述金属凸起和所述第一基板上对应的第一焊盘电性连接。
作为可选的技术方案,所述封装结构还包括转接器,所述转接器电性连接所述第一芯片和所述第一基板。
作为可选的技术方案,所述第二导热件的部分导热区域覆盖所述转接器远离所述第一基板的一侧。
作为可选的技术方案,所述第二芯片朝向所述第一芯片一侧包括互联结构层,所述互联结构层和所述第一芯片电性连接,且所述互联结构层和所述第一基板电性连接。
作为可选的技术方案,所述第一芯片还包括和所述第一导热表面相背的第一连接表面,所述第一连接表面突出或者齐平于所述第一基板的第三连接表面,所述第一连接表面面对所述第三连接表面。
本发明还提供一种封装结构的制作方法,所述制作方法包括:提供电性连接的第一芯片和第二芯片,所述第一芯片包括第一导热表面,所述第一导热表面远离所述第二芯片,所述第二芯片包括第二导热表面,所述第二导热表面远离所述第一芯片;以及于所述第一导热表面上连接第一导热件;于所述第二导热表面上连接第二导热件。
作为可选的技术方案,于所述第一导热表面上连接第一导热件的步骤之前还包括:
提供具有空腔的第一基板,所述空腔为贯孔;放置所述第一芯片至所述贯孔中,所述第一导热表面自所述贯孔中露出;以及填充结合材料至所述第一芯片和所述空腔之间缝隙中,固定所述第一芯片与所述第一基板。
作为可选的技术方案,于所述第一导热表面上连接第一导热件的步骤还包括:
提供具有空腔的第一基板,所述空腔为盲孔,所述盲孔的底部设有所述第一导热件;以及放置所述第一芯片至所述盲孔中,并连接所述第一导热件至所述第一导热表面上。
与现有技术相比,本发明提供一种封装结构及制作方法,封装结构包括相互电性连接的第一芯片和第二芯片,第一芯片包括远离第二芯片的第一导热表面,第二芯片包括远离第一芯片的第二导热表面,在相互远离的第一导热面和第二导热面上分别设置第一导热件和第二导热件,将第一芯片和第二芯片工作产生的热量分别导出,即,第一芯片的第一导热表面和第一导热件之间形成第一导热通道,第二芯片的第二导热表面和第二导热件之间形成第二导热通道,第一导热通道和第二导热通道加快热量传导,因此,可显著提高封装结构的散热效率。
以下结合附图和具体实施例对本发明进行详细描述,但不作为对本发明的限定。
附图说明
为了更清楚地说明本发明具体实施方式或现有技术中的技术方案,下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图是本发明的一些实施方式,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明第一实施例中提供的封装结构的剖面示意图。
图2为图1中封装结构的制作过程的剖面示意图。
图3为本发明第二实施例中提供的封装结构的剖面示意图。
图4为本发明第三实施例中提供的封装结构的剖面示意图。
图5为本发明第四实施例中提供的封装结构的剖面示意图。
图6为本发明第五实施例中提供的封装结构的剖面示意图。
图7为本发明第六实施例中提供的封装结构的剖面示意图。
图8为本发明第七实施例中提供的封装结构的剖面示意图。
图9为本发明提供的封装结构的制作方法的流程图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,下面结合实施例及附图,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅用以解释本发明,并不用于限定本发明。
在本发明的描述中,需要说明的是,术语“中心”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
本发明的目的之一在于提供一种封装结构,其包括第一芯片,第一芯片包括相背的第一连接表面和第一导热表面;第二芯片,第二芯片设置于第一连接表面的一侧,且与第一芯片电性连接,第二芯片远离所述第一芯片的一侧包括第二导热表面;第一导热表面上设置第一导热件,第二导热表面上设置第二导热件,提高封装结构的导热性能。
本实施例中,第一芯片、第二芯片例如分别为HBM、HMC(Hybrid Memory Cube)、CPU、GPU等高功耗元件,其工作过程中存在明显的导热需求,由于本发明提供的封装结构中第一芯片和第二芯片垂直互联,且在相互远离的第一导热面和第二导热面上分别设置第一导热件和第二导热件,将第一芯片和第二芯片工作产生的热量分别导出,即,第一芯片的第一导热表面和第一导热件之间形成第一导热通道,第二芯片的第二导热表面和第二导热件之间形成第二导热通道,第一导热通道和第二导热通道加快热量传导,因此,可显著提高封装结构的散热效率。
如图1和图2所示,本发明第一实施例中提供一种封装结构100,其包括第一芯片10和第二芯片20,第二芯片20设置于第一芯片10的上方且和第一芯片10电性连接;第一芯片10包括远离第二芯片20的第一导热表面11,第二芯片20包括远离第一芯片10的第二导热表面21;以及,第一导热件30和第二导热件40,第一导热件30和第一导热表面11连接;第二导热件40和第二导热表面21连接。
在一较佳的实施方式中,第一导热件30例如为导热背板,导热背板和第一导热表面11之间通过导热胶连接;第二导热件40例如导热翅片,导热翅片和第二导热表面21之间也通过导热胶连接。其中,导热背板和导热翅片优选为导热金属材料。
如图1和图2所示,封装结构100还包括第一基板50,其具有空腔52,第一芯片10放置于空腔52中,且,第一芯片10和空腔52之间的缝隙53中填充有结合材料80。结合材料80例如是粘性材料,粘性材料将第一芯片10固定于第一基板50的空腔52中。
本实施例中,空腔52为贯通第一基板50的贯孔,其中,第一芯片10的第一导热表面11自贯孔中露出,并与第一导热件30相互连接。
参照图2可知,第一芯片10和第二芯片20预先键合形成单独的芯片单元组件,再将芯片单元组件与具有空腔52的第一基板50进行对位装配后,通过结合材料80将第一芯片10固定在第一基板50的空腔52中。
需要说明的是,本实施例中,第一芯片10的厚度大于第一基板50的厚度,使得第一芯片10的第一连接表面12突出于第一基板50的第三连接表面51,其中,第一连接表面12和第一导热表面11相背,第三连接表面51和第二连接表面22相对。
在本发明其他实施例中,第一芯片10的第一连接表面12与第一基板50的第三连接表面51也可以是相互齐平。
继续参照图1和图2,第二芯片20的尺寸大于第一芯片10的尺寸,第二芯片20的部分区域突出于第一芯片10的边缘,其中,第二芯片20面对第一基板50的第二连接表面22上伸出金属凸起23和第一基板50上对应的第一焊盘54电性连接,第二连接表面22和第一导热表面21相背。其中,电性连接的方式包括但不限于锡金键合。
此外,封装结构100中还包括转接器70,其设置于第一芯片10的第一连接表面12一侧,且转接器70同时电性连接第一芯片10的第一连接表面12上的金属凸起13和第一基板50的第三连接表面51上的第二焊盘55。其中,转接器70用于朝向第一芯片10供电,以及读取第一芯片10输出的部分电信号传递至第一基板10,再通过第一基板10输出。
继续参照图1和图2,封装结构100中还包括第二基板60,第二基板60例如为PCB电路板,PCB电路板包括第四焊盘(未图示),第四焊盘与第一基板50背侧的第三焊盘56电性连接,使得第二基板60和第一基板50之间电性连接。
进一步,第一导热件30包括导热背板和自导热背板上伸出的延伸部;对应于延伸部,第二基板60上开设有缺口61,延伸部插入缺口61中并与第一基板50的空腔52中露出的第一导热表面11连接。
另外,导热背板位于第二基板60的下方,导热背板与第二基板60结合,还可将热量通过第二基板60内的高导热系数的材料导出,即,第一导热件30的部分热量还可以通过第二基板60进行导出,进一步的提升散热效率。
本发明提供的上述封装结构100中,垂直互联的第一芯片10和第二芯片20各自相背离的导热表面上均形成了导热通道,因此,可显著提高封装结构100的散热效率。
如图3所示,本发明第二实施例中还提供一种封装结构200,其与封装结构100的区别在于,封装结构200中的第二芯片220单侧和第一基板250电性连接。
另外,为了简化视图,图2中所示的封装结构200省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
本实施例中,第一芯片210和第二芯片220预先键合形成的芯片单元组件,与第一基板250对位后,第一芯片210通过结合材料280固定于第一基板250的空腔例如:贯孔中。第一芯片210的第一连接表面212例如突出于第一基板250的第三连接表面251。第一芯片210的第一导热表面211连接第一导热件;第二芯片220的第二导热表面221连接第二导热件。
第二芯片220的尺寸大于第一芯片210的尺寸,其中,第二芯片220的单侧突出于第一芯片210的边缘。第二芯片220的部分第二连接表面222面对第一基板250的部分第三连接表面251,第二连接表面222上的金属凸起223和第三连接表面251上的第一焊盘254电性连接。金属凸起223和第一焊盘254电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片220电性连接于其下方的第一芯片210和第一基板250,例如,第一芯片210为HBM,第二芯片220为CPU。其中,可以通过CPU朝向HBM供电,也可以藉由在第一基板250上再布线,通过再布线的第一基板250向HBM供电。
如图4所示,本发明第三实施例中还提供一种封装结构300,其与封装结构100的区别在于,封装结构300中的第二芯片320的两侧分别和第一基板350电性连接。
另外,为了简化视图,图4中所示的封装结构300省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
本实施例中,第一芯片310和第二芯片320预先键合形成的芯片单元组件,与第一基板350对位后,第一芯片310通过结合材料380固定于第一基板350的空腔例如:贯孔中。第一芯片310的第一连接表面312例如突出于第一基板350的第三连接表面351。第一芯片310的第一导热表面311连接第一导热件;第二芯片320的第二导热表面321连接第二导热件。
第二芯片320的尺寸大于第一芯片310的尺寸,其中,第二芯片320的两侧分别突出于第一芯片310两侧的边缘。第二芯片320的部分第二连接表面322面对第一基板350的部分第三连接表面351,第二连接表面322上的金属凸起323和第三连接表面351上对应的第一焊盘354电性连接。金属凸起323和第一焊盘354电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片320电性连接于其下方的第一芯片310和第一基板350,例如,第一芯片310为HBM,第二芯片320为CPU。
如图5所示,本发明第四实施例中还提供一种封装结构400,其与封装结构100的区别在于,封装结构400中的第二芯片420通过再布线层401分别和第一基板450和第一芯片410电性连接。
另外,为了简化视图,图5中所示的封装结构400省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
本实施例中,第二芯片420包括围绕其的塑封层402,第二芯片420的有源层自塑封层402中露出并与塑封层402大致齐平,再布线层401形成塑封层402的一侧且与有源层电性连接,重构为第二芯片组件。
第一芯片410和第二芯片组件的再布线层401上的第一导电凸起4011预先键合形成的芯片单元组件后,再与第一基板450对位后,第一芯片410通过结合材料480固定于第一基板450的空腔例如:贯孔中。第一芯片410的第一连接表面412例如突出于第一基板450的第三连接表面451。第一芯片410的第一导热表面411连接第一导热件。
重构的第二芯片组件的尺寸大于第一芯片410的尺寸,其中,第二芯片组件的重布线层401的两侧分别突出于第一芯片410两侧的边缘。重布线层401朝向第一基板450的第三连接表面451突出若干第二导电凸起4012,若干第二导电凸起4012和第三连接表面451上对应的第一焊盘454分别电性连接。第二导电凸起4012和第一焊盘454电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片420通过重布线层401电性连接于其下方的第一芯片410和第一基板450,例如,第一芯片410为HBM,第二芯片420为CPU。
另外,塑封层402中可填充高导热系数的材料,以使塑封层402作为第二芯片420的第二导热表面421上的第二导热件使用。
如图6所示,本发明第五实施例中还提供一种封装结构500,其与封装结构100的区别在于,1)封装结构500中的第二芯片520单侧和第一基板550电性连接;2)第一基板550上空腔501例如是盲孔;3)第一导热表面511可通过盲孔501的底部502进行导热,其中,底部502设有导热金属(cooper coin),导热金属(cooper coin)可视作和封装结构100中的第一导热件30的功能相似。
另外,为了简化视图,图6中所示的封装结构500省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
本实施例中,第一芯片510和第二芯片520预先键合形成的芯片单元组件,与第一基板550对位后,第一芯片510通过结合材料580固定于第一基板550的空腔501例如:盲孔中。其中,第一芯片510的第一导热表面511和底部502之间填充导热结合材料580;第一芯片510的第一连接表面512例如突出于第一基板550的第三连接表面551。第二芯片520的第二导热表面521连接第二导热件。
本实施例中,底部502的材料与第一基板550的其他区域的材料相比,具有更多导热金属,例如布置更多的裸露的铜层,通过裸露的铜层使得第一芯片510内的热量尽可能与外界进行热交换后散热。另外,底部502的外侧同样可以通过粘结材料与第一导热件30(如图1所示)的延伸部相连接。
第二芯片520的尺寸大于第一芯片510的尺寸,其中,第二芯片520的单侧突出于第一芯片510的边缘。第二芯片520的部分第二连接表面522面对第一基板550的部分第三连接表面551,第二连接表面522上的金属凸起523和第三连接表面551上的第一焊盘554电性连接。金属凸起523和第一焊盘554电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片520电性连接于其下方的第一芯片510和第一基板550,例如,第一芯片510为HBM,第二芯片520为CPU。
如图7所示,本发明第六实施例中还提供一种封装结构600,其与封装结构100的区别在于,1)封装结构600中的第二芯片620的双侧和第一基板650电性连接;2)第一基板650上空腔601例如是盲孔;3)第一导热表面611可通过盲孔601的底部602进行导热,其中,底部602设有导热金属(cooper coin),导热金属(cooper coin)可视作和封装结构100中的第一导热件30的功能相似。
另外,为了简化视图,图7中所示的封装结构600省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
本实施例中,第一芯片610和第二芯片620预先键合形成的芯片单元组件,与第一基板650对位后,第一芯片610通过结合材料680固定于第一基板650的空腔601例如:盲孔中。其中,第一芯片610的第一导热表面61和底部602之间填充结合材料680;第一芯片610的第一连接表面612例如突出于第一基板650的第三连接表面651。第二芯片620的第二导热表面621连接第二导热件。
本实施例中,底部602的材料与第一基板650的其他区域的材料相比,具有更多导热金属,例如布置更多的裸露的铜层,通过裸露的铜层使得第一芯片610内的热量尽可能与外界进行热交换后散热。另外,底部602的外侧同样可以通过粘结材料与第一导热件30(如图1所示)的延伸部相连接。
第二芯片620的尺寸大于第一芯片610的尺寸,其中,第二芯片620的两侧突出于第一芯片610两侧的边缘。第二芯片620的部分第二连接表面622面对第一基板650的部分第三连接表面651,第二连接表面622上的金属凸起623和第三连接表面651上的第一焊盘654电性连接。金属凸起623和第一焊盘654电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片620电性连接于其下方的第一芯片610和第一基板650,例如,第一芯片610为HBM,第二芯片620为CPU,通过CPU朝向HBM供电。
如图8所示,本发明第七实施例中还提供一种封装结构700,其与封装结构100的区别在于,1)封装结构700中的第二芯片720通过再布线层703分别和第一基板750和第一芯片710电性连接;2)第一基板750上空腔701例如是盲孔;3)第一芯片710的第一导热表面711可通过盲孔701的底部702进行导热,其中,底部702设有导热金属(cooper coin),导热金属(cooper coin)可视作和封装结构100中的第一导热件30的功能相似。
另外,为了简化视图,图8中所示的封装结构700省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
本实施例中,第二芯片720包括围绕其的塑封层704,第二芯片720的有源层自塑封层704中露出并与塑封层704大致齐平,再布线层703形成塑封层704的一侧且与有源层电性连接,重构为第二芯片组件。
第一芯片710和第二芯片组件的再布线层703上的第一导电凸起7031预先键合形成的芯片单元组件后,再与第一基板750对位后,第一芯片710固定于第一基板750的空腔701例如:盲孔中。其中,第一芯片710的第一导热表面711和底部702之间填充结合材料780;第一芯片710的第一连接表面712例如突出于第一基板750的第三连接表面751。第一芯片710的第一导热表面711连接第一导热件。
本实施例中,底部702的材料与第一基板750的其他区域的材料相比,具有更多导热金属,例如布置更多的裸露的铜层,通过裸露的铜层使得第一芯片710内的热量尽可能与外界进行热交换后散热。另外,底部702的外侧同样可以通过粘结材料与第一导热件30(如图1所示)的延伸部相连接。
重构的第二芯片组件的尺寸大于第一芯片710的尺寸,其中,第二芯片组件的重布线层703的两侧分别突出于第一芯片710两侧的边缘。重布线层703朝向第一基板750的第三连接表面751突出若干第二导电凸起7032,若干第二导电凸起7032和第三连接表面751上对应的第一焊盘754分别电性连接。第二导电凸起7032和第一焊盘754电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片720通过重布线层703电性连接于其下方的第一芯片710和第一基板750,例如,第一芯片710为HBM,第二芯片720为CPU。
另外,塑封层704中可填充高导热系数的材料,以使塑封层704作为第二芯片720的第二导热表面721上的第二导热件使用。
如图9所示,本发明的目的之二在于提供一种封装结构的制作方法1000,其包括:
提供电性连接的第一芯片和第二芯片,所述第一芯片包括第一导热表面,所述第一导热表面远离所述第二芯片,所述第二芯片包括第二导热表面,所述第二导热表面远离所述第一芯片;以及
于所述第一导热表面上连接第一导热件;
于所述第二导热表面上连接第二导热件。
在一较佳的实施方式中,于所述第一导热表面上连接第一导热件的步骤之前还包括:
提供具有空腔的第一基板,所述空腔为贯孔;放置所述第一芯片至所述贯孔中,所述第一导热表面自所述贯孔中露出;以及填充结合材料至所述第一芯片和所述空腔之间缝隙中,固定所述第一芯片与所述第一基板。
在一较佳的实施方式中,于所述第一导热表面上连接第一导热件的步骤还包括:
提供具有空腔的第一基板,所述空腔为盲孔,所述盲孔的底部设有所述第一导热件;以及放置所述第一芯片至所述盲孔中,并连接所述第一导热件至所述第一导热表面上。
结合图1、图2和图9,以封装结构100详细说明上述制作方法1000的过程。
首先,键合第一芯片10和第二芯片20,第一芯片10的第一导热表面11和第二芯片20的第二导热表面21相互背离;其次,提供第一基板50,于第一基板50上制作空腔52;接着,将相互键合连接的第一芯片10和第二芯片20中的第一芯片10放置于空腔52中,当空腔52为贯孔时,第一导热表面11自贯孔中露出;然后,填充结合材料80至第一芯片10和空腔52中的缝隙53中,固定第一芯片10至第一基板50的空腔52中;然后,键合转接器70至第一芯片10的第一连接表面12,以及,第一基板50的第三连接表面51上;然后,提供第二基板60,键合第二基板60至第一基板50的下方,第二基板60的缺口61和空腔52相互连通;然后,将第一导热件30的延伸部插入并穿过缺口61与第一导热表面11连接;最后,将第二导热件40连接至第二导热表面21上。
其中,第一导热件30和第二导热件40连接顺序可依据实际需要调换。
另外,在本发明其他实施例中,首先,将第一芯片放置于第一基板的空腔中;其次,键合第二芯片于第一芯片的上方或者下方;再依序固定第一芯片、键合第一基板和第二基板,以及连接第一导热件和第二导热件。
本发明提供一种封装结构及制作方法,封装结构包括相互电性连接的第一芯片和第二芯片,第一芯片包括远离第二芯片的第一导热表面,第二芯片包括远离第一芯片的第二导热表面,在相互远离的第一导热面和第二导热面上分别设置第一导热件和第二导热件,将第一芯片和第二芯片工作产生的热量分别导出,即,第一芯片的第一导热表面和第一导热件之间形成第一导热通道,第二芯片的第二导热表面和第二导热件之间形成第二导热通道,第一导热通道和第二导热通道加快热量传导,因此,可显著提高封装结构的散热效率。
本发明已由上述相关实施例加以描述,然而上述实施例仅为实施本发明的范例。此外,上面所描述的本发明不同实施方式中所涉及的技术特征只要彼此之间未构成冲突就可以相互结合。必需指出的是,本发明还可有其他多种实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。
Claims (15)
1.一种封装结构,其特征在于,所述封装结构包括:
第一芯片,所述第一芯片包括相背的第一连接表面和第一导热表面;
第二芯片,所述第二芯片设置于所述第一连接表面的一侧,且与所述第一芯片电性连接,所述第二芯片远离所述第一芯片的一侧包括第二导热表面;以及
第一导热件和第二导热件,所述第一导热件和所述第一导热表面连接,所述第二导热件和所述第二导热表面连接。
2.根据权利要求1所述的封装结构,其特征在于,所述封装结构还包括:第一基板,所述第一基板设置空腔,所述第一芯片放置于所述空腔中;其中,所述第一芯片和所述空腔之间的缝隙中填充有结合材料。
3.根据权利要求2所述的封装结构,其特征在于,所述空腔为贯通所述第一基板的贯孔,所述第一导热表面自所述贯孔中露出。
4.根据权利要求3所述的封装结构,其特征在于,所述第一导热件设置于所述第一基板远离所述第二芯片的一侧,且所述第一导热件和自所述贯孔中露出的所述第一导热表面连接。
5.根据权利要求4所述的封装结构,其特征在于,所述封装结构还包括:
第二基板,所述第二基板设置于所述第一基板远离所述第二芯片的一侧,所述第二基板和所述第一基板电性连接;
所述第一导热件包括导热背板和自所述导热背板上伸出的延伸部;
其中,所述第二基板对于所述延伸部设置缺口,所述延伸部插入所述缺口中与所述第一导热表面连接,所述第二基板夹设于所述第一基板和所述导热背板之间。
6.根据权利要求2所述的封装结构,其特征在于,所述空腔为未贯通所述第一基板的盲孔,所述第一导热表面和所述盲孔的底部连接。
7.根据权利要求6所述的封装结构,其特征在于,所述第一导热件设置于所述盲孔的底部外侧,且和所述盲孔的底部连接。
8.根据权利要求2所述的封装结构,其特征在于,所述第二芯片的尺寸大于所述第一芯片尺寸,所述第二芯片面对所述第一基板的第二连接表面上伸出金属凸起,所述金属凸起和所述第一基板上对应的第一焊盘电性连接。
9.根据权利要求2所述的封装结构,其特征在于,所述封装结构还包括转接器,所述转接器电性连接所述第一芯片和所述第一基板。
10.根据权利要求9所述的封装结构,其特征在于,所述第二导热件的部分导热区域覆盖所述转接器远离所述第一基板的一侧。
11.根据权利要求2所述的封装结构,其特征在于,所述第二芯片朝向所述第一芯片一侧包括互联结构层,所述互联结构层和所述第一芯片电性连接,且所述互联结构层和所述第一基板电性连接。
12.根据权利要求2所述的封装结构,其特征在于,所述第一芯片还包括和所述第一导热表面相背的第一连接表面,所述第一连接表面突出或者齐平于所述第一基板的第三连接表面。
13.一种封装结构的制作方法,其特征在于,所述制作方法包括:
提供电性连接的第一芯片和第二芯片,所述第一芯片包括第一导热表面,所述第一导热表面远离所述第二芯片,所述第二芯片包括第二导热表面,所述第二导热表面远离所述第一芯片;以及
于所述第一导热表面上连接第一导热件;
于所述第二导热表面上连接第二导热件。
14.根据权利要求13所述的制作方法,其特征在于,于所述第一导热表面上连接第一导热件的步骤之前还包括:
提供具有空腔的第一基板,所述空腔为贯孔;
放置所述第一芯片至所述贯孔中,所述第一导热表面自所述贯孔中露出;以及
填充结合材料至所述第一芯片和所述空腔之间缝隙中,固定所述第一芯片与所述第一基板。
15.根据权利要求13所述的制作方法,其特征在于,于所述第一导热表面上连接第一导热件的步骤还包括:
提供具有空腔的第一基板,所述空腔为盲孔,所述盲孔的底部设有所述第一导热件;以及
放置所述第一芯片至所述盲孔中,并连接所述第一导热件至所述第一导热表面上。
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