CN114007345A

CN114007345A - Preparation method of circuit board

Info

Publication number: CN114007345A
Application number: CN202111111909.0A
Authority: CN
Inventors: 陈健
Original assignee: Hong Sheng Precision Electronics Yantai Co ltd
Current assignee: Hong Sheng Precision Electronics Yantai Co ltd
Priority date: 2021-09-18
Filing date: 2021-09-18
Publication date: 2022-02-01

Abstract

The application provides a preparation method of a circuit board, which comprises the following steps: providing a multilayer circuit substrate, wherein the multilayer circuit substrate is provided with a through hole; forming a first copper plating layer and a second copper plating layer on the surface of the multilayer circuit substrate and the inner wall of the through hole respectively, wherein the through hole with the second through plating layer is used for forming a through hole; filling an insulating material in the plated through hole, and baking the insulating material to form an insulator to obtain an intermediate; placing the intermediate body in etching liquid medicine, and enabling the etching liquid medicine to thin the first copper plating layer; removing the insulator; and etching the thinned first copper-plated layer into an outer layer circuit, thereby obtaining the circuit board. Through in this application set up the insulator in the plating through-hole, avoid the contact of second copper plate layer and liquid medicine and etch the second copper plate layer.

Description

Preparation method of circuit board

Technical Field

The application relates to the technical field of circuit board production, in particular to a preparation method of a circuit board.

Background

In the manufacturing process, usually, a copper Plating layer is formed on the surface of the substrate and in the Through Hole formed in the substrate by means of copper electroplating, and the Through Hole with the copper Plating layer is a plated Through Hole (PTH Plating Through Hole). In order to ensure the conduction performance of the circuit board, the copper plating layer in the through hole needs to meet a certain thickness. However, the fluidity of the chemical liquid on the surface of the substrate is better than that of the through hole, so that the thickness of the copper plating layer on the surface of the substrate is larger than that of the copper plating layer in the through hole. Therefore, in order to ensure the thickness of the copper plating layer in the through hole, the thickness of the copper plating layer on the surface of the substrate is larger, which is not beneficial to etching the dense circuit on the circuit board.

Disclosure of Invention

In view of the above, the present application provides a method for manufacturing a circuit board, so as to solve the above problems.

The application provides a preparation method of a circuit board, which comprises the following steps: providing a multilayer circuit substrate, wherein the multilayer circuit substrate is provided with a through hole;

forming a first copper plating layer and a second copper plating layer on the surface of the multilayer circuit substrate and the inner wall of the through hole respectively, wherein the through hole with the second through plating layer is used for forming a through hole;

filling an insulating material in the plated through hole, and baking the insulating material to form an insulator to obtain an intermediate;

placing the intermediate body in etching liquid medicine, and enabling the etching liquid medicine to thin the first copper plating layer;

removing the insulator;

and etching the thinned first copper-plated layer into an outer layer circuit, thereby obtaining the circuit board.

In some embodiments, the insulator is raised above the surface of the first copper plating layer.

In some embodiments, after obtaining the insulator, the method further comprises:

and removing the insulator protruding from the first copper plating layer, so that the end part of the insulator is flush with the surface of the first copper plating layer.

In some embodiments, the insulator protruding from the first copper plating layer is ground by a grinding roller.

In some embodiments, the insulating material is a resin.

In some embodiments, the insulating material is baked at 135-145 ℃ for 80-100min to obtain the insulator.

In some embodiments, the insulator is removed using a sodium hydroxide solution.

In some embodiments, a protective layer is further formed on the outer layer circuit.

In some embodiments, a portion of the outer layer circuit is exposed from the protective layer to form a bonding pad, and the method further includes:

and carrying out surface treatment on the welding pad.

In some embodiments, the multilayer circuit substrate is formed after laminating and pressing a plurality of circuit substrates.

In the application, before the first copper plating layer of the circuit substrate is subjected to thinning treatment, the plated through hole is filled with an insulating material, so that the insulating material is completely solidified in the plated through hole and forms an insulator. Therefore, during thinning treatment, the insulator separates the liquid medicine from the second copper plating layer, and the second copper plating layer is prevented from being etched by the liquid medicine, so that the second copper plating layer can keep a certain thickness, and the conductivity between circuit board layers is ensured. According to the method, the operation of the subsequent process is not influenced when the thickness of the first copper plating layer is reduced, and the etching of dense circuits on the circuit board can be realized.

Drawings

Fig. 1 is a cross-sectional view of a copper-clad substrate according to an embodiment of the present application.

Fig. 2 is a cross-sectional view of the copper clad substrate shown in fig. 1 after etching the copper foil layer into a wiring layer.

Fig. 3 is a cross-sectional view of a multi-layered circuit substrate formed by laminating a plurality of circuit substrates shown in fig. 2.

Fig. 4 is a cross-sectional view of the multilayer wiring substrate shown in fig. 3 after copper is simultaneously plated on the surface and in the via hole.

Fig. 5 is a cross-sectional view of the plated through hole shown in fig. 4 filled with an insulating material.

Fig. 6 is a cross-sectional view of fig. 5 with a portion of the insulator removed.

Fig. 7 is a cross-sectional view of the multilayer wiring substrate shown in fig. 6 after the first copper plating layer is thinned and the insulator in the plated through-hole is removed.

Fig. 8 is a cross-sectional view of a wiring board obtained by forming an outer layer wiring and a protective layer on the multilayer wiring substrate shown in fig. 7.

Description of the main elements

Copper-clad substrate 10

Dielectric layer 11

Copper foil layer 12

Line layer 13

Circuit board 14

Adhesive layer 15

Single-sided copper-clad plate 16

Multilayer wiring substrate 20

Through-hole 21

First copper plating layer 22

Second copper plating layer 23

Plated through hole 24

Insulator 30

Outer layer circuit 40

Protective layer 50

Wiring board 100

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.

It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

To further explain the technical means and effects of the present application for achieving the intended purpose, the present application will be described in detail with reference to the accompanying drawings and embodiments.

One embodiment of the present application provides a method for manufacturing a circuit board, including the steps of:

s1, referring to fig. 1, a double-sided copper-clad substrate 10 is provided, in which the inner layer includes a dielectric layer 11 and copper foil layers 12 disposed on two opposite surfaces of the dielectric layer 11.

In one embodiment, the material of the dielectric layer 11 is an insulating resin, and specifically, the material of the dielectric layer 11 may be one selected from epoxy resin (epoxy resin), polypropylene (PP), BT resin, Polyphenylene Oxide (PPO), polypropylene (PP), Polyimide (PI), Polyethylene Terephthalate (PET), and Polyethylene Naphthalate (PEN).

S2, referring to fig. 2, each copper foil layer 12 is etched to form a circuit layer 13.

In some embodiments, the circuit layer 13 may be formed by laminating, exposing, developing, etching, and stripping, so as to obtain the circuit substrate 14.

S3, referring to fig. 3, a plurality of circuit substrates 14 are stacked and pressed to form a multi-layer circuit substrate 20, and a through hole 21 is formed in the multi-layer circuit substrate 20. A through hole 21 penetrates each wiring substrate 14.

In some embodiments, the multi-layer circuit substrate 20 can be fabricated by browning, riveting, laminating, pressing, and the like. The through-holes 21 may be made by laser drilling or mechanical drilling.

In some embodiments, an adhesive layer 15 is disposed between two adjacent circuit substrates 14, the adhesive layer 15 is used to adhere the two adjacent circuit substrates 14 together, and the material of the adhesive layer 15 may be common pure glue. The multilayer circuit substrate 20 further comprises two single-sided copper-clad plates 16, and the two single-sided copper-clad plates 16 are respectively arranged at the outermost sides of the circuit substrates 14.

S4, referring to fig. 4, copper is plated on the surface of the multilayer circuit substrate 20 and the through hole 21 to form a first copper plating layer 22 on the surface of the multilayer circuit substrate 20, and a second copper plating layer 23 is formed on the inner wall of the through hole 24. Wherein the through hole 21 with the second copper plating layer 23 forms a plated through hole 24.

In some embodiments, the surface of the multilayer wiring substrate 20 and the plated through holes 24 are plated with copper by means of electroplating. This is because the fluidity of the chemical solution on the surface of the roadbed is better than that of the plated through holes 24, and the thickness of the first copper plating layer 22 is greater than that of the second copper plating layer 23 under the same plating conditions. The second copper plated layer 23 is used to electrically connect the respective wiring layers 13 in the multilayer wiring substrate 20.

S5, referring to fig. 5, filling an insulating material in the plated through hole 24, and making the insulating material overflow the plated through hole 24.

The insulating material is completely filled in the plated through hole 24 such that there is no gap between the second copper plating layer 23 and the insulating material. In some embodiments, the through-plated hole 24 may be filled with the insulating material by a plug printer so that the insulating material is completely filled in the through-plated hole 24, and a chemical solution may be prevented from being impregnated between the insulating material and the second copper plating layer 23 in a subsequent process so that the second copper plating layer 23 in the through-plated hole 24 is separated from the chemical solution. In the present embodiment, the insulating material is resin. Alternatively, Shanrong SER-475WR ink was used as the resin.

The insulating material in the plated through hole 24 is spilled over the plated through hole 24 in order to ensure that the insulating material completely fills the plated through hole 24.

S6, baking the insulating material to solidify the insulating material to obtain an insulator 30.

In some embodiments, the multilayer circuit substrate 20 is baked in an oven at 135 ℃ and 145 ℃ for 80-100 min. In this time frame, the insulating material is sufficiently cured by heat. An insulator 30 is provided protruding from the surface of the first copper plating layer 22, i.e., protruding from the end of the plated through hole 24.

S7, referring to fig. 6, removing the insulator 30 protruding from the end of the plated through hole 24 to obtain an intermediate.

In some embodiments, the insulator 30 protruding from the first copper plating layer 22 is removed by brushing rollers in a brushing apparatus. The end of the insulator 30 is flush with the top surface of the first copper plating layer 22, which improves the flowability of the chemical solution (step S8) on the surface of the first copper plating layer 22 due to the effect of the insulator 30 protruding from the first copper plating layer 22, and ensures the uniformity of etching the first copper plating layer 22 during the subsequent process.

And S8, thinning the first copper plating layer 22 of the intermediate.

In some embodiments, by placing the intermediate body in the etching solution, the thickness of the first copper plating layer 22 is reduced under the etching effect of the etching solution, and since the second copper plating layer 23 in the plated through hole 24 is shielded by the insulator 30, the contact of the etching solution with the second copper plating layer 23 can be avoided, so that the thickness of the second copper plating layer 23 is kept constant.

And after thinning treatment, the subsequent fine circuit formation is facilitated.

S9, please refer to fig. 7, removing the insulator 30 in the plated through hole 24.

In some embodiments, by placing the multilayer circuit substrate 20 in the sodium hydroxide solution for a certain time, the sodium hydroxide solution reacts with the insulators 30, and all the insulators 30 in the plated through holes 24 can be removed, so that the second copper plating layer 23 is exposed, and the subsequent process can be facilitated to weld the parts in the second copper plating layer 23. In the present embodiment, the multilayer circuit substrate 20 processed in steps S5 to S9 does not affect the subsequent process operations, so that the thickness of the first copper plating layer 22 and the thickness of the second copper plating layer 23 can satisfy the production requirement at the same time.

S10, referring to fig. 8, the first copper-clad layer 22 and the copper foil layer of the single-sided copper-clad plate 16 are etched to form an outer layer circuit 40.

In some embodiments, the outer layer circuit 40 can be formed by dry film, development, secondary copper plating, tin plating, film stripping, circuit etching, and tin stripping.

S11, referring to fig. 8, forming a protection layer 50 on the outer layer circuit 40, exposing a part of the outer layer circuit 40 out of the protection layer 50 to form a pad, and performing surface treatment on the pad to obtain the circuit board 100.

In some embodiments, the protection layer 50 is formed by solder resist, development, etc., and the protection layer 50 may be a solder resist layer for placing a wire oxidation or solder short in the outer layer wire 40. The protective layer 50 is exposed on a portion of the outer layer circuit 40 to form a bonding pad, and a surface treatment is performed on the bonding pad. In some embodiments, the surface treatment may be nickel-gold. The welding pad has good weldability through a chemical nickel and gold deposition process and can bear multiple times of reflow soldering.

Subsequently, the circuit board 100 may be cut (e.g., mechanically cut by a digital machine tool to obtain a desired dimension), electrically tested, and finally inspected, and the circuit board 100 is packaged with a qualified quality.

The present application further provides a circuit board 100, wherein the circuit board 100 is obtained through the processes of steps S1 to S11.

In the present application, before the first copper plating layer 22 of the circuit substrate 14 is subjected to the thinning process, the insulating material is completely solidified in the plated through hole 24 and the insulator 30 is formed by filling the insulating material in the plated through hole 24. Therefore, during the thinning process, the insulating body 30 separates the chemical solution from the second copper plating layer 23, and prevents the chemical solution from etching the second copper plating layer 23, so that the second copper plating layer 23 can maintain a certain thickness, and the conductivity between the layers of the circuit board 100 is ensured. The etching method and the etching device do not affect the operation of the subsequent process when the thickness of the first copper plating layer 22 is reduced, and can realize the etching of dense circuits on the circuit board 100.

Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present application and not for limiting, and although the present application is described in detail with reference to the embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present application without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A preparation method of a circuit board is characterized by comprising the following steps:

providing a multilayer circuit substrate, wherein the multilayer circuit substrate is provided with a through hole;

removing the insulator;

2. The method of manufacturing a wiring board according to claim 1, wherein the insulator is provided protruding on the surface of the first copper plating layer.

3. The method of manufacturing a wiring board according to claim 2, wherein after obtaining the insulator, the method further comprises:

4. The method for producing a wiring board according to claim 3, wherein the insulator provided protrudingly on the first copper plating layer is ground by a grinding and brushing roller.

5. The method for producing a wiring board according to claim 3, wherein the insulating material is a resin.

6. The method for preparing a wiring board according to claim 5, wherein the insulating material is baked at 135-145 ℃ for 80-100min to obtain the insulator.

7. The method for producing a wiring board according to claim 5, wherein the insulator is removed with a sodium hydroxide solution.

8. The method of manufacturing a wiring board according to claim 1, wherein a protective layer is further formed on the outer layer wiring.

9. The method of manufacturing a wiring board according to claim 8, wherein a portion of the outer layer circuit is exposed to the protective layer to form a pad, the method further comprising:

and carrying out surface treatment on the welding pad.

10. The method for manufacturing a wiring board according to claim 1, wherein a plurality of wiring substrates are laminated and bonded to form the multilayer wiring substrate.