CN112672545A - Method for manufacturing multilayer circuit board - Google Patents
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- CN112672545A CN112672545A CN202011382281.3A CN202011382281A CN112672545A CN 112672545 A CN112672545 A CN 112672545A CN 202011382281 A CN202011382281 A CN 202011382281A CN 112672545 A CN112672545 A CN 112672545A
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Abstract
The invention provides a method for manufacturing a multilayer circuit board, which comprises the steps of providing a core board provided with connecting holes, filling a conductive material in the connecting holes to form a conducting layer, and electrically connecting the conductive layers on the two sides of the core board through the conducting layer; carrying out graphical processing on the conducting layer to obtain a circuit layer with a bonding pad arranged corresponding to the conducting layer; coating anisotropic conductive paste wrapped with a plurality of mutually insulated conductive particles on the bonding pad; stacking a bonding sheet provided with a window exposed out of the anisotropic conductive paste on the circuit layer; stacking another conductive layer on the bonding sheet and the anisotropic conductive paste to obtain a stacked structure; laminating the laminated structure, bonding the conductive layer and the circuit layer together through a bonding sheet and anisotropic conductive paste, and electrically connecting the conductive layer and the bonding pad through conductive particles; the steps are repeated to obtain the multilayer circuit board, the manufacturing period of the multilayer circuit board can be shortened, the production cost is reduced, and short circuit between two adjacent bonding pads is avoided.
Description
Technical Field
The invention belongs to the technical field of manufacturing methods of circuit boards, and particularly relates to a manufacturing method of a multilayer circuit board.
Background
The interconnection technology of any layer is a process technology in the field of high-density interconnection Printed Circuit Boards (PCBs) at present, and the connection between any layer and any layer is realized through micropores, so that the interconnection technology is applied to communication electronic products.
At present, any layer of interconnected PCBs in the mainstream are manufactured by multiple laser drilling, multiple hole filling electroplating and multiple pressing methods. The method has the advantages that the processing flow is long, the conduction between layers is influenced by factors such as the drilling position precision, the glue removing quality of the bottom of a drill hole, the drilling electroplating quality and the like, and the process quality requirement is high, so that the process cost and the scrapping cost are directly increased, and the production cost is high.
In recent years, a method for interconnecting any layer by one-time pressing has appeared in the industry, in which a PCB is divided into a plurality of sub-boards which are subjected to laser drilling and hole filling electroplating, then the sub-boards are stacked in sequence, and after a layer of semi-cured conductive paste (such as tin paste, copper paste, silver paste and conductive adhesive sheet) is arranged on a laser hole soldering pad of the sub-board, the manufacturing of the circuit board is completed by one-time pressing. However, the key of the method is the arrangement of the semi-cured conductive paste, and due to the characteristics of the paste, in the arrangement process and the pressing process, the conductive paste flows to cause short circuit between two adjacent pads of the same layer of daughter board, so that the method is difficult to be applied to any layer of interconnected PCBs with precise spacing, and the spacing between the pads is generally limited to be larger than 12 mils; in addition, the requirement on the alignment degree between the daughter boards is extremely high in a one-step pressing mode, the pressing of a small number of the daughter boards is feasible, the yield of finished products pressed together by the multi-layer daughter boards is low, and the comprehensive cost is high.
Disclosure of Invention
The embodiment of the invention aims to provide a manufacturing method of a multilayer circuit board, which aims to solve the technical problems that the processing flow of any layer of interconnected PCBs is long, the production cost is high and two adjacent bonding pads of the same layer of daughter boards are easy to be short-circuited in the prior art.
In order to achieve the purpose, the invention adopts the technical scheme that: provided is a method for manufacturing a multilayer circuit board, including:
step S1, providing a core board, wherein the core board comprises an insulating layer and conducting layers respectively arranged on two opposite sides of the insulating layer, the core board is provided with a connecting hole, and the connecting hole penetrates through one of the conducting layers and the insulating layer;
step S2, filling a conductive material in the connecting hole to form a conducting layer, wherein the conductive layers on the two opposite sides of the core board are electrically connected through the conducting layer;
step S3, carrying out graphical processing on the conducting layer to obtain a circuit layer, wherein the circuit layer comprises a bonding pad arranged corresponding to the conducting layer;
step S4, providing anisotropic conductive paste, wherein a plurality of conductive particles insulated from each other are wrapped in the anisotropic conductive paste, and the anisotropic conductive paste is coated on the bonding pad;
step S5, providing a bonding sheet, wherein a window is arranged at the position of the bonding sheet corresponding to the anisotropic conductive paste, the bonding sheet is stacked on the circuit layer, and the anisotropic conductive paste is exposed out of the window;
step S6, stacking another conductive layer on the bonding sheet and the anisotropic conductive paste to obtain a stacked structure;
step S7, pressing the laminated structure, wherein the conductive layer and the circuit layer are bonded together through the bonding sheet and the anisotropic conductive paste, and the conductive layer and the bonding pad are electrically connected through the conductive particles;
and step S8, repeating the steps S3 to S7, and obtaining the multilayer circuit board.
Optionally, in the step S4, the anisotropic conductive paste is applied on the pad through a printing process or a dispensing process.
Optionally, after the step S4, a pre-curing process is further performed on the anisotropic conductive paste.
Optionally, the parameters of the pre-curing treatment on the anisotropic conductive paste are as follows: the temperature is 60-100 ℃, and the time is 1-10 min.
Optionally, in the step S4, the application area of the anisotropic conductive paste is larger than the area of the pad.
Optionally, in the step S5, an area of the window is larger than a coating area of the anisotropic conductive paste.
Optionally, in the step S5, the anisotropic conductive paste is applied to a thickness greater than that of the bonding sheet.
Optionally, in the step S2, the conductive material is filled in the connection hole through a deposition and plating process to form the conductive layer.
Optionally, in the step S3, the method of performing patterning on the conductive layer is as follows:
step S31, performing surface cleaning on the conducting layer;
step S32, attaching a dry film on the conductive layer;
step S33, exposing and developing the dry film, wherein the dry film exposes the part of the conductive layer to be removed;
step S34, under the block of the dry film, etching the part of the conductive layer to be removed;
and step S35, stripping the dry film to obtain the circuit layer.
Optionally, in the step S7, the parameters of the stitching are: the temperature is 150-230 ℃, the pressure is 350-450 PSI, and the time is 120-300 min.
The manufacturing method of the multilayer circuit board provided by the invention has the beneficial effects that:
(1) the manufacturing method of the multilayer circuit board can save the processes of drilling and filling holes for many times, thereby avoiding the quality risk, improving the product yield, shortening the manufacturing period and greatly reducing the manufacturing cost;
(2) the manufacturing method of the multilayer circuit board can be used for manufacturing in the prior art and equipment capacity, electroplating equipment is not required to be additionally arranged for solving the bottleneck of filling hole electroplating capacity, and the equipment cost can be reduced;
(3) according to the manufacturing method of the multilayer circuit board, any layer of interconnection is realized by adopting the anisotropic conductive paste, the resistance of the anisotropic conductive paste on the insulating plane is far higher than that in the thickness direction, and the problem of short circuit between two adjacent bonding pads of the same layer of circuit layer can be effectively avoided, so that the distance between two adjacent bonding pads of the same layer of circuit layer can be reduced, the wiring density is improved, and the requirements of miniaturization, precision and the like of any layer of interconnection are met.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic flow chart of a method for manufacturing a multilayer circuit board according to an embodiment of the present invention;
fig. 2 is a first schematic structural diagram of step S1 according to the embodiment of the present invention;
fig. 3 is a second schematic structural diagram of step S1 according to the embodiment of the present invention;
fig. 4 is a schematic structural diagram of step S2 according to the embodiment of the present invention;
fig. 5 is a schematic structural diagram of step S3 according to the embodiment of the present invention;
fig. 6 is a schematic structural diagram of step S4 according to the embodiment of the present invention;
FIG. 7 is a schematic structural flow chart of step S5 and step S6 according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of step S7 according to the embodiment of the present invention;
fig. 9 is a schematic structural diagram of step S8 according to the embodiment of the present invention.
Wherein, in the figures, the respective reference numerals:
100-a core board; 110-connecting hole; 200-an insulating layer; 310-a conductive layer; 320-a line layer; 321-a bonding pad; 322-spacer grooves; 400-a conducting layer; 500-anisotropic conductive paste; 510-an electrical connection layer; 520-an adhesive layer; 600-a bonding sheet; 610-window.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, as used herein, refer to an orientation or positional relationship indicated in the drawings, which is solely for the purpose of facilitating the description and simplifying the description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and is therefore not to be construed as limiting the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
Referring to fig. 1, an embodiment of the invention provides a method for manufacturing a multilayer circuit board, including:
step S1, as shown in fig. 2 and fig. 3, providing a core board 100, where the core board 100 includes an insulating layer 200 and conductive layers 310 respectively disposed on two opposite sides of the insulating layer 200, the core board 100 is provided with a connection hole 110, and the connection hole 110 penetrates one of the conductive layers 310 and the insulating layer 200;
step S2, as shown in fig. 4, filling the connection hole 110 with a conductive material to form a conductive layer 400, and electrically connecting the conductive layers 310 on the opposite sides of the core board 100 through the conductive layer 400;
step S3, as shown in fig. 5, patterning the outer conductive layer 310 to obtain a circuit layer 320, where the circuit layer 320 includes a pad 321 disposed corresponding to the conductive layer 400;
step S4, as shown in fig. 6, providing an anisotropic conductive paste 500, wherein a plurality of conductive particles insulated from each other are wrapped in the anisotropic conductive paste 500, and the anisotropic conductive paste 500 is coated on the pad 321;
step S5, as shown in fig. 7, providing a bonding sheet 600, forming a window 610 on the bonding sheet 600 corresponding to the anisotropic conductive paste 500, stacking the bonding sheet 600 on the circuit layer 320, and exposing the anisotropic conductive paste 500 through the window 610;
step S6, as shown in fig. 7, stacking another conductive layer 310 on the adhesive sheet 600 and the anisotropic conductive paste 500 to obtain a stacked structure;
step S7, as shown in fig. 8, the stacked structure is pressed, the conductive layer 310 and the circuit layer 320 are bonded together by the bonding sheet 600 and the anisotropic conductive paste 500, and the conductive layer 310 and the bonding pad 321 are electrically connected by the conductive particles;
step S8, as shown in fig. 9, repeats steps S3 to S7, thereby obtaining a multilayer circuit board.
It should be noted that the anisotropic conductive paste 500 is mainly a paste-like or colloidal substance composed of a resin adhesive and conductive particles, the conductive particles are uniformly distributed in the resin adhesive at ordinary times without contacting each other, any two conductive particles are insulated from each other, as shown in fig. 7 and 8, when the stacked structure is pressed, the outermost conductive layer 310, the pad 321 and the conductive particles between the two are tightly abutted together in a direction perpendicular to the anisotropic conductive paste 500 (i.e. in the pressing direction), so that the outermost conductive layer 310 and the pad 321 below the outermost conductive layer are electrically connected through the conductive particles between the two; in the direction parallel to the anisotropic conductive paste 500, the conductive particles in the anisotropic conductive paste 500 are not pressed, so that even if the anisotropic conductive paste 500 flows between two adjacent pads 321 of the same circuit layer 320 when the stacked structure is pressed, the conductive particles between the two adjacent pads 321 will not conduct the two adjacent pads 321, thereby effectively avoiding the short circuit between the two adjacent pads 321.
The manufacturing method of the multilayer circuit board of the embodiment of the invention has the beneficial effects that:
(1) the manufacturing method of the multilayer circuit board can save the processes of drilling and filling holes for many times, thereby avoiding the quality risk, improving the product yield, shortening the manufacturing period and greatly reducing the manufacturing cost;
(2) the manufacturing method of the multilayer circuit board can be used for manufacturing in the prior art and equipment capacity, electroplating equipment is not required to be additionally arranged for solving the bottleneck of filling hole electroplating capacity, and equipment cost can be reduced;
(3) according to the manufacturing method of the multilayer circuit board, provided by the embodiment of the invention, interconnection of any layer is realized by adopting the anisotropic conductive paste 500, the resistance of the anisotropic conductive paste 500 on an insulating plane is far higher than that in the thickness direction, and the problem of short circuit between two adjacent bonding pads 321 of the same layer of circuit layer 320 can be effectively avoided, so that the distance between two adjacent bonding pads 321 of the same layer of circuit layer 320 can be reduced, the wiring density is improved, and the requirements of miniaturization, precision and the like of interconnection of any layer are met.
It is worth mentioning that for the convenience of coating, the viscosity of the anisotropic conductive paste 500 may be adjusted by doping an organic solvent (such as a weak hydrogen bond, a hydrogen bond accepting type, a hydrogen bond donating type organic solvent) into the anisotropic conductive paste 500 so as to coat the anisotropic conductive paste 500 on a designated position.
Further, as an embodiment of the present invention, as shown in fig. 2 and 3, in step S1, the connection hole 110 is formed on the core board 100 by laser drilling, specifically, the connection hole 110 may be formed by laser drilling on the core board 100 by using a laser drilling machine. It is understood that the connection holes 110 may be formed in the core plate 100 in other manners according to the choice of actual situations, and are not limited thereto.
Further, as an alternative embodiment of the present invention, in the embodiment of the present invention, the insulating layer 200 may be an epoxy glass fiber board, and the conductive layer 310 may be a copper board, and of course, the materials of the insulating layer 200 and the conductive layer 310 may be modified appropriately according to the selection of the actual situation and the specific requirement, and are not limited herein.
Further, as an embodiment of the present invention, as shown in fig. 4, in step S2, a conductive material is filled in the connection hole 110 by a deposition and plating process to form a conductive layer 400, specifically, the conductive material may be copper, the conductive layer 400 is formed by filling a material in the connection hole 110 by a copper deposition and plating process, the top and the bottom of the conductive layer 400 are respectively in contact with the conductive layers 310 on the two opposite sides of the insulating layer 200, so as to electrically connect the two conductive layers 310, and after the subsequent step S3, the circuit layers 320 on the two opposite sides of the insulating layer 200 may be electrically connected through the conductive layer 400. It is understood that, according to the choice of practical situation, the conductive material may be filled in the connection hole 110 to form the conductive layer 400 in other ways, which are not limited herein.
Further, as an embodiment of the present invention, in step S3, the method of patterning the conductive layer 310 is:
step S31, performing surface cleaning on the conductive layer 310 to obtain a clean and fresh surface, and making the surface of the conductive layer 310 have a certain roughness to facilitate disposing a dry film on the surface of the conductive layer 310;
step S32, attaching a dry film on the conductive layer 310;
step S33, exposing and developing the dry film to expose the portion of the conductive layer 310 to be removed;
step S34, etching the portion of the conductive layer 310 to be removed with an etching solution under the barrier of the dry film;
step S35, peeling off the dry film, thereby obtaining the wiring layer 320.
Further, as an embodiment of the present invention, in step S31, the surface of the conductive layer 310 may be mechanically cleaned to perform a preliminary cleaning on the surface of the conductive layer 310 and make the surface of the conductive layer 310 have a certain roughness. In this embodiment, a brush machine (an abrasive roll brush machine and a pumice brush machine) may be used to mechanically clean the surface of the conductive layer 310.
Further, as an embodiment of the present invention, in step S31, after the surface of the conductive layer 310 is mechanically cleaned, the surface of the conductive layer 310 is chemically cleaned to remove the oxide on the surface of the conductive layer 310, so as to obtain a clean and fresh surface and improve the conductivity of the conductive layer 310. In this embodiment, the mechanical cleaning step may be omitted, and the surface of the conductive layer 310 may be directly chemically cleaned, which is not limited herein.
Further, as an embodiment of the present invention, as shown in fig. 3, in step S3, after the conductive layer 310 is patterned, the circuit layer 320 further includes spacing grooves 322 disposed on both sides of the pads 321, and the pads 321 are disposed in a protruding manner with respect to the spacing grooves 322; with this structure, referring to fig. 7 and 8, in the subsequent step S7, the conductive particles of the anisotropic conductive paste 500 between the pad 321 and the conductive layer 310 are pressed to conduct the pad 321 and the conductive layer 310, a part of the anisotropic conductive paste 500 is pressed to fill the spacing grooves 322 on two sides of the pad 321, the conductive particles of the anisotropic conductive paste 500 filled in the spacing grooves 322 are not pressed, and the conductive particles of the anisotropic conductive paste 500 in the spacing grooves 322 can be prevented from conducting two adjacent pads 321, thereby effectively avoiding the short circuit problem between two adjacent pads 321.
Further, as shown in fig. 8, in the subsequent step S7, as shown in fig. 8, the bonding sheet 600 is pressed and filled into the spacing grooves 322 on both sides of the pad 321, and in this structure, the side of the anisotropic conductive paste 500 filled into the spacing grooves 322, which is close to the lines, is provided with the bonding sheet 600, and the bonding sheet 600 can play a role in blocking, so that the pad 321 can be prevented from being conducted with the adjacent lines through the anisotropic conductive paste 500 filled into the spacing grooves 322, and the insulation between the pad 321 and the adjacent lines can be effectively improved.
Further, as shown in fig. 6, in step S4, the anisotropic conductive paste 500 is coated on the pad 321 through a printing process or a dispensing process, specifically, the anisotropic conductive paste 500 can be printed on the circuit layer 320 at one time by adopting a screen printing method, which effectively improves the printing precision and the working efficiency, and of course, the anisotropic conductive paste 500 can also be coated on the pad 321 by adopting other methods according to the selection and specific requirements of the actual situation, which is not limited herein.
Further, as an embodiment of the present invention, as shown in fig. 6, in step S4, the coating area of the anisotropic conductive paste 500 is larger than the area of the pad 321, so that the anisotropic conductive paste 500 can completely cover the pad 321, and the reliability of the electrical connection between the conductive layer 310 and the circuit layer 320 is improved.
Further, as shown in fig. 6, in step S4, the anisotropic conductive paste 500 is 6-10 mil larger than the single side of the pad 321, so that the anisotropic conductive paste 500 can completely cover the pad 321, and the problem of short circuit caused by excessive overflow of the anisotropic conductive paste 500 when the stacked structure is pressed in the following process can be prevented. It is understood that the relative size between the anisotropic conductive paste 500 and the bonding pad 321 may be appropriately adjusted according to the choice of actual conditions and specific requirements, and is not limited thereto.
Further, as an embodiment of the present invention, as shown in fig. 6, after step S4, a pre-curing process is further performed on the anisotropic conductive paste 500, so that the anisotropic conductive paste 500 does not easily flow on the pad 321, and the anisotropic conductive paste 500 is prevented from flowing to other positions during a subsequent handling or stacking process.
Further, as an embodiment of the present invention, the parameters of the pre-curing treatment of the anisotropic conductive paste 500 are: the temperature is 60-100 ℃, the time is 1-10 min, and of course, according to the selection of the actual situation and the specific requirements, the parameters of the pre-curing treatment can be properly adjusted, and the only limitation is not required here.
Further, as an embodiment of the present invention, as shown in fig. 7, in step S5, the area of the window 610 of the bonding sheet 600 is larger than the coating area of the anisotropic conductive paste 500, so that the window 610 of the bonding sheet 600 can completely expose the anisotropic conductive paste 500, the bonding sheet 600 can avoid shielding the anisotropic conductive paste 500, the subsequent electrical connection between the conductive layer 310 and the circuit layer 320 is prevented from being affected, and the reliability of the electrical connection between the conductive layer 310 and the circuit layer 320 is improved.
Further, as shown in fig. 7, in step S5, the window 610 of the bonding sheet 600 is 6 to 10 mils larger than the single side of the anisotropic conductive paste 500, so as to prevent the bonding sheet 600 from shielding the anisotropic conductive paste 500 and prevent the subsequent bonding sheet 600 from overflowing between the anisotropic conductive paste 500 and the conductive layer 310 during the lamination process of the stacked structure, thereby preventing the subsequent conductive layer 310 and the circuit layer 320 from being electrically connected, and improving the reliability of the electrical connection between the conductive layer 310 and the circuit layer 320. It is understood that the relative size between the window 610 of the bonding sheet 600 and the anisotropic conductive paste 500 may be appropriately adjusted according to the choice of actual conditions and specific requirements, and is not limited only herein.
Further, as an embodiment of the present invention, as shown in fig. 7, in step S5, the window 610 may be formed on the adhesive sheet 600 by a mechanical routing, laser grooving or punching, and the window 610 may be formed on the adhesive sheet 600 by other methods according to the choice of actual situations and specific requirements, which are not limited herein.
Further, as an embodiment of the present invention, as shown in fig. 7, in step S5, the anisotropic conductive paste 500 is coated to a thickness greater than or equal to the thickness of the bonding sheet 600, so as to ensure that the anisotropic conductive paste 500 can be fully filled and electrically conductive after the subsequent lamination.
Further, as an embodiment of the present invention, as shown in fig. 7, in step S5, the coating thickness of the anisotropic conductive paste 500 is 0 to 20 μm greater than the thickness of the adhesive sheet 600, so as to ensure that the anisotropic conductive paste 500 can be fully filled and conducted after the subsequent lamination. It is understood that the relative thickness between the anisotropic conductive paste 500 and the adhesive sheet 600 may be appropriately adjusted according to the selection of the actual situation and the specific requirement, and is not limited thereto.
Further, as an embodiment of the present invention, as shown in fig. 7, in step S5, the bonding sheet 600 may be a Prepreg, specifically, the bonding sheet 600 may be a Prepreg (prep, PP), specifically, composed of epoxy resin and glass fiber cloth, and of course, other materials may be selected for the bonding sheet 600 according to the selection and specific requirements of the actual situation, which is not limited herein.
Further, as an embodiment of the present invention, in step S7, the stitching parameters are: the temperature is 150-230 ℃, the pressure is 350-450 PSI, and the time is 120-300 min, namely, in step S7, the laminated structure is subjected to hot pressing, so that the anisotropic conductive paste 500 and the bonding sheet 600 can be subjected to hot pressing, appropriate deformation and curing of the anisotropic conductive paste 500 and the bonding sheet 600 are facilitated, and the outermost conductive layer 310, the bonding sheet 600, the anisotropic conductive paste 500 and the bonding pad 321 are tightly connected together. Of course, according to the selection of the actual situation and the specific requirements, the parameters for laminating the laminated structure may be properly adjusted, and are not limited herein.
Further, as an embodiment of the present invention, as shown in fig. 7 and 8, after the step S7 of thermally pressing the stacked layers, the anisotropic conductive paste 500 is converted into an electrical connection layer 510 and an adhesive layer 520 connected to the electrical connection layer 510, the electrical connection layer 510 is disposed between the conductive layer 310 and the bonding pad 321, the conductive layer 310 and the bonding pad 321 are electrically connected through the electrical connection layer 510, and the adhesive layer 520 is used for adhering the conductive layer 310 to the circuit layer 320.
Further, as one embodiment of the present invention, as shown in fig. 6, in step S4, an insulating film is provided outside the conductive particles in the anisotropic conductive paste 500, the conductive particles are uniformly distributed in the resin binder at ordinary times without contacting each other, any two conductive particles are insulated from each other, as shown in fig. 7 and 8, when the laminated structure is thermally compressed, the insulating film outside the conductive particles is broken, in a direction perpendicular to the anisotropic conductive paste 500, i.e., in the direction of the press-fit, the conductive particles between the outermost conductive layer 310 and the pads 321 are pressed together, thereby conducting the outermost conductive layer 310 and the pad 321, the conductive particles are spherical in the initial state and become a round cake shape after being extruded, the contact area of the conductive particles is increased by 3-4 times, the electric connection layer 510 between the conductive layer 310 and the pad 321 is formed, and the reliability of electric connection between the outermost conductive layer 310 and the pad 321 is increased; in the direction parallel to the anisotropic conductive paste 500, the conductive particles in the anisotropic conductive paste 500 are not pressed, so that even if the anisotropic conductive paste 500 flows between two adjacent pads 321 of the same circuit layer 320 when the stacked structure is pressed, the conductive particles between the two adjacent pads 321 will not conduct the two adjacent pads 321, thereby effectively avoiding the short circuit between the two adjacent pads 321.
Further, as shown in fig. 7 and 8, in step S7, a part of the adhesive layer 520 is filled into the spacing groove 322 on both sides of the pad 321, when the adhesive layer 520 is filled into the spacing groove 322, the conductive particles filled into the adhesive layer 520 in the spacing groove 322 are prevented from being pressed to conduct two adjacent pads 321 or to conduct the pad 321 and its adjacent circuit, and the short circuit problem between two adjacent pads 321 or between the pad 321 and its adjacent circuit is effectively avoided. In this embodiment, the bonding sheet 600 is disposed on the side of the bonding layer 520 filled into the spacing groove 322, which is close to the circuit, and the bonding sheet 600 can play a role in blocking, so as to prevent the bonding pad 321 from being conducted with the adjacent circuit through the bonding layer 520 filled into the spacing groove 322, thereby effectively improving the insulation between the bonding pad 321 and the adjacent circuit.
It should be noted that, in the actual production process, the multilayer circuit board according to the embodiment of the present invention needs to be manufactured by multiple pressing, and in each pressing process, different layer structures (the conductive layer 310, the circuit layer 320, the bonding sheet 600 and the anisotropic conductive paste 500) may expand and contract, so that, when the steps S3 to S7 are repeated, the printing position and size of the anisotropic conductive paste 500 and the position of the window 610 of the bonding sheet 600 need to be adjusted according to the expansion and contraction data after the previous pressing, so as to ensure the printing precision of the anisotropic conductive paste 500 and the alignment precision of the window 610 of the bonding sheet 600.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A method for manufacturing a multilayer circuit board, comprising:
step S1, providing a core board, wherein the core board comprises an insulating layer and conducting layers respectively arranged on two opposite sides of the insulating layer, the core board is provided with a connecting hole, and the connecting hole penetrates through one of the conducting layers and the insulating layer;
step S2, filling a conductive material in the connecting hole to form a conducting layer, wherein the conductive layers on the two opposite sides of the core board are electrically connected through the conducting layer;
step S3, carrying out graphical processing on the conducting layer to obtain a circuit layer, wherein the circuit layer comprises a bonding pad arranged corresponding to the conducting layer;
step S4, providing anisotropic conductive paste, wherein a plurality of conductive particles insulated from each other are wrapped in the anisotropic conductive paste, and the anisotropic conductive paste is coated on the bonding pad;
step S5, providing a bonding sheet, wherein a window is arranged at the position of the bonding sheet corresponding to the anisotropic conductive paste, the bonding sheet is stacked on the circuit layer, and the anisotropic conductive paste is exposed out of the window;
step S6, stacking another conductive layer on the bonding sheet and the anisotropic conductive paste to obtain a stacked structure;
step S7, pressing the laminated structure, wherein the conductive layer and the circuit layer are bonded together through the bonding sheet and the anisotropic conductive paste, and the conductive layer and the bonding pad are electrically connected through the conductive particles;
and step S8, repeating the steps S3 to S7, and obtaining the multilayer circuit board.
2. The method of claim 1, wherein in the step S4, the anisotropic conductive paste is applied on the pad through a printing process or a dispensing process.
3. The method of claim 1, further comprising pre-curing the anisotropic conductive paste after step S4.
4. The method of claim 3, wherein the anisotropic conductive paste is pre-cured using the following parameters: the temperature is 60-100 ℃, and the time is 1-10 min.
5. The method of claim 1, wherein in the step S4, the anisotropic conductive paste is applied in an area larger than an area of the pad.
6. The method of claim 1, wherein in the step S5, an area of the window is larger than a coating area of the anisotropic conductive paste.
7. The method of claim 1, wherein in the step S5, the anisotropic conductive paste is applied to a thickness greater than that of the adhesive sheet.
8. The method of any one of claims 1 to 7, wherein in the step S2, the conductive material is filled in the connection hole by a deposition and plating process to form the conductive layer.
9. The method according to any one of claims 1 to 7, wherein in the step S3, the conductive layer is patterned by:
step S31, performing surface cleaning on the conducting layer;
step S32, attaching a dry film on the conductive layer;
step S33, exposing and developing the dry film, wherein the dry film exposes the part of the conductive layer to be removed;
step S34, under the block of the dry film, etching the part of the conductive layer to be removed;
and step S35, stripping the dry film to obtain the circuit layer.
10. The method according to any one of claims 1 to 7, wherein in the step S7, the parameters of the stitching are: the temperature is 150-230 ℃, the pressure is 350-450 PSI, and the time is 120-300 min.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024002068A1 (en) * | 2022-06-30 | 2024-01-04 | 华为技术有限公司 | Flexible circuit board, circuit board assembly, and electronic device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103167727A (en) * | 2011-12-14 | 2013-06-19 | 揖斐电株式会社 | Wiring board and method for manufacturing the same |
| CN111669906A (en) * | 2020-05-27 | 2020-09-15 | 上海美维电子有限公司 | Method for manufacturing multilayer circuit board |
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2020
- 2020-12-01 CN CN202011382281.3A patent/CN112672545A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103167727A (en) * | 2011-12-14 | 2013-06-19 | 揖斐电株式会社 | Wiring board and method for manufacturing the same |
| CN111669906A (en) * | 2020-05-27 | 2020-09-15 | 上海美维电子有限公司 | Method for manufacturing multilayer circuit board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024002068A1 (en) * | 2022-06-30 | 2024-01-04 | 华为技术有限公司 | Flexible circuit board, circuit board assembly, and electronic device |
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Application publication date: 20210416 |