KR101093173B1 - A build-up printed circuit board with via-holes of stack type using bump structure and Manufacturing method of the same, Detachable Carrier using manufacturing method of the same - Google Patents

Abstract

The present invention relates to a method for manufacturing a stacked printed circuit board having bumps, wherein two printed circuit boards can be manufactured simultaneously using a separate carrier having a structure in which primary and secondary copper foil layers are formed on both surfaces of an insulating layer. In particular, the gist of the present invention is manufactured using a method of filling a via hole in an inner layer and an outermost shell connected to a bump structure therein.

Printed circuit board, bump, via hole filling

Description

A build-up printed circuit board with via-holes of stack type using bump structure and manufacturing method of the same, Detachable Carrier using manufacturing method of the same}

The present invention relates to a method for manufacturing a printed circuit board implemented in a multi-layer and a printed circuit board manufactured accordingly.

A printed circuit board (PCB) is a printed circuit board pattern formed of a conductive material such as copper on an electrically insulating substrate, and refers to a board immediately before mounting an electronic component. In other words, in order to mount many kinds of electronic components on a flat plate, it means a circuit board in which a mounting position of each component is determined and a line pattern connecting the components is printed and fixed on the flat surface. Such printed circuit boards generally include a single-layer PCB and a build-up board in which multilayered PCBs are formed, that is, multilayer PCB substrates.

These build-up boards and multilayer PCB boards can manufacture boards and evaluate the quality of the boards one by one, thereby increasing the yield of the entire multilayer PCB board, and precisely connecting the interlayer wirings to produce high-density compact PCBs. To make it possible.

In this build-up process, a connection line of wiring is formed between layers, and the layers are connected through via holes. In order to form such a via hole, a very fine diameter can be realized using a laser rather than a conventional mechanical drill.

Specifically, the method of forming a via hole of the build-up board is implemented by a stack via method in which vias are stacked on vias, and the formation of the stack vias is printed. It is considered to be a very important core technology in the manufacture of multilayer PCB because the circuit design of the circuit board can be facilitated, the wiring length of the circuit can be shortened, the electrical operation ability is improved, and the circuit density can be increased. In order to form a stack via, very precise alignment of via holes is required, and circuit line width and fine design standards of via holes are required for high density, which makes it difficult to process.

In order to form such a stack via, laser holes have been used to process via holes in insulating materials constituting each layer of a printed circuit board, and to fill the via holes with metallic paste. Later, the copper metal foil is laminated on the surface of the insulating material by a hot press method, and a circuit is formed by a patterning method using a photoresist to complete one layer. After forming each layer in this manner, finely aligning their positions, and again by lamination using a hot press to form a build-up board (Build-up Board). 1A and 1B, the via hole 11 is processed in the insulating material 10 using a laser drill (S 1), a plating layer is formed in the via hole, and the metal paste is filled (S 2). ). Thereafter, a copper foil 13 for forming a circuit pattern is formed on the upper surface of the insulating material 10 (S 3), and the copper foil 13 is processed to form a circuit pattern 14, thereby completing one layer (S). 3).

Thereafter, the second dynamic laminated plate 13 and the third dynamic laminated plate are aligned to form a build-up board having a stack via through thermal compression (S 4 to S 5).

However, the processing of the via hole for forming the multilayer stack via is performed by using a fine laser drill. In this case, the via hole must be formed separately in each layer. Problem occurs. In addition, when the conductive metal paste is filled to transmit the electrical signal of the via hole, a high electrical resistance of the metal paste may cause a lot of noise. Therefore, this manufacturing method is difficult to be applied to a product that requires high reliability. .

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem, and an object of the present invention is to stack two stacks in one process by using a separate carrier having primary and secondary copper foil layers formed on both sides of an insulating layer. The present invention provides a method for manufacturing a printed circuit board and a printed circuit board.

The present invention is a means for solving the above-described problems, by using a separate carrier having a primary and secondary copper foil layer on both sides of the insulating layer to laminate the inner layer structure of the printed circuit board in a double-sided process, and the removable carrier during the process It is possible to manufacture two printed circuit boards at the same time by separating the same, and to provide a printed circuit board that maximizes the efficiency of signal transmission by connecting each layer to the filling bump using bump structure and via hole filling.

The configuration according to the manufacturing process of the present invention for this purpose, the first step of forming at least one inner layer on both sides of the removable carrier having a structure in which the copper foil double layer is laminated on both sides of the insulating layer; Separating the removable carriers to form a separate inner layer group; To provide a method of manufacturing a stack-type printed circuit board having a bump comprising a; three steps of forming the outermost base layer formed with the filling hole of the via-hole filling method on the outer side of the separate inner layer group.

In addition, the configuration of the first step, 1a) forming a base layer including a primary bump on the detachable carrier and 1b) a second bump pad, a secondary bump, an insulating layer on the base layer 2 Preferably, the step of forming the vehicle inner layer includes repeating at least one or more steps.

In addition, the formation of the first bump or the second bump of the first step of forming the interlayer connection structure of the inner layer may be implemented by implementing the bump structure by plating after patterning the photosensitive material (DFR), in particular in this case The secondary bump pad structure of step 1b) may be formed as a single layer, but the secondary bump pad may be any one or two or more alloy layers selected from Cu, Ni, Cr, Au, Ag, Pb, and Pd. It is also possible to form by patterning. In addition, the secondary bump pad may be formed by stacking and patterning an alloy deposition layer, a Cu deposition layer, and a Cu plating layer for surface treatment on the base layer to form a triple structure.

In addition, the second step according to the present invention, in the laminated structure of the copper foil double layer of the detachable carrier, by removing the primary copper foil layer in close contact with the insulating layer to form a separate inner layer group.

The third step of proceeding the process after the separate separated inner layer group in a simultaneous process, 2a) forming a surface treatment layer on the separated inner layer group, and forming a filling bump pad on the outer surface of the separated inner layer group; 2b) forming an outermost base layer by laminating an insulating layer on the filling bump pad; 2c) processing via holes in the outermost base layer to form filling bumps; 2d) forming a circuit pattern on an outer surface of the outermost base layer; Characterized in that comprises a.

In particular, the surface treatment layer for implementing the above-described filling bump pad may be formed by forming a metal layer as a single layer, but further by implementing three surface treatment, the surface treatment layer is an alloy deposition layer, Cu deposition layer, Cu The plating layer may be formed in a stacked structure.

Filling bumps implemented in the outermost base layer may be performed by the step 2c) of filling the via holes through Cu plating after processing the via holes using a laser drill.

A printed circuit board capable of being manufactured through two manufacturing processes at the same time may be formed as follows.

That is, the printed circuit board according to the present invention may include at least one inner layer having bump pads and bumps inside the insulating material layer and connected to each layer; An outermost base layer formed on the outer shell and connected to the filling bump filling the inner layer and the via hole; It may be configured as a stacked printed circuit board having a bump including a; circuit pattern formed on the outermost base layer.

In addition, the inner layer constituting the printed circuit board according to the present embodiment, the base layer having a primary bump in the insulating layer; and the secondary bump pad and the secondary bump formed on the base layer and connected to the primary bump It may be configured to include at least one or more secondary inner layer having. That is, in the case of the secondary inner layer, it may be implemented in a plurality of layers.

In particular, the outermost base layer is formed on the outer shell of the inner layer, characterized in that formed on the outer shell of the base layer and the secondary inner layer and has a filling bump pad and a filling bump, the bump structure formed on the inner layer It is characterized in that the cross section is rectangular or square. It is preferable that the structure of the filling bump is trapezoidal in cross section.

In addition, the filling bump pad formed on any one of the secondary bump pad and the two outermost base layer of the present invention, may be formed of a laminated structure of an alloy deposition layer, Cu deposition layer, Cu plating layer.

According to the present invention, by using a separate carrier having primary and secondary copper foil layers formed on both sides of the insulating layer, two stacked printed circuit boards are simultaneously formed in one process to shorten the manufacturing process and improve productivity. It is effective to improve.

Particularly, bumps are formed to form a base layer, and the inner layer is realized through continuous lamination, and the outermost layer uses a via hole filling method to shorten the manufacturing process, improve interlayer adhesion, and minimize signal transmission resistance. This makes it possible to provide a printed circuit board having a highly reliable stack via.

In particular, the stack via structure of the inner layer substrate may be realized as a bump structure, but the cross-section may be implemented as a rectangular structure, and thus the advantage of improving the efficiency of the product may be realized by enabling more precise and more minute circuits in the same area.

Hereinafter, with reference to the accompanying drawings will be described in detail the configuration and operation according to the present invention. In the description with reference to the accompanying drawings, the same components are given the same reference numerals regardless of the reference numerals, and duplicate description thereof will be omitted. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.

In the present invention, in manufacturing a stacked printed circuit board having bumps, two printed circuit boards can be simultaneously manufactured using a separate carrier having a structure in which primary and secondary copper foil layers are formed on both sides of an insulating layer. In particular, the gist of the present invention is manufactured using a method of filling and filling a via hole in an inner layer and an outermost shell connected to a bump structure therein.

(1) Example of Manufacturing Process

Figures 2a to 2d schematically show a flow chart and process diagram of the manufacturing process of the preferred embodiment according to the present invention.

The manufacturing process of the printed circuit board according to the present invention is characterized in that the laminated structure of the printed circuit board is formed on both sides of the separation carrier at the same time, and specifically, the separation type carrier having the structure in which the copper foil double layer is laminated on both sides of the insulating layer. Step 1 of forming at least one inner layer on both sides and the separation of the removable carrier to form a separate inner layer group, and forming the outermost base layer formed with the filling hole of the via hole filling method on the outer surface of the removable inner layer group It consists of three steps.

As in step S1, in particular, the removable carrier according to the present invention preferably has a structure in which the primary copper foil layer 111 and the secondary copper foil layer are stacked on both sides of the insulating layer 110 such as prepreg. The primary copper foil layer 111 is formed in close contact with the insulating layer, the secondary copper foil layer has a structure that is formed in close contact with the primary copper foil layer, and furthermore, the secondary copper foil layer is formed to the thickness of the primary copper foil layer or more It is preferable. For example, the primary copper foil layer 111 may have a thickness of 1 to 3 μm, and the secondary copper foil layer 112 may have a thickness of 3 to 20 μm.

Next, in step S2, the primary bumps 120 are formed on both sides of the split carrier. The formation of the first bump may be realized by implementing a pattern by exposure and development using a dry film resist (DFR) and then filling a metal material into the pattern using electroplating. Of course, before the DFR is peeled off after plating, a process of chemical or mechanical polishing may be added to control the height of the appropriate bumps.

In step S 3, an insulating layer is formed on the first bump 120. An insulating layer having primary bumps is defined as a 'base layer'. The process of forming the insulating layer may be performed in the following order. Specifically, when the primary bump 120 is formed by plating, the DFR is peeled off, the prepreg sheet and the copper thin film layer are laminated, and then pressed by heat and pressure, and then the copper thin film layer is etched and removed. Can be implemented in In this case, the copper thin film layer serves to facilitate the flow and spreadability of the resin during the pressing process due to heat and pressure. Of course, even in this case, after removing the copper thin film layer, it is possible to implement the appropriate bump height by performing mechanical or chemical polishing to make the height of the bumps constant.

In step S 4 to S 5, the second bump pad 132 and the second bump 130 are formed on the base layer, and the insulating layer is stacked again. The structure in which the secondary bump pad 132, the secondary bump 130, and the insulating layer 131 are stacked is defined as a 'secondary inner layer'. The secondary inner layer may be formed of a plurality of layers, in which case the process of S 4 ~ S 5 may be repeated.

Next, in step S6, a process of separating the product into two by removing the detachable carrier is performed. Each separated structure is defined as a 'separable inner layer group.' The separation of the product is a process of separating the secondary copper foil layer and the insulating layer into two 'separable inner layer groups'. Since the process is a process of the two products of the separate inner layer group is carried out at the same time, the following process will be described with only one product (A).

Step S7 is then formed on the upper surface of the separate inner layer group (A) to form a Cu plating layer to form the filling bump pad 142. This is done at the same time on the upper and lower portions of the separated inner layer group, in particular, it can be implemented by patterning after plating on the secondary copper foil layer 112 of the separated carrier remaining on the bottom. Alternatively, the secondary copper foil layer 112 may be removed first, and the filling bump pad 142 may be formed by newly forming a Cu plating layer.

In step S 8, an insulating layer 141 is stacked on the filling bump pad 142. Although not shown, the Cu layer may be stacked on the insulating layer 141.

 In step S 9, the via hole H is processed to expose the upper surface of the filling bump pad 142 using a laser drill.

Thereafter, in step S 9, the via hole H is filled with a conductive material through plating to form a filling bump 140. A layer including the filling bump pad 142, the insulating layer 141, and the filling bump 140 formed thereafter is defined as an 'outermost base layer'.

Thereafter, a circuit pattern is formed at the outermost part of the outermost base layer (S 10).

In the above process, the two separate inner layer groups proceed in a simultaneous process, thereby improving productivity.

(2) Another embodiment of the formation of the secondary bump pad and the filling bump pad

In the above-described manufacturing process, the secondary bump pads 132 and the filling bump pads 142 formed after the formation of the base layer are all described as being formed of a single layer of a single material in the illustrated process. However, step S 4, which is a process of forming the secondary bump pad 132, and step S 7, which is a process of forming the filling bump pad, may be performed as follows. That is, in forming the second bump pad 132 and the filling bump pad 142, the pads may be formed of a multi-layered pad instead of a single layer.

 That is, an inner circuit layer (0.1-50 μm), that is, a surface treatment layer, is formed on the secondary bump pad and the filling bump pad base layer, respectively, and an alloy deposition layer, a Cu deposition layer, and a Cu plating layer are patterned to form a triple structure. can do. Specifically, after the alloy deposition layer, the Cu deposition layer, and the Cu plating layer are laminated, respectively, DFR is applied and a pattern is formed to pattern the secondary bump pads. The secondary bump pads form the secondary bumps 130 and at the same time implement the inner layer circuit. The alloy deposition layer may be formed of an alloy of at least two or more metals selected from Ni, Cr, Au, Ag, Pb, and Pd. In one example, the alloy deposition layer is to deposit an alloy of Ni, Cr, to improve the adhesion between the Cu plating layer and the epoxy layer laminated first. In addition, the alloy deposition layer is preferably formed in 0.05 ~ 0.1㎛. In addition, the Cu deposition layer performs a function of improving the bonding strength between the alloy deposition layer and the above-described Cu plating layer. Thereafter, a Cu plating layer serving as an inner layer circuit is formed on the Cu plating layer.

After applying and patterning the DFR on the Cu plating layer, the inner circuit layer, which is the uppermost layer of the secondary bump pad, by the same method as the method of forming the first bump, the secondary bump is formed by plating, and then the DFR is not peeled off. Mechanical and chemical polishing can be performed at. Filling bump pad can also be formed in the above-described structure is a matter of course. However, in forming the filling bump pad, when forming the filling bump of the triple structure on the surface including the secondary copper foil layer of the removable carrier, it may be configured to include the secondary copper foil layer.

3 is a conceptual diagram illustrating a structure of a printed circuit board according to the above-described manufacturing process.

The printed circuit board according to the present invention includes a bump pad and a bump inside the insulating material layer, and is formed on at least one inner layer to which each layer is connected and the filling bumps filled in the inner layer and the via hole by filling the inner layer and the outer layer. And an outermost base layer and a circuit pattern formed on the outermost base layer.

Specifically, the inner layer includes a base layer composed of a primary bump 120 and an insulating layer 121, and includes a primary bump pad 132, a primary bump 130, and an insulating layer 131. It is formed including a car inner layer, the secondary inner layer may be formed of a plurality of layers.

In addition, the base layer and the secondary inner layer may be electrically connected to the bumps and the respective bump pads, and the filling bump pad 142 and the insulating layer 141 and the filling bump 140 are formed at the outer sides of the base layer and the secondary inner layer. The outermost base layer may be formed.

In addition, a circuit pattern 150 is formed on the outermost base layer surface.

The printed circuit board of the above structure is connected to the inner layer so as to be in electrical communication through a square or rectangular bump, and the inner layer and the filling bump pad and the filling bump pad formed by via hole processing with the outermost base layer. It can be a connection. The filling bump has a trapezoidal shape in which filling is performed in a via hole subjected to mechanical processing such as a laser drill.

Referring to FIG. 4, FIG. 4 illustrates a result of forming a plurality of stacked structures of the secondary bump pads 132 and the filling bump pads 142 and 143 in the above-described structure of the printed circuit board. It is. In either case, the alloy deposition layers 132a, 142a and 143a, the Cu deposition layers 132b, 142b and 143b, and the Cu plating layers 132c, 142c and 143c are stacked in a sequential layer structure. However, in the case of the filling bump pad 143 adjacent to the lower portion of the primary bump, the Cu layer 112 may be further formed on the contact surface with the primary bump. This corresponds to the secondary copper foil layer 112 of the removable carrier in the above-described manufacturing process. The constituent material of the alloy deposition layer may be formed of an alloy of at least two or more metals selected from Ni, Cr, Au, Ag, Pb, and Pd, as described above in the manufacturing process.

In the foregoing detailed description of the present invention, specific examples have been described. However, various modifications are possible within the scope of the present invention. The technical idea of the present invention should not be limited to the embodiments of the present invention but should be determined by the equivalents of the claims and the claims.

1A and 1B are conceptual views and process diagrams of a manufacturing process of a printed circuit board according to the prior art.

2A to 2C are conceptual diagrams and process diagrams of a manufacturing process according to an embodiment of the present invention.

3 and 4 are conceptual views of the main part of the structure of the printed circuit board according to the manufacturing process of the present invention.

Claims (18)

At least one each comprising a bump and an insulating layer on both sides of a separate carrier having a structure in which a primary copper foil layer tightly formed on the insulating layer and a secondary copper foil layer tightly formed on the primary copper foil layer with a thickness greater than or equal to the primary copper foil layer are laminated on both sides. 1 step of forming the above inner layer; Separating the removable carriers to form a separate inner layer group; A third step of forming an outermost base layer having a filling hole of a via hole filling method on an outer surface of the separate inner layer group; Including; Fabrication of a bump-type stacked printed circuit board comprising at least one secondary bump pad or a filling bump pad in which an alloy deposition layer, a Cu deposition layer, and a Cu plating layer are stacked between each bump of the at least one inner layer. Way. The method according to claim 1, The first step, 1a) forming a base layer including a primary bump on the detachable carrier; 1b) forming a secondary inner layer including a secondary bump pad, a secondary bump, and an insulating layer on the base layer at least one or more times; Method of manufacturing a stack-type printed circuit board having a bump comprising a. The method according to claim 2, Forming the first bump or the second bump of the first step is a method of manufacturing a stacked printed circuit board with bumps, characterized in that to implement a bump structure by plating after patterning the photosensitive material (DFR). The method according to claim 2, Wherein the step 1b), the secondary bump pad patterning any one or two or more alloy layers selected from Cu, Ni, Cr, Au, Ag, Pb, Pd to form the alloy deposition layer; Method of manufacturing a stacked printed circuit board having a bump, characterized in that. delete The method according to claim 1, The second step, In the laminated structure of the copper foil double layer of the separate carrier, the step of forming a separate inner layer group by removing the primary copper foil layer in close contact with the insulating layer, characterized in that the manufacturing method of a stacked printed circuit board with a bump. The method according to claim 6, The third step, 2a) forming a surface treatment layer on the separable inner layer group, and forming a filling bump pad on an outer surface of the separable inner layer group; 2b) forming an outermost base layer by laminating an insulating layer on the filling bump pad; 2c) processing via holes in the outermost base layer to form filling bumps; 2d) forming a circuit pattern on an outer surface of the outermost base layer; Method of manufacturing a stacked printed circuit board having a bump, characterized in that comprises a. The method of claim 7, The surface treatment layer is a manufacturing method of a stack-type printed circuit board having a bump, characterized in that for depositing an alloy deposition layer, Cu deposition layer, Cu plating layer. The method of claim 7, Wherein step 2c), after processing the via hole using a laser drill, the method for manufacturing a printed circuit board having a bump, characterized in that the step of filling the via hole through Cu plating. At least one inner layer having bump pads and bumps inside the insulating material layer, to which each layer is connected; An outermost base layer formed on the outer shell and connected to the filling bump filling the inner layer and the via hole; Including; a circuit pattern formed on the outermost base layer; The bump pad A bump-type stacked printed circuit board having a structure including at least one secondary bump pad or a filling bump pad in which an alloy deposition layer, a Cu deposition layer, and a Cu plating layer are stacked between each bump of the at least one inner layer. . The method according to claim 10, The inner layer is, A base layer having a primary bump in the insulating layer; And at least one secondary inner layer having a secondary bump pad and a secondary bump formed on the base layer and connected to the primary bump. The method of claim 11, The outermost base layer is, Stacked printed circuit board having bumps formed on an outer surface of the base layer and the secondary inner layer and having a filling bump pad and a filling bump. The method according to any one of claims 10 to 12, The bump structure formed on the inner layer is a stacked printed circuit board, characterized in that the cross section is rectangular or square. 14. The method of claim 13, Stacked printed circuit board, characterized in that the filling bump structure has a trapezoidal cross section. delete delete delete delete

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