KR101075478B1 - A build-up printed circuit board with via-holes of stack type using bump structure and Manufacturing method of the same, Detachable Carrier using manufacturing method of the same - Google Patents

Abstract

The present invention relates to a method of manufacturing a stacked printed circuit board having bumps, the method comprising the steps of forming at least one inner layer on both sides of a separate carrier and forming an outermost base layer on the outer side of the inner layer and the separated carrier. Stacked printing with bumps comprising two steps of removing and separating the inner layer into a separate inner layer group, and forming an outermost base layer in which a filling bump is formed in a via hole filling method on an outer side of the separated inner layer group. Provided is a method of manufacturing a circuit board.

According to the present invention, in stacking multilayer boards, two stacked printed circuit boards are simultaneously formed in one process using separate carriers to shorten the manufacturing process and improve productivity. Particularly, bumps are formed to form a base layer, and the inner layer is realized through continuous lamination, and the outermost layer uses a via hole filling method to shorten the manufacturing process, improve interlayer adhesion, and minimize signal transmission resistance. This makes it possible to provide a printed circuit board having a highly reliable stack via.

Printed circuit board, bump, via hole filling

Description

A build-up printed circuit board with via-holes of stack type using bump structure and manufacturing method of the same, Detachable Carrier using manufacturing method of the same}

The present invention relates to a method for manufacturing a printed circuit board implemented in a multi-layer and a printed circuit board manufactured accordingly.

A printed circuit board (PCB) is a printed circuit board pattern formed of a conductive material such as copper on an electrically insulating substrate, and refers to a board immediately before mounting an electronic component. In other words, in order to mount many kinds of electronic components on a flat plate, it means a circuit board in which a mounting position of each component is determined and a line pattern connecting the components is printed and fixed on the flat surface. Such printed circuit boards generally include a single-layer PCB and a build-up board in which multilayered PCBs are formed, that is, multilayer PCB substrates.

These build-up boards and multilayer PCB boards can manufacture boards and evaluate the quality of the boards one by one, thereby increasing the yield of the entire multilayer PCB board, and precisely connecting the interlayer wirings to produce high-density compact PCBs. To make it possible.

In this build-up process, a connection line of wiring is formed between layers, and the layers are connected through via holes. In order to form such a via hole, a very fine diameter can be realized using a laser rather than a conventional mechanical drill.

Specifically, the method of forming a via hole of the build-up board is implemented by a stack via method in which vias are stacked on vias, and the formation of the stack vias is printed. It is considered to be a very important core technology in the manufacture of multilayer PCB because the circuit design of the circuit board can be facilitated, the wiring length of the circuit can be shortened, the electrical operation ability is improved, and the circuit density can be increased. In order to form a stack via, very precise alignment of via holes is required, and circuit line width and fine design standards of via holes are required for high density, which makes it difficult to process.

In order to form such a stack via, laser holes have been used to process via holes in insulating materials constituting each layer of a printed circuit board, and to fill the via holes with metallic paste. Later, the copper metal foil is laminated on the surface of the insulating material by a hot press method, and a circuit is formed by a patterning method using a photoresist to complete one layer. After forming each layer in this manner, finely aligning their positions, and again by lamination using a hot press to form a build-up board (Build-up Board). 1A and 1B, the via hole 11 is processed in the insulating material 10 using a laser drill (S 1), a plating layer is formed in the via hole, and the metal paste is filled (S 2). ). Thereafter, a copper foil 13 for forming a circuit pattern is formed on the upper surface of the insulating material 10 (S 3), and the copper foil 13 is processed to form a circuit pattern 14, thereby completing one layer (S). 3).

Thereafter, the second dynamic laminated plate 13 and the third dynamic laminated plate are aligned to form a build-up board having a stack via through thermal compression (S 4 to S 5).

However, the processing of the via hole for forming the multilayer stack via is performed by using a fine laser drill. In this case, the via hole must be formed separately in each layer. Problem occurs. In addition, when the conductive metal paste is filled to transmit the electrical signal of the via hole, a high electrical resistance of the metal paste may cause a lot of noise. Therefore, this manufacturing method is difficult to be applied to a product that requires high reliability. .

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to manufacture two stacked printed circuit boards simultaneously in one process using a separate carrier in stacking a multilayer board. It is to provide a manufacturing process that shortens the process and improves the productivity.

Furthermore, the present invention provides a manufacturing process as described above, to form a bump to form a base layer, to implement the inner layer through the continuous lamination, the outermost layer is shortened the manufacturing process by applying a via hole filling method and At the same time, an object of the present invention is to provide a printed circuit board having a stack via of high reliability by improving interlayer adhesion and minimizing signal transmission resistance.

In addition, the stack via structure of the inner layer substrate may be realized as a bump structure, but the cross section may be implemented in a rectangular structure, so that a fine circuit can be realized more precisely and more in the same area, thereby increasing the efficiency of the product and printing accordingly. It is an object to provide a circuit board.

The present invention, in order to solve the above-mentioned problems, forming at least one inner layer on both sides of the removable carrier, the first step of forming the outermost base layer on the outer surface of the inner layer; Removing the separated carrier to separate the inner layer into a separated inner layer group; Forming an outermost base layer having a filling bump formed in a via hole filling method on an outer surface of the separated inner layer group; It provides a method of manufacturing a stack-type printed circuit board having a bump comprising a.

In particular, the separation type carrier of the first step applied to the present invention is characterized in that the copper foil composite is bonded to both sides of the release film.

The first step in the above-described manufacturing process includes: 1a) forming a base layer including a primary bump on the second separated carrier; 1b) forming a secondary bump pad and a secondary bump on the base layer; 1c) forming an outermost base layer by laminating an insulating layer on the secondary bumps and forming a copper foil layer; It may be formed to include. Particularly, step 1a) includes: a1) forming a circuit pattern by patterning an outer copper layer of the second separated carrier; a2) forming a seed layer on the circuit pattern; a3) forming a primary bump on the seed layer through plating; And removing the seed layer.

In addition, the step 1b), b1) laminating an insulating layer on the base layer; b2) forming at least one surface treatment layer on the insulating layer; b3) patterning the surface treatment layer to form secondary bump pads and forming secondary bumps thereon; The inner layer forming step may be formed by a method for manufacturing a stacked printed circuit board having bumps including a step of repeating at least one time.

Formation of the secondary bumps and the filling bumps during the manufacturing process according to the present invention is characterized in that the bump structure is implemented by plating after patterning the photosensitive material (DFR). In addition, after plating to form the secondary bumps and the filling bumps, a process of performing mechanical or chemical polishing and peeling the photosensitive material may be added.

The second step in the present invention may be configured to remove the release film constituting the second separation type carrier to form a second separation type inner layer group.

In addition, the step 3, 2a) forming a via hole in the outermost base layer; 2b) filling the via holes to form filling bumps; 2c) forming a circuit pattern on the copper plating layer in close contact with the filling bumps; . ≪ / RTI > In particular, step 2a) is a step of processing via holes using a laser drill.

According to the manufacturing process according to the present invention described above, it is possible to manufacture a printed circuit board having the following structure.

Specifically, the printed circuit board manufactured by the present invention includes at least one inner layer to which each layer is connected by having a bump inside the insulating material layer; An outermost base layer formed on the outer shell and connected to the filling bump filling the inner layer and the via hole; And a circuit pattern formed on the outermost base layer, wherein at least one of the outermost base layers includes a filling bump pad that connects the filling bump to the bump of the inner layer.

In particular, the inner layer in the above-described printed circuit board, the base layer having a primary bump pad and the primary bump in the insulating layer; And a secondary bump pad formed on the base layer and having at least one secondary inner layer having a secondary bump pad and a secondary bump connected to the primary bump in an insulating layer, wherein the filling bump is connected to the secondary bump pad. The filling bump pad is preferably formed.

In any case, the first bump and the second bump of the printed circuit board according to the present invention may have a rectangular or square shape in cross section.

In addition, the secondary bump pad and the filling bump pad of the printed circuit board according to the present invention are preferably formed of a laminated structure of an alloy deposition layer, a Cu deposition layer, and a Cu plating layer. In particular, in this case, the alloy deposition layer is preferably formed of an alloy of at least one metal selected from Ni, Cr, Au, Ag, Pb, and Pd. In addition, the filling bump may also have a trapezoidal cross section.

According to the present invention, in stacking multilayer boards, two stacked printed circuit boards are simultaneously formed in one process using separate carriers to shorten the manufacturing process and improve productivity.

Particularly, bumps are formed to form a base layer, and the inner layer is realized through continuous lamination, and the outermost layer uses a via hole filling method to shorten the manufacturing process, improve interlayer adhesion, and minimize signal transmission resistance. This makes it possible to provide a printed circuit board having a highly reliable stack via.

In particular, the stack via structure of the inner layer substrate may be realized as a bump structure, but the cross-section may be implemented as a rectangular structure, and thus the advantage of improving the efficiency of the product may be realized by enabling more precise and more minute circuits in the same area.

Hereinafter, with reference to the accompanying drawings will be described in detail the configuration and operation according to the present invention. In the description with reference to the accompanying drawings, the same components are given the same reference numerals regardless of the reference numerals, and duplicate description thereof will be omitted. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.

According to the present invention, in manufacturing a stacked printed circuit board having bumps, two printed circuit boards can be simultaneously manufactured using a separate carrier, and in particular, via holes are processed in an inner layer and an outermost part connected to a bump structure therein. The manufacturing method using the method of filling by the above is made into the summary.

2a to 2c schematically show a flowchart and a process diagram of the manufacturing process of the preferred embodiment according to the present invention.

Example

2A to 2C, in the present embodiment, a manufacturing process is performed using a separate carrier.

In particular, the removable carrier used in the present invention has a structure in which a copper foil composite is attached to both sides of the release film through a release film capable of separating both sides, which is defined as a 'separable carrier'.

In this case, the release film loses the adhesive strength at a specific temperature or external specific stress and chemical penetration, and serves to separate the adhesive strength. In addition, the detachable carrier has an insulator (prepreg) formed inside the copper foil composite on both sides of the release film, so that the strength of the product is higher than when the single product proceeds to facilitate processability, the product through the simultaneous double-sided product The manufacturing makes it possible to realize productivity and process cost effects.

In particular, in this embodiment, after forming the inner layer and the outermost base layer on both sides of the separate carrier at the same time, the separation process, via hole processing, filling process is performed.

Specifically, the first step of forming at least one inner layer on both sides of the removable carrier, the outermost base layer on the outer surface of the inner layer, the second step of removing the separated carrier to separate the inner layer into a separate inner layer group, the The entire process can be outlined in three steps to form the outermost base layer in which the filling bumps are formed in the via hole filling method on the outer shell of the separated inner layer group.

(1) Step 1-Separate carrier + inner layer + outermost base layer

First, a separate carrier is formed (P1). The removable carrier C2 has a structure in which a copper foil composite is bonded to both surfaces of the release film 210 as described above. The copper foil composite refers to a structure in which copper foils 221a and 221b are formed on both surfaces of an insulator 220 such as a prepreg. Formation of the separate carrier can be produced through the process of laminating the material for each layer, pressing through heat and pressure.

In step P2, the first bump pads 221a and the first bumps 230 serving as circuits are formed. The first bump pads 221a are coated with a DFR, patterned, and then etched to form a circuit pattern. It can be implemented by forming, and after forming the first bump pad 221a, a seed layer (231, seed layer) for forming the first bump 230 is implemented by plating or deposition.

Subsequently, the first bump pad 221a and the seed layer 231 are formed by applying a pattern to DFR and exposure, and filling a metal material into the pattern through electroplating to form the first bump 230. do. Of course, mechanical or chemical polishing may be performed to manage the proper bump height after primary bump formation and before DFR exfoliation. The DFR is then peeled off and the seed layer 231 is removed by flash etching.

After that, the insulating layer 232 is stacked (P 3 step).

The layer including the first bump 230, the first bump pad 221a, the seed layer 231, and the insulating layer 232 is called a base layer. When the first bump 230 is formed, the insulating layer 232 is peeled off the DFR, the prepreg sheet and the copper thin film layer are laminated, and then pressed by heat and pressure, and then the copper thin film layer is etched. It can be implemented by removing it. In this case, the copper thin film layer serves to facilitate the flow and spreadability of the resin during the pressing process due to heat and pressure. Of course, even in this case, after removing the copper thin film layer, it is possible to implement the appropriate bump height by performing mechanical or chemical polishing to make the height of the bumps constant.

Step P4 is to perform a surface treatment for the secondary bumps on the base layer, and the second bump pad implemented as an alloy deposition layer 241, a Cu deposition layer 242, and a Cu plating layer 243 through patterning. 240 is formed.

In order to form the secondary bump pad 240, an inner circuit layer (0.1 to 50 μm), that is, a surface treatment layer is formed on the base layer. The surface treatment layer forms an alloy deposition layer 241, a Cu deposition layer 242, and a Cu plating layer 243 on the base layer. After lamination, the second bump pad 240 is patterned by applying DFR and forming a pattern.

The secondary bump pad 240 forms a secondary bump and implements an inner layer circuit. The alloy deposition layer 241 may be formed of an alloy of at least one metal selected from Ni, Cr, Au, Ag, Pb, and Pd. For example, by depositing an alloy of Ni and Cr as the alloy deposition layer 241, the adhesion between the Cu-plated layer 243 and the first laminated epoxy layer is improved in the future. The alloy deposition layer 241 is preferably formed in 0.05 ~ 0.1㎛.

In addition, the Cu deposition layer 242 serves to improve the bonding strength between the above-described alloy deposition layer 241 and the Cu plating layer 243 to be formed in the future. Thereafter, a Cu plating layer 243 is formed on the Cu deposition layer 242 to serve as an inner layer circuit.

Subsequently, the secondary bumps 250 are formed through plating in a P 5 step.

In step P5, DFR is applied and patterned on the Cu plating layer 243, which is the innermost circuit layer of the second bump pad 240, in the same manner as the method of forming the first bump. 250), and then mechanical and chemical polishing can be performed before the DFR is stripped off.

The insulating layer 251 is laminated in step P6. Here, the layer including the insulating layer 251, the secondary bump pads 240, and the secondary bumps 250 is defined as a secondary inner layer. In the present invention, at least one such secondary inner layer may be provided.

In step P7, the filling bump pads 260 are formed on the secondary inner layer formed in step P6, and in step P8, the insulating layer 281 and the copper foil layer 282 are formed on the filling bump pads 260. Laminated to complete the outermost base layer.

(2) Split carrier removal-Split inner layer group formation

Thereafter, the release film 210 of the separate carrier is separated to form two separate inner layer groups (P 9).

(3) Via hole processing and filling pad formation

Step P 10 will be described as an example of a process in which two separate inner layer groups proceed simultaneously or one separate inner layer group. Thereafter, via holes (H) are processed through a laser. Thereafter, the via hole is filled by plating to form a filling pad 270 (P 11), and a circuit pattern is formed after mechanical or chemical processing (P 12).

The characteristic of this structure is that the structure inside the outermost base layer formed outside the base layer and the primary inner layer is different from the uppermost outermost base layer and the lowermost outermost base layer.

That is, the uppermost outermost base layer has a structure in which the secondary bumps 250 and the filling bumps 270 may be electrically connected to each other through the filling bump pad 260, but the lowermost outermost base layer has the primary bumps 230. The first bump pad 221a and the filling bump 270 are connected to each other. That is, the lower outermost base layer has a structure in which no filling bump pad is formed.

3. Another example of the formation method of the filling pad

In the present invention, a method for forming a surface treatment layer, and forming a secondary bump pad or a filling bump pad having a three-layer structure includes stacking three alloy deposition layers, a Cu deposition layer, and a Cu plating layer, and collectively applying DFR. By patterning through, it can be implemented as described above.

However, another embodiment of forming the surface treatment layer and forming a pad structure having a three-layer laminated structure will be described as compared with the process of step P3 to step P6 of the above embodiment.

2D and 2E, the diagram of step Q1 illustrates that the alloy deposition layer 241 and the Cu deposition layer 242 are formed on the base layer after the process of step P3 is completed.

Subsequently, in step Q2, a DFR (D3) is coated and patterned on the Cu deposition layer 242 to form a mask for the Cu plating layer, and then a Cu plating layer 243 is formed (Q3). That is, the Cu plating layer 243 is previously formed in a pattern for forming the secondary bump pad of the secondary inner layer.

Thereafter, in step Q4, the DFR (D3) is peeled off, and then in step Q5, the DFR (D4) is applied, and a pattern for forming the second bump 250 is formed, and then the second bump 250 through plating. It is formed by filling.

In step Q6, the DFR (D4) is removed, and in step Q7, the alloy deposition layer 241 and the Cu deposition layer 242 are etched to complete the secondary bump pad 240.

The bump pad of the three-layer structure can be implemented by the above-described method, and the above-described method can be modified in common to both the first and second embodiments.

Subsequently, a process Q 9 may be added to stack the insulating layer 251 as in step Q8 and to appropriately form a bump height through mechanical or chemical polishing.

Referring to Figure 3 will be described the structure of the printed circuit board manufactured by the manufacturing process according to the present invention.

The printed circuit board according to the present invention includes at least one inner layer having bumps inside the insulating material layer and at least one inner layer to which each layer is connected, and an outermost base formed at the outer layer to fill the inner layer and the via hole. The layer may have a structure including a circuit pattern formed on the outermost base layer.

In particular, the base layer has a structure consisting of a primary bump pad 221a, a primary bump 230, and an insulating layer, and the bump pad 240 and the bump 250 having the triple structure described above on the base layer. At least one secondary inner layer formed of an insulating layer is formed.

Filling bump pads 260 and filling bumps 270 are formed on the outermost base layer in the outermost layer of the secondary structure in terms of the outermost base layer. The outermost base layer has a filling bump and a circuit pattern connected to the primary bump 221a. That is, the triple bump pad pad formed in the outermost base layer may be formed in a structure formed only on the upper side of the laminated structure of the secondary inner layer.

In the foregoing detailed description of the present invention, specific examples have been described. However, various modifications are possible within the scope of the present invention. The technical spirit of the present invention should not be limited to the described embodiments of the present invention, but should be determined not only by the claims, but also by those equivalent to the claims.

1A and 1B are conceptual views and process diagrams of a manufacturing process of a printed circuit board according to the prior art.

2A to 2C are conceptual diagrams and process diagrams of a manufacturing process according to an embodiment of the present invention.

3 is a schematic view of the main part of a structure of a printed circuit board according to a manufacturing process of the present invention.

Claims (15)

Forming at least one inner layer on both sides of the detachable carrier having a structure in which the copper foil composite is bonded to both sides of the release film, and forming an outermost base layer on the outer side of the inner layer; Removing the separated carrier to separate the inner layer into a separated inner layer group; Forming an outermost base layer having filling bumps formed in a via hole filling method on an outer surface of the separated inner layer group; Including, The first step, 1a) forming a base layer including a primary bump on the split carrier; 1b) forming a secondary bump pad and a secondary bump on the base layer; 1c) forming an outermost base layer by laminating an insulating layer on the secondary bumps and forming a copper foil layer; Method of manufacturing a stack-type printed circuit board having a bump comprising a. delete delete The method according to claim 1, Forming the secondary bumps and the filling bumps, the method of manufacturing a stacked printed circuit board with bumps, characterized in that to implement a bump structure by plating after patterning the photosensitive material (DFR). The method according to claim 4, After the plating process for the formation of the secondary bumps and the filling bumps, a method of manufacturing a stacked printed circuit board with bumps, characterized in that to perform mechanical or chemical polishing and peeling the photosensitive material. The method of claim 1, wherein the second step, Removing the release film constituting the removable carrier to form a separate inner layer group forming a stack-type printed circuit board having a bump, characterized in that the step. The method according to claim 6, The third step, 2a) forming via holes in the outermost base layer; 2b) filling the via holes to form filling bumps; 2c) forming a circuit pattern on the copper plating layer in close contact with the filling bumps; Method of manufacturing a stacked printed circuit board having a bump, characterized in that comprises a. A base layer having a primary bump pad and a primary bump in an insulating layer, and formed on the base layer, the secondary bump pad being connected to the primary bump and at least one secondary inner layer having a secondary bump; Inner layer; An outermost base layer formed on the outer shell and connected to the filling bump filling the inner layer and the via hole; Including; a circuit pattern formed on the outermost base layer; In any one of the outermost base layer, Filling bump pad is provided to connect the filling bump and the bump of the inner layer, The filling bump pad is formed in the filling bump connected to the secondary bump pad, The secondary bump pad and the filling bump pad, Stacked printed circuit board with bumps, characterized in that formed in a laminated structure of an alloy deposition layer, Cu deposition layer, Cu plating layer. delete The method according to claim 8, The first bump and the second bump is a stacked printed circuit board having a bump, characterized in that the cross-section is rectangular or square shape. delete The method according to claim 8, The alloy deposition layer, A stack type printed circuit board having bumps, wherein the bumps are formed of an alloy of at least one metal selected from Ni, Cr, Au, Ag, Pb, and Pd. The method according to claim 8, The filling bump is a stacked printed circuit board having a bump, characterized in that the cross-section is trapezoidal. delete delete

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