CN113921491A - 芯片、电路板及电子设备 - Google Patents
芯片、电路板及电子设备 Download PDFInfo
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- CN113921491A CN113921491A CN202010653933.6A CN202010653933A CN113921491A CN 113921491 A CN113921491 A CN 113921491A CN 202010653933 A CN202010653933 A CN 202010653933A CN 113921491 A CN113921491 A CN 113921491A
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Abstract
本公开是关于芯片、电路板及电子设备。芯片包括芯片基板和阵列设置在芯片基板上的多个焊盘。将芯片上的焊盘设置为多边形焊盘,通过焊盘形状的改变有助于缩短相邻焊盘之间的间距,因而减小了芯片尺寸。此外,多边形焊盘阵列的直线边加强了焊盘对抗应力的能力,增加了焊盘本身的结构强度以及焊盘与锡球的焊接强度,防止焊盘及锡球在测试和使用中因撞击、跌落等情况导致的断裂,提升了芯片、电路板及电子设备的轻薄性。
Description
技术领域
本公开涉及电子技术领域,尤其涉及芯片、电路板及电子设备。
背景技术
在相关技术中,例如手机等电子设备内部的通常包含用于实现各种功能的芯片,芯片上的电子元器件和控制线路通过焊盘及焊接在焊盘上的锡球实现封装。然而,随着芯片功能的逐渐丰富,单位尺寸内芯片封装线路的越来越复杂,导致芯片的整体尺寸增加,影响了芯片及电子设备的整体轻薄性。
发明内容
本公开提供一种芯片、电路板及电子设备,以在确保焊盘强度及锡球焊接强度的前提下,提升芯片及电子设备的轻薄性。
根据本公开的第一方面提出一种芯片,所述芯片包括芯片基板和设置在所述芯片基板上的多个焊盘;
多个所述焊盘阵列设置在所述芯片基板上;至少一个所述焊盘为多边形焊盘。
可选的,所述多边形焊盘包括四边形焊盘、五边形焊盘、六边形焊盘和八边形焊盘中的至少一种。
可选的,所述多边形焊盘为四边形焊盘;
所述四边形焊盘的至少一边平行或垂直于所述芯片基板边沿;和/或,所述四边形焊盘的至少一边与所述芯片基板边沿呈第一预设倾角,所述第一预设倾角大于或等于30°,且小于或等于60°。
可选的,所述第一预设倾角为45°。
可选的,所述四边形焊盘为正方形焊盘,所述正方形焊盘的边长为0.18mm。
可选的,至少一部分焊盘的阵列方向平行于所述芯片基板边沿;
和/或,至少一部分所述焊盘的阵列方向与所述芯片基板边沿第二预设倾角,所述第二预设倾角大于或等于30°,且小于或等于60°。
可选的,所述第二预设倾角为45°。
可选的,所述多边形焊盘包括第一焊盘和第二焊盘;
所述芯片基板包括中心区域和边缘区域,所述第一焊盘设置于所述边缘区域,所述第二焊盘设置于所述中心区域。
可选的,所述边缘区域与所述芯片基板边沿相邻设置,所述边缘区域环绕所述中心区域。
可选的,所述第一焊盘为五边形焊盘,所述第二焊盘为四边形焊盘;所述五边形焊盘包括至少一条邻近且平行于所述芯片基板边沿的第一边,所述四边形焊盘包括至少一条与所述芯片基板边沿呈第三预设倾角的第二边,所述第三预设倾角大于或等于30°,且小于或等于60°。
可选的,所述第三预设倾角为45°。
可选的,所述第一焊盘的阵列方向平行于所述芯片基板边沿,所述第二焊盘的阵列方向与所述芯片基板边沿呈第四预设倾角,所述第四预设倾角大于或等于30°,且小于或等于60°。
可选的,所述第四预设倾角为45°。
可选的,所述第一焊盘和所述第二焊盘的面积相同。
可选的,相邻所述焊盘的中心之间的距离为0.3mm。
根据本公开的第二方面提出一种电路板,所述电路板包括电路板基板和设置在所述电路板基板上的多个焊盘;
多个所述焊盘阵列设置在所述电路板基板上;至少一个所述焊盘为多边形焊盘。
可选的,所述多边形焊盘包括四边形焊盘、五边形焊盘、六边形焊盘和八边形焊盘中的至少一种。
可选的,所述多边形焊盘为四边形焊盘;
所述四边形焊盘的至少一边平行或垂直于所述电路板基板边沿;和/或,所述四边形焊盘的至少一边与所述电路板基板边沿呈第五预设倾角,所述第五预设倾角大于或等于30°,且小于或等于60°。
可选的,所述第五预设倾角为45°。
可选的,所述四边形焊盘为正方形焊盘,所述正方形焊盘的边长为0.2mm。
可选的,至少一部分焊盘的阵列方向平行于所述电路板基板边沿;
和/或,至少一部分所述焊盘的阵列方向与所述电路板基板边沿呈第六预设倾角,所述第六预设倾角大于或等于30°,且小于或等于60°。
可选的,所述第六预设倾角为45°。
可选的,所述多边形焊盘包括第三焊盘和第四焊盘;
所述电路板基板包括中心区域和边缘区域,所述第三焊盘设置于所述边缘区域,所述第四焊盘设置于所述中心区域。
可选的,所述边缘区域与所述电路板基板边沿相邻设置,所述边缘区域环绕所述中心区域。
可选的,所述第三焊盘为五边形焊盘,所述第四焊盘为四边形焊盘;所述五边形焊盘包括至少一条邻近且平行于所述电路板基板边沿的第一边,所述四边形焊盘包括至少一条与所述电路板基板边沿呈第七预设倾角的第二边,所述第七预设倾角大于或等于30°,且小于或等于60°。
可选的,所述第七预设倾角为45°。
可选的,所述第三焊盘的阵列方向平行于所述电路板基板边沿,所述第四焊盘的阵列方向与所述电路板基板边沿呈第八预设倾角,所述第八预设倾角大于或等于30°,且小于或等于60°。
可选的,所述第八预设倾角为45°。
可选的,所述第三焊盘和所述第四焊盘的面积相同。
可选的,相邻所述焊盘的中心之间的距离为0.3mm。
根据本公开的第三方面提出一种电子设备,所述电子设备包括:所述芯片和所述电路板。
本公开的实施例提供的技术方案可以包括以下有益效果:
本公开将芯片上的焊盘设置为多边形焊盘,通过焊盘形状的改变有助于缩短相邻焊盘之间的间距,因而能够减小芯片尺寸。此外,多边形焊盘阵列的直线边加强了焊盘对抗应力的能力,增加了焊盘本身的结构强度以及焊盘与锡球的焊接强度,防止焊盘及锡球在测试和使用中因撞击、跌落等情况导致的断裂,提升了芯片、电路板及电子设备的轻薄性。
应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分,示出了符合本公开的实施例,并与说明书一起用于解释本公开的原理。
图1是本公开一示例性实施例中一种芯片在焊接锡球后的局部立体结构示意图;
图2是本公开一示例性实施例中一种芯片在焊接锡球前的俯视结构示意图之一;
图3是本公开一示例性实施例中一种芯片在焊接锡球前的俯视结构示意图之二;
图4是本公开一示例性实施例中一种芯片在焊接锡球前的俯视结构示意图之三;
图5是本公开一示例性实施例中一种电路板在焊接锡球后的局部立体结构示意图;
图6是本公开一示例性实施例中一种电路板在焊接锡球前的俯视结构示意图之一;
图7是本公开一示例性实施例中一种电路板在焊接锡球前的俯视结构示意图之二;
图8是本公开一示例性实施例中一种电路板在焊接锡球前的俯视结构示意图之三;
图9是本公开一示例性实施例中一种电子设备的截面结构示意图。
具体实施方式
这里将详细地对示例性实施例进行说明,其示例表示在附图中。下面的描述涉及附图时,除非另有表示,不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施例并不代表与本公开相一致的所有实施例。相反,它们仅是与如所附权利要求书中所详述的、本公开的一些方面相一致的装置和方法的例子。
在相关技术中,例如手机等电子设备内部的通常包含用于实现各种功能的芯片,芯片上的电子元器件和控制线路通过焊盘及焊接在焊盘上的锡球实现封装。然而,相关技术中的芯片上相邻焊盘中心之间的距离包括0.8mm、0.5mm、0.4mm、0.35mm,均大于或等于0.35mm。
随着芯片功能的逐渐丰富,单位尺寸内芯片封装线路的越来越复杂,导致芯片的整体尺寸增加,影响了芯片及电子设备的整体轻薄性。此外,芯片内部晶圆封装精进到批量7nm,与芯片组装配合的电路板内部走线已经开启mSAP封装,造成整个产业链中的芯片与PCB连接的焊盘封装工艺环节成为瓶颈。
图1是本公开一示例性实施例中一种芯片在焊接锡球后的局部立体结构示意图;图2是本公开一示例性实施例中一种芯片在焊接锡球前的俯视结构示意图之一。如图1、图2所示,本公开提出一种芯片1,芯片1包括芯片基板11和设置在芯片基板11上的多个焊盘12。多个焊盘12阵列设置在芯片基板11上,至少一个焊盘12为多边形焊盘。
将芯片1上的焊盘12设置为多边形焊盘,通过焊盘12形状的改变有助于缩短相邻焊盘12之间的间距,因而能够减小芯片1尺寸。此外,多边形焊盘阵列的直线边加强了焊盘12对抗应力的能力,增加了焊盘12本身的结构强度。每个焊盘上可以焊接有锡球13,上述结构设置还提升了焊盘12与锡球13的焊接强度,防止焊盘12及锡球13在测试和使用中因撞击、跌落等情况导致的断裂,提升了芯片1的轻薄性。
在一些实施例中,通过上述结构设置可以使相邻焊盘12的中心之间的距离d为0.3mm。上述芯片1上的焊盘12为多边形焊盘,通过焊盘12形状的改变使得相邻焊盘12之间的距离d缩短为0.3mm,因而减小了芯片1尺寸。其中,当焊盘12为多边形焊盘时,多边形焊盘的边缘为直线边,直线边对应力的缓冲效果好。在确保焊盘12达到足够的应力对抗强度,且相邻焊盘12之间不发生串锡等短路问题的情况下,多边形焊盘的面积能够相对圆形焊盘的面积减小,而相邻焊盘12边沿之间的距离保持不变,例如相邻焊盘12边沿之间的距离为0.12mm,采用多边形焊盘的芯片1的整体尺寸得到减小。
需要说明的是,上述多个焊盘12中可以包括至少一个多边形焊盘和部分其他形状的焊盘结构。或者,上述多个焊盘12均为多边形焊盘。由于芯片1在经历冲击等情况时,芯片1上的焊盘12承受形变产生的法向应变力,将焊盘12设计成多边形结构,焊盘12承受外力的面积从圆弧顶点变成多边形焊盘的边缘,多边形边缘承受外力的焊锡总边长占边长的比例从33%提升到60%。根据格里菲斯断裂判据:静态条件下发生脆性断裂的必要条件是断裂区释放的能量等于形成裂纹面积所需要的能量。即,如外界施加应变力产生的能量要产生裂纹,外界应变力产生的能力必须大于形成裂纹面积所需要的能量。而形成裂纹面积以一个长方形来近似计算时发现:裂纹深度相同时裂纹越长裂纹面积越大;产生裂纹面的宽度越宽,裂纹长度越短,裂纹深度相同时产生的裂纹面积越小。即可能产生裂纹的面的宽度增加能够有效分解作用于该面的应力,在同等外加形变力条件下,焊点在芯片1外侧面上的宽度越宽,所产生的裂纹深度越短,使得芯片1外侧面越宽的焊盘12在承受芯片1外侧法向应变力的能力越强,所以多边形焊盘阵列的直线边加强了焊盘12对抗应力的能力。
在上述实施例中,多边形焊盘可以包括四边形焊盘、五边形焊盘、六边形焊盘和八边形焊盘中的至少一种。上述多边形焊盘的各个顶角位置可以设置圆弧形或直线型倒角,形成包含倒角的多边形焊盘结构,以避免多边形焊盘在定角位置处的应力集中发生断裂等破坏。在一些实施例中,至少一部分焊盘12的阵列方向平行于芯片基板边沿111,和/或,至少一部分焊盘12的阵列方向与芯片基板边沿111呈第二预设倾角,第二预设倾角可以大于或等于30°,且小于或等于60°。在一实施例中,第二预设倾角可以为45°,以通过焊盘12的阵列方向形成对各个方向应力的较好缓冲效果。
在一些实施例中,多边形焊盘可以为四边形焊盘,例如图2所示,多边形焊盘为正方形焊盘,正方形焊盘的边平行或垂直于芯片基板边沿111,正方形焊盘的阵列方向平行于芯片基板边沿111。阵列的正方形焊盘结构简单,且正方形焊盘的四条边在平行或垂直于芯片基板边沿111时对芯片1外侧法向应变力的能力增强。
在另一些实施例中,四边形焊盘的至少一边与芯片基板边沿111呈第一预设倾角,第一预设倾角可以大于或等于30°,且小于或等于60°。如图3所示,多边形焊盘为正方形焊盘,正方形焊盘的边与所述芯片基板边沿111呈45°倾角,正方形焊盘的阵列方向与芯片基板边沿111呈45°倾角。阵列的正方形焊盘结构简单,且正方形焊盘的四条边在与芯片基板边沿111呈45°倾角时,不仅能够获得对芯片1外侧法向应变力的承受力,还能够获得与上述法向应变力呈一定角度的应变力的承受力,提升焊盘12对抗应变力的综合能力。此外,正方形焊盘的阵列方向与芯片基板边沿111呈45°倾角时,使得沿某一阵列方向设置的各个正方形焊盘的相应边在一条直线上,在同一直线上的各个边形成了统一的应力对抗方向,加强了焊盘12对抗应力的能力。
需要说明的是,上述四边形焊盘可以为正方形焊盘,正方形焊盘的边长可以为0.18mm,也可以为0.16mm-0.2mm之间的任一数值,本公开并不对此进行限制。相邻正方形焊盘的相邻边之间的距离可以保持在0.12mm,以避免相邻焊盘之间的结构干扰以及发生短路的风险。在焊盘12的加工过程中,需要通过钢网以及SMT印刷技术实现焊盘12加工,现有制程钢网材质为FG和纳米复合材料,钢网厚度为0.08mm,采用锡膏5#号粉印刷形成焊盘12。上述钢网开孔宽厚比要大于1.5,面积比要大于0.54。其中,上述宽厚比可以是钢网开孔最窄处和钢网厚度的比值,钢网开孔的最窄处不小于0.12mm。上述面积比可以是钢网开孔的侧壁面积和钢网开孔孔底面比。经过数据验证,通过上述方法加工获得的边长为0.18mm的正方形焊盘在落锡高度、落锡面积和落锡体积等落锡成型效果上满足生产需要。
按照相同芯片1尺寸两中芯片1焊盘12面积推算单位面积锡球13承受芯片1重量的比例,如尺寸同为10mm*10mm的芯片1,第一种芯片1上相邻两焊盘12中心的距离为0.3mm,用0.3mm Pitch表示;第二种芯片1上相邻两焊盘12中心的距离为0.35mm,用0.35mm Pitch表示。热应力变形对锡球13成型的影响主要取决于单位面积锡球13承受的芯片1重量和芯片1自身封装材质,依下表数据第一种芯片1锡球13承受的重量请于第二种芯片1锡球13承受的重量。
芯片封装 | 芯片尺寸 | 芯片重量 | 焊锡面积 | 锡球行列 | 锡球数量 | 焊锡总面积 | 单位焊锡承重 |
0.3mm Pitch | 10 | 100 | 0.0324 | 33 | 1089 | 35.284 | 2.834 |
0.35mm Pitch | 10 | 100 | 0.0346 | 29 | 841 | 29.114 | 3.435 |
此外,由于正方形焊盘边角位置的焊锡量不足,无法支撑电迁移的银金属原子量,且焊接后在焊盘12外侧包裹一层助焊剂,能够有效避免电迁移,进而避免电迁移产生的短路风险。其中,上述助焊剂为锡膏中自带的FLUS材质。
在又一实施例中,多边形焊盘包括第一焊盘121和第二焊盘122,第一焊盘121的直线边数量多于第二焊盘122的直线边数量。芯片基板11包括中心区域113和边缘区域112,第一焊盘121设置于边缘区域112,第二焊盘122设置于所述中心区域113。通过不同类型的多边形对抗芯片基板11不同区域的应力,有助于提升焊盘12的整体强度。在芯片1受到冲击时,由于芯片基板11的边缘区域112的应力来自于芯片基板边沿111,来自于芯片基板边沿111的应力较作用于芯片基板11中心区域113的应力复杂,因而第一焊盘121的直线边数量多于第二焊盘122的直线边数量,有助于加强边缘区域112应力的对抗效果。
在上述实施例中,边缘区域112可以与芯片基板边沿111相邻设置,边缘区域112可以环绕中心区域113。
第一焊盘121可以为五边形焊盘,第二焊盘122可以为四边形焊盘;五边形焊盘包括至少一条邻近且平行于芯片基板边沿111的第一边1211,四边形焊盘包括至少一条与芯片基板边沿111呈第三预设倾角的第二边1221,第三预设倾角可以大于或等于30°,且小于或等于60°。在一实施例中,第三预设倾角可以为45°,以通过四边形焊盘的设置角度提升位于中心区域113的焊盘12对应力的缓冲效果。
例如图4所示,五边形焊盘的第一边1211平行于第一边1211邻近的芯片基板边沿111,五边形焊盘的第三边1212和第五边1213垂直于该条芯片基板边沿111,五边形焊盘的第七边1214和第九边1215与该条芯片基板边沿111呈45°倾角。四边形焊盘为正方形焊盘,正方形焊盘的全部边均与该条芯片基板边沿111呈45°倾角,以通过五边形焊盘的各条边以及正方形焊盘的各条边对抗作用于芯片基板11中心区域113和边缘区域112的应力。
例如图4所示,第一焊盘121的阵列方向可以平行于芯片基板边沿111,以分布在芯片基板11的边缘区域112。第二焊盘122的阵列方向与芯片基板边沿111呈第四预设倾角,以分布在芯片基板11的中心区域113。第四预设倾角可以大于或等于30°,且小于或等于60°。在一些实施例中,上述第四预设倾角可以为45°,以通过第二焊盘122的阵列方向形成对各个方向应力的较好缓冲效果。或者,上述第一焊盘121和第二焊盘122也可以沿其他方向阵列在相应位置,本公开并不对此进行限制。第一焊盘121可以围绕芯片基板11一周、两周或多周,以形成一排、两排或多排的阵列效果。
需要说明的是,上述四边形焊盘可以为正方形焊盘,也可以为菱形焊盘或其他四边形焊盘,本公开并不对此进行限制。进一步的,第一焊盘121和第二焊盘122的面积可以相同,以保证焊接在锡球13量相同,避免第一焊盘121和/或第二焊盘122的结构、形状改进对焊接工艺造成的干扰和影响。或者,在其他实施例中,第一焊盘也可以为三角形焊盘、四边形焊盘、六边形焊盘等其他多边形焊盘中的一种或多种,第二焊盘也可以为三角形焊盘、五边形焊盘、六边形焊盘等其他多边形焊盘中的一种或多种,本公开并不对此进行限制。
本公开进一步提出一种电路板,如图5、图6所示,电路板2包括电路板基板21和设置在电路板基板21上的多个焊盘22。多个焊盘22阵列设置在电路板基板21上,焊盘22为多边形焊盘
将电路板2上的焊盘22设置为多边形焊盘,通过焊盘22形状的改变有助于缩短相邻焊盘22之间的间距,因而能够减小电路板2尺寸。此外,多边形焊盘阵列的直线边加强了焊盘22对抗应力的能力,增加了焊盘22本身的结构强度。每个焊盘上可以焊接有锡球23,上述结构设置还提升了焊盘22与锡球23的焊接强度,防止焊盘22及锡球23在测试和使用中因撞击、跌落等情况导致的断裂,提升了电路板2的轻薄性。
在一些实施例中,通过上述结构设置可以使相邻焊盘22的中心之间的距离d为0.3mm。上述电路板2上的焊盘22为多边形焊盘,通过焊盘22形状的改变使得相邻焊盘22之间的距离d缩短为0.3mm,因而减小了电路板2尺寸。其中,当焊盘22为多边形焊盘时,多边形焊盘的边缘为直线边,直线边对应力的缓冲效果好。在确保焊盘22达到足够的应力对抗强度,且相邻焊盘22之间不发生串锡等短路问题的情况下,多边形焊盘的面积能够相对圆形焊盘的面积减小,而相邻焊盘22边沿之间的距离保持不变,例如相邻焊盘22边沿之间的距离为0.12mm,采用多边形焊盘的电路板2的整体尺寸得到减小。
需要说明的是,上述多个焊盘22中可以包括至少一个多边形焊盘和部分其他形状的焊盘结构。或者,上述多个焊盘22均为多边形焊盘。由于电路板2在经历冲击等情况时,电路板2上的焊盘22承受形变产生的法向应变力,将焊盘22设计成多边形结构,焊盘22承受外力的面积从圆弧顶点变成多边形焊盘的边缘,多边形边缘承受外力的焊锡总边长占边长的比例从33%提升到60%。根据格里菲斯断裂判据:静态条件下发生脆性断裂的必要条件是断裂区释放的能量等于形成裂纹面积所需要的能量。即,如外界施加应变力产生的能量要产生裂纹,外界应变力产生的能力必须大于形成裂纹面积所需要的能量。而形成裂纹面积以一个长方形来近似计算时发现:裂纹深度相同时裂纹越长裂纹面积越大;产生裂纹面的宽度越宽,裂纹长度越短,裂纹深度相同时产生的裂纹面积越小。即可能产生裂纹的面的宽度增加能够有效分解作用于该面的应力,在同等外加形变力条件下,焊点在电路板2外侧面上的宽度越宽,所产生的裂纹深度越短,使得电路板2外侧面越宽的焊盘22在承受电路板2外侧法向应变力的能力越强,所以多边形焊盘阵列的直线边加强了焊盘22对抗应力的能力。
在上述实施例中,多边形焊盘可以包括四边形焊盘、五边形焊盘、六边形焊盘和八边形焊盘中的至少一种。在一些实施例中,至少一部分焊盘22的阵列方向平行于电路板基板边沿211,和/或,至少一部分焊盘22的阵列方向与电路板基板边沿211呈第六预设倾角,第六预设倾角可以大于或等于30°,且小于或等于60°。在一实施例中,第六预设倾角可以为45°,以通过焊盘22的阵列方向形成对各个方向应力的较好缓冲效果。
在一些实施例中,多边形焊盘可以为四边形焊盘,例如图6所示,多边形焊盘为正方形焊盘,正方形焊盘的边平行或垂直于电路板基板边沿211,正方形焊盘的阵列方向平行于电路板基板边沿211。阵列的正方形焊盘结构简单,且正方形焊盘的四条边在平行或垂直于电路板基板边沿211时对电路板2外侧法向应变力的能力增强。
在另一些实施例中,四边形焊盘的至少一边与电路板基板边沿211呈第五预设倾角,第五预设倾角可以大于或等于30°,且小于或等于60°。如图7所示,多边形焊盘为正方形焊盘,正方形焊盘的边与所述电路板基板边沿211呈45°倾角,正方形焊盘的阵列方向与电路板基板边沿211呈45°倾角。阵列的正方形焊盘结构简单,且正方形焊盘的四条边在与电路板基板边沿211呈45°倾角时,不仅能够获得对电路板2外侧法向应变力的承受力,还能够获得与上述法向应变力呈一定角度的应变力的承受力,提升焊盘22对抗应变力的综合能力。此外,正方形焊盘的阵列方向与电路板基板边沿211呈45°倾角时,使得沿某一阵列方向设置的各个正方形焊盘的相应边在一条直线上,在同一直线上的各个边形成了统一的应力对抗方向,加强了焊盘22对抗应力的能力。
需要说明的是,上述四边形焊盘可以为正方形焊盘,当芯片1上的正方形焊盘的边长为0.18mm时,上述电路板2上的正方形焊盘的边长可以为0.2mm,电路板2上相邻正方形焊盘的相邻边之间的距离可以保持在0.12mm,以避免相邻焊盘之间的结构干扰以及发生短路的风险。当芯片1上正方形焊盘的边长在0.16mm-0.2mm范围内变化时,电路板2上正方形焊盘的尺寸可以在0.16mm-0.22mm的范围内做相应调整,电路板2上的焊盘尺寸可以等于或稍大于芯片1上的焊盘尺寸,以便于焊接工艺实现。在焊盘22的加工过程中,需要通过钢网以及SMT印刷技术实现焊盘22加工,现有制程钢网材质为FG和纳米复合材料,钢网厚度为0.08mm,采用锡膏5#号粉印刷形成焊盘22。上述钢网开孔宽厚比要大于1.5,面积比要大于0.54。其中,上述宽厚比可以是钢网开孔最窄处和钢网厚度的比值,钢网开孔的最窄处不小于0.12mm。上述面积比可以是钢网开孔的侧壁面积和钢网开孔孔底面比。经过数据验证,通过上述方法加工获得的边长为0.2mm的正方形焊盘在落锡高度、落锡面积和落锡体积等落锡成型效果上满足生产需要。
此外,由于正方形焊盘边角位置的焊锡量不足,无法支撑电迁移的银金属原子量,且焊接后在焊盘22外侧包裹一层助焊剂,能够有效避免电迁移,进而避免电迁移产生的短路风险。其中,上述助焊剂为锡膏中自带的FLUS材质。
在芯片未与电路板2焊接时,芯片上正方形焊盘的尺寸可以为0.18mm*0.18mm,对角线公差±7%;芯片正方形焊盘上的单体焊盘22锡球23直径:0.215mm(±5%),单体焊盘22锡球23高度:0.15mm(±5%),单体焊盘22锡球23体积:0.0041mm3(±10%)。在芯片与电路板2焊接后,芯片上正方形焊盘的尺寸可以为0.18mm*0.18mm,对角线公差±7%;中间最宽区域锡球23直径:0.225mm(±10%),电路板2焊盘22尺寸:0.20mm*0.20mm(±10%),电路板2焊盘22铺铜尺寸:0.26mm*0.26mm(±5%),锡球23高度:0.14mm(+10%,-15%),锡球23体积:0.0052mm3(±10%)。
在又一实施例中,多边形焊盘包括第三焊盘221和第四焊盘222,第三焊盘221的直线边数量多于第四焊盘222的直线边数量。电路板基板21包括中心区域213和边缘区域212,第三焊盘221设置于边缘区域212,第四焊盘222设置于所述中心区域213。通过不同类型的多边形对抗电路板基板21不同区域的应力,有助于提升焊盘22的整体强度。在电路板2受到冲击时,由于电路板基板21的边缘区域212的应力来自于电路板基板边沿211,来自于电路板基板边沿211的应力较作用于电路板基板21中心区域213的应力复杂,因而第三焊盘221的直线边数量多于第四焊盘222的直线边数量,有助于加强边缘区域212应力的对抗效果。
在上述实施例中,边缘区域212可以与电路板基板边沿211相邻设置,边缘区域212可以环绕中心区域213。
第三焊盘221可以为五边形焊盘,第四焊盘222可以为四边形焊盘;五边形焊盘包括至少一条邻近且平行于电路板基板边沿211的第一边2211,四边形焊盘包括至少一条与电路板基板边沿211呈第七预设倾角的第二边2221,第七预设倾角可以大于或等于30°,且小于或等于60°。在一实施例中,第七预设倾角可以为45°,以通过四边形焊盘的设置角度提升位于中心区域213的焊盘22对应力的缓冲效果。。
例如图8所示,五边形焊盘的第一边2211平行于第一边2211邻近的电路板基板边沿211,五边形焊盘的第三边2212和第五边2213垂直于该条电路板基板边沿211,五边形焊盘的第七边2214和第九边2215与该条电路板基板边沿211呈45°倾角。四边形焊盘为正方形焊盘,正方形焊盘的全部边均与该条电路板基板边沿211呈45°倾角,以通过五边形焊盘的各条边以及正方形焊盘的各条边对抗作用于电路板基板21中心区域213和边缘区域212的应力。
例如图8所示,第三焊盘221的阵列方向可以平行于电路板基板边沿211,以分布在电路板基板21的边缘区域212。第四焊盘222的阵列方向与电路板基板边沿211呈第八预设倾角,以分布在电路板基板21的中心区域213。第八预设倾角可以大于或等于30°,且小于或等于60°。在一些实施例中,上述第八预设倾角可以为45°,以通过第四焊盘222的阵列方向形成对各个方向应力的较好缓冲效果。或者,上述第三焊盘221和第四焊盘222也可以沿其他方向阵列在相应位置,本公开并不对此进行限制。第三焊盘221可以围绕电路板基板21一周、两周或多周,以形成一排、两排或多排的阵列效果。
需要说明的是,上述四边形焊盘可以为正方形焊盘,也可以为菱形焊盘或其他四边形焊盘,本公开并不对此进行限制。进一步的,第三焊盘221和第四焊盘222的面积可以相同,以保证焊接在锡球23量相同,避免第三焊盘221和/或第四焊盘222的结构、形状改进对焊接工艺造成的干扰和影响。或者,在其他实施例中,第三焊盘也可以为三角形焊盘、四边形焊盘、六边形焊盘等其他多边形焊盘中的一种或多种,第四焊盘也可以为三角形焊盘、五边形焊盘、六边形焊盘等其他多边形焊盘中的一种或多种,本公开并不对此进行限制。
本公开进一步提出一种电子设备,如图9所示,电子设备3包括:上述芯片1和上述电路板2。芯片1的多边形焊盘可以与电路板2的多边形焊盘通过锡球焊接实现一一对应的导电连接。当芯片1的多边形焊盘包括第一焊盘121和第二焊盘122,电路板2的多边形焊盘包括第三焊盘221和第四焊盘222时,芯片的第一焊盘121和电路板2的第三焊盘221可以通过锡球焊接实现导电连接,芯片1的第二焊盘122和电路板2的第四焊盘222可以通过锡球焊接实现导电连接。
本公开将芯片1或电路板2上的焊盘设置为多边形焊盘,通过焊盘形状的改变使得相邻焊盘之间的距离d缩短为0.3mm,因而减小了芯片1及电路板2尺寸。此外,多边形焊盘阵列的直线边加强了焊盘22对抗应力的能力,增加了焊盘本身的结构强度以及焊盘与锡球的焊接强度,防止焊盘及锡球在测试和使用中因撞击、跌落等情况导致的断裂,提升结构可靠性,减少通过点胶固定芯片1和电路板2的成本,还降低了芯片1、电路板2及电子设备3的整体成本,提升了芯片1、电路板2及电子设备3的轻薄性。
需要说明的是,上述电子设备3可以是手机、平板电脑、车载终端或医疗终端等,本公开并不对此进行限制。
本领域技术人员在考虑说明书及实践这里公开的技术方案后,将容易想到本公开的其它实施方案。本公开旨在涵盖本公开的任何变型、用途或者适应性变化,这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的,本公开的真正范围和精神由下面的权利要求指出。
应当理解的是,本公开并不局限于上面已经描述并在附图中示出的精确结构,并且可以在不脱离其范围进行各种修改和改变。本公开的范围仅由所附的权利要求来限制。
Claims (31)
1.一种芯片,其特征在于,所述芯片包括芯片基板和设置在所述芯片基板上的多个焊盘;
多个所述焊盘阵列设置在所述芯片基板上;至少一个所述焊盘为多边形焊盘。
2.根据权利要求1所述的芯片,其特征在于,所述多边形焊盘包括四边形焊盘、五边形焊盘、六边形焊盘和八边形焊盘中的至少一种。
3.根据权利要求2所述的芯片,其特征在于,所述多边形焊盘为四边形焊盘;
所述四边形焊盘的至少一边平行或垂直于所述芯片基板边沿;和/或,所述四边形焊盘的至少一边与所述芯片基板边沿呈第一预设倾角,所述第一预设倾角大于或等于30°,且小于或等于60°。
4.根据权利要求3所述的芯片,其特征在于,所述第一预设倾角为45°。
5.根据权利要求3所述的芯片,其特征在于,所述四边形焊盘为正方形焊盘,所述正方形焊盘的边长为0.18mm。
6.根据权利要求1所述的芯片,其特征在于,至少一部分焊盘的阵列方向平行于所述芯片基板边沿;
和/或,至少一部分所述焊盘的阵列方向与所述芯片基板边沿第二预设倾角,所述第二预设倾角大于或等于30°,且小于或等于60°。
7.根据权利要求6所述的芯片,其特征在于,所述第二预设倾角为45°。
8.根据权利要求1所述的芯片,其特征在于,所述多边形焊盘包括第一焊盘和第二焊盘;
所述芯片基板包括中心区域和边缘区域,所述第一焊盘设置于所述边缘区域,所述第二焊盘设置于所述中心区域。
9.根据权利要求8所述的芯片,其特征在于,所述边缘区域与所述芯片基板边沿相邻设置,所述边缘区域环绕所述中心区域。
10.根据权利要求8所述的芯片,其特征在于,所述第一焊盘为五边形焊盘,所述第二焊盘为四边形焊盘;所述五边形焊盘包括至少一条邻近且平行于所述芯片基板边沿的第一边,所述四边形焊盘包括至少一条与所述芯片基板边沿呈第三预设倾角的第二边,所述第三预设倾角大于或等于30°,且小于或等于60°。
11.根据权利要求10所述的芯片,其特征在于,所述第三预设倾角为45°。
12.根据权利要求8所述的芯片,其特征在于,所述第一焊盘的阵列方向平行于所述芯片基板边沿,所述第二焊盘的阵列方向与所述芯片基板边沿呈第四预设倾角,所述第四预设倾角大于或等于30°,且小于或等于60°。
13.根据权利要求12所述的芯片,其特征在于,所述第四预设倾角为45°。
14.根据权利要求8所述的芯片,其特征在于,所述第一焊盘和所述第二焊盘的面积相同。
15.根据权利要求1所述的芯片,其特征在于,相邻所述焊盘的中心之间的距离为0.3mm。
16.一种电路板,其特征在于,所述电路板包括电路板基板和设置在所述电路板基板上的多个焊盘;
多个所述焊盘阵列设置在所述电路板基板上;至少一个所述焊盘为多边形焊盘。
17.根据权利要求16所述的电路板,其特征在于,所述多边形焊盘包括四边形焊盘、五边形焊盘、六边形焊盘和八边形焊盘中的至少一种。
18.根据权利要求17所述的电路板,其特征在于,所述多边形焊盘为四边形焊盘;
所述四边形焊盘的至少一边平行或垂直于所述电路板基板边沿;和/或,所述四边形焊盘的至少一边与所述电路板基板边沿呈第五预设倾角,所述第五预设倾角大于或等于30°,且小于或等于60°。
19.根据权利要求18所述的电路板,其特征在于,所述第五预设倾角为45°。
20.根据权利要求18所述的电路板,其特征在于,所述四边形焊盘为正方形焊盘,所述正方形焊盘的边长为0.2mm。
21.根据权利要求16所述的电路板,其特征在于,至少一部分焊盘的阵列方向平行于所述电路板基板边沿;
和/或,至少一部分所述焊盘的阵列方向与所述电路板基板边沿呈第六预设倾角,所述第六预设倾角大于或等于30°,且小于或等于60°。
22.根据权利要求21所述的电路板,其特征在于,所述第六预设倾角为45°。
23.根据权利要求16所述的电路板,其特征在于,所述多边形焊盘包括第三焊盘和第四焊盘;
所述电路板基板包括中心区域和边缘区域,所述第三焊盘设置于所述边缘区域,所述第四焊盘设置于所述中心区域。
24.根据权利要求23所述的电路板,其特征在于,所述边缘区域与所述电路板基板边沿相邻设置,所述边缘区域环绕所述中心区域。
25.根据权利要求23所述的电路板,其特征在于,所述第三焊盘为五边形焊盘,所述第四焊盘为四边形焊盘;所述五边形焊盘包括至少一条邻近且平行于所述电路板基板边沿的第一边,所述四边形焊盘包括至少一条与所述电路板基板边沿呈第七预设倾角的第二边,所述第七预设倾角大于或等于30°,且小于或等于60°。
26.根据权利要求25所述的电路板,其特征在于,所述第七预设倾角为45°。
27.根据权利要求23所述的电路板,其特征在于,所述第三焊盘的阵列方向平行于所述电路板基板边沿,所述第四焊盘的阵列方向与所述电路板基板边沿呈第八预设倾角,所述第八预设倾角大于或等于30°,且小于或等于60°。
28.根据权利要求27所述的电路板,其特征在于,所述第八预设倾角为45°。
29.根据权利要求23所述的电路板,其特征在于,所述第三焊盘和所述第四焊盘的面积相同。
30.根据权利要求16所述的电路板,其特征在于,相邻所述焊盘的中心之间的距离为0.3mm。
31.一种电子设备,其特征在于,包括:
如权利要求1-15任一项所述的芯片;
如权利要求16-30任一项所述的电路板。
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JP2021044590A JP7174095B2 (ja) | 2020-07-08 | 2021-03-18 | チップ、回路基板及び電子デバイス |
US17/208,454 US20220013484A1 (en) | 2020-07-08 | 2021-03-22 | Chip, circuit board and electronic device |
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US6429390B1 (en) * | 2001-03-12 | 2002-08-06 | International Business Machines Corporation | Structure and method for forming the same of a printed wiring board having built-in inspection aids |
US20030054589A1 (en) * | 2001-09-17 | 2003-03-20 | Sony Corporation | Method of improving mount assembly in a multilayer PCB's |
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JP5340047B2 (ja) * | 2009-06-12 | 2013-11-13 | パナソニック株式会社 | 半導体集積回路装置 |
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