CN113675261A - n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法 - Google Patents

n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法 Download PDF

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CN113675261A
CN113675261A CN202110678790.9A CN202110678790A CN113675261A CN 113675261 A CN113675261 A CN 113675261A CN 202110678790 A CN202110678790 A CN 202110678790A CN 113675261 A CN113675261 A CN 113675261A
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boron nitride
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nitride film
monocrystalline silicon
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殷红
刘彩云
李宇婧
高伟
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Jilin University
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Abstract

本发明提供了一种n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法,属于半导体材料领域。本发明采用磁控溅射方法在p型(100)面单晶硅基底上制备氮化硼薄膜;采用共溅射手段,在位碳掺杂得到n型氮化硼薄膜;然后在n型氮化硼薄膜一侧和p型单晶硅一侧分别制作银电极,即制得n型氮化硼薄膜/p型单晶硅异质pn结原型器件。本发明通过对氮化硼薄膜进行在位碳掺杂,得到电学性能优异的n型电导层,较比于未掺杂、硅掺杂的氮化硼薄膜的电学性能有显著提升;获得了整流特性良好的pn结原型器件。

Description

n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法
本申请为申请日为2019年05月09日提交中国国家知识产权局、申请号为201910382492.8、发明名称为“n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法”的中国专利申请的分案申请。
技术领域
本发明涉及半导体材料领域,尤其涉及一种n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法。
背景技术
随着材料科学的发展和半导体技术的进步,硅基半导体器件的性能已逐渐达到硅材料理论的极限,而工业、科技与军事的发展却不断对半导体器件提出更苛刻的要求,开发具有高强度、高硬度、耐高温、高频率、抗辐射以及耐腐蚀等特性的新型材料已成为当务之急。
宽禁带半导体材料具有高硬度、良好的化学稳定性、高热导率、高击穿场强、高饱和漂移速度和小介电常数,可发射及探测至深紫外的短波长光等诸多特性,是满足工业半导体器件发展需求的理想材料,被称为“第三代半导体”。特别是氮化硼,作为三五族化合物半导体中最简单的材料,具有超宽的带隙(六角氮化硼为5.9eV;立方氮化硼为6.4eV)、极限的物理化学性质、以及优异的半导体和光电性能等,在军事、航空、工业等领域中的应用有着得天独厚的优势。
国际上对基于氮化硼材料的pn结方面的研究仍然处于初级阶段。已有的pn结方面的报道多为高温高压合成的氮化硼块体单晶,无法直接沉积在基底上,不利于在大规模、大面积的集成电路中应用。此外,关于高质量氮化硼薄膜合成和有效掺杂方面的报道也极为有限。氮化硼薄膜的生长窗口非常狭窄,特别是高质量的氮化硼薄膜的生长重复性非常差,沉积手段不同,工艺参数就完全不同,再昂贵精密的设备也是如此。同时,由于氮化硼的禁带宽,难以获得高浓度和低补偿的有效掺杂。因此,导致高质量氮化硼薄膜在半导体等相关领域的应用研究滞缓。
本发明拟采用磁控溅射手段,通过在位碳掺杂,在p型单晶硅基底上生长n型氮化硼薄膜,通过调节共溅射参数,提高氮化硼薄膜的电导率、掺杂率和迁移率等半导体特性,获得具有高整流性能的n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法,对高质量氮化硼薄膜在半导体、电子工业等领域的应用提供重要的依据。
发明内容
本发明的目的是提供一种n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法。
本发明采用的技术方案是:
一种n型氮化硼薄膜/p型单晶硅异质pn结原型器件及制备方法,其特征在于,所述方法包括以下步骤:(1)采用磁控溅射方法在p型单晶硅基底上制备碳掺杂氮化硼薄膜;(2)分别在n型氮化硼薄膜/p型单晶硅异质pn结两侧制备欧姆电极,即制得所述n型氮化硼薄膜/p型单晶硅异质pn结原型器件。
所述磁控溅射设备可以商用或是自行搭建。
所述步骤(2)磁控溅射的靶材为含碳的六角氮化硼靶,或六角氮化硼和碳单质分别作为靶材,采用双靶共溅射。优选为含碳的六角氮化硼靶。
所述步骤(1)磁控溅射方法按以下步骤进行:对磁控溅射室进行预抽真空后加热基底到25~800℃,优选为100~600℃;继续抽真空,直至达到1×10-4~1×10-5Pa后,优选为10-5Pa;通入氩气50~100sccm和氮气0~50sccm至工作气压1~3Pa,优选为氩气50sccm和氮气0~50sccm;施加基底负偏压0~-200V,优选为基底负偏压-100~-150V;控制基底和靶材的距离4~8cm,优选为6~8cm;设置靶溅射功率80~200W并起辉,优选为120~150W;进行薄膜溅射,溅射的时间为30min~3h,制备得到厚度100~1000nm的碳掺杂的氮化硼薄膜,其掺杂浓度为1018~1020cm-3,即获得n型氮化硼薄膜/p型单晶硅异质pn结。
所述步骤(2)中在n型氮化硼薄膜/p型单晶硅异质pn结两侧制备欧姆电极,可以使用常规的制作电极方法,是本领域技术人员公知的技术。
本发明还提供按照上述方法制备得到的n型氮化硼薄膜/p型单晶硅异质pn结。
本发明提供的n型氮化硼薄膜层具有较高的电导率、掺杂率和迁移率等半导体特性,更进一步提供的n型氮化硼薄膜/p型单晶硅异质pn结具有良好的整流性能。
本发明提供一种上述n型氮化硼薄膜/p型单晶硅异质pn结在半导体器件等领域的应用。
本发明的有益效果主要体现在:
(1)本发明通过在位碳掺杂的方式在p型单晶硅基底上生长高质量的n型氮化硼薄膜,可以通过调节生长参数来同时提高氮化硼薄膜的生长质量和掺杂质量,解决了离子注入等非在位掺杂手段通常造成的样品缺陷密度高、补偿高、掺杂效率低等缺点,使得碳单质有效地掺杂到氮化硼基体内,从而改善氮化硼薄膜的掺杂效率、迁移率和电导率等重要半导体性能参数。
(2)本发明采用磁控溅射方法,可以制备大面积的均匀致密的氮化硼薄膜。该方法成本低廉、技术工艺可控、便于操作,易于工业化推广。
(3)本发明通过对氮化硼薄膜进行有效的掺杂,克服了氮化硼薄膜本征电阻高,拓宽其在半导体器件领域内仅仅能做集成电路的绝缘层和保护层等的使用,使其向高可靠和高性能的半导体功能材料方面转型。
(4)本发明提供的具有良好整流性能的n型氮化硼薄膜/p型单晶硅异质pn结原型器件,具有较高的击穿电压和工作电压,并且较低的漏电流,整流比较高,为氮化硼薄膜在宽禁带半导体的潜在应用领域中提供科学依据和技术支持。
附图说明
构成本申请的一部分的说明书附图用来提供对本申请的进一步理解,本申请的示意性实施例及其说明用于解释本申请,并不构成对本申请的不当限定。
图1为本发明实施例1制得的氮化硼薄膜的扫描电子显微镜照片;
图2为本发明实施例2制得的氮化硼薄膜的扫描电子显微镜照片;
图3为本发明实施例3制得的氮化硼薄膜的扫描电子显微镜照片;
图4为本发明实施例4制得的氮化硼薄膜的扫描电子显微镜照片;
图5为本发明实施例1~4制得的氮化硼薄膜的傅里叶红外变换光谱图;
图6为本发明实施例1~4制得的n型氮化硼薄膜/p型硅异质pn结在室温下的I-V曲线图。
具体实施方式
下面将结合具体实施例对本发明进行进一步清楚、完整的描述,但本发明的保护范围并不仅限于此。
实施例1
将按所需尺寸切好的p型硅(100)单晶片依次在丙酮、乙醇、去离子水中超声清洗后,用氮气吹干后放在样品架上,送入真空沉积室,沉积室内真空度抽至3×10-5Pa,加热基底到500℃;继续抽真空,待沉积室的背底真空再次达到3×10-5Pa时,通入反应工作气体氩气50sccm至工作气压为2Pa;基底与靶间的距离为8cm,加基底负偏压-150V,设置靶溅射功率150W后起辉,预溅射2min后,挡板移开,进行薄膜溅射,薄膜溅射时间为2h,即得到n型氮化硼薄膜/p型单晶硅异质pn结。分别在n型氮化硼薄膜/p型单晶硅的异质pn结两侧制备银电极,形成欧姆接触,即制得所述n型氮化硼薄膜/p型单晶硅异质pn结原型器件,采用半导体测试系统获得器件的I-V曲线。
图1为实施例1制得的氮化硼薄膜的扫描电子显微镜照片,可见薄膜表面致密、平整、颗粒均匀。图5为实施例1~4制备得到的氮化硼薄膜的红外光谱图,其中实施例1所制备得到的氮化硼薄膜在770cm-1处为B-N特征峰,在923cm-1处为C-N特征峰,1100cm-1处为C-B特征峰,在1239cm-1处为B-O特征峰。用HL5500霍尔测试系统测得此氮化硼薄膜为n型半导体,其掺杂浓度为1020cm-3,迁移率为5.29cm2/Vs,电阻率为4.1×10-3Ωcm。图6为实施例1~4制得的n型氮化硼薄膜/p型硅异质pn结在室温下的I-V曲线图。测试结果表明,室温下实施例1所制备的异质pn结在±5V处的整流率约为115,反向漏电流约为7×10-8A,具有明显的整流特性。在最大电压量程±10V处,仍未获得饱和时的最大整流率,但从趋势看正向电流远未达到饱和,即pn结的实际整流率应该更高,且击穿电压大于10V。
实施例2
将按所需尺寸切好的p型硅(100)单晶片依次在丙酮、乙醇、去离子水中超声清洗后,用氮气吹干后放在样品架上,送入真空沉积室,沉积室内真空度抽至3×10-5Pa,加热基底到500℃;继续抽真空,待沉积室的背底真空再次达到3×10-5Pa时,通入反应工作气体氩气50sccm和氮气20sccm至工作气压为2Pa;基底与靶间的距离为8cm,加基底负偏压-150V,设置靶溅射功率150W后起辉,预溅射2min后,挡板移开,进行薄膜溅射,薄膜溅射时间为2h,即得到n型氮化硼薄膜/p型单晶硅异质pn结。分别在n型氮化硼薄膜/p型单晶硅异质pn结两侧制备银电极,形成欧姆接触,即制得所述n型氮化硼薄膜/p型单晶硅异质pn结原型器件,采用半导体测试系统获得器件的I-V曲线。
图2为实施例2制得的氮化硼薄膜的扫描电子显微镜照片,可见薄膜致密、平整、颗粒均匀。图5为实施例1~4制得的氮化硼薄膜的红外光谱图,其中实施例2所制得的氮化硼薄膜在774cm-1处为B-N特征峰,在923cm-1处为C-N特征峰,1104cm-1处为C-B特征峰,在1251cm-1处为B-O特征峰。用HL5500霍尔测试系统测得此氮化硼薄膜为n型半导体,其掺杂浓度为1019cm-3,迁移率为214.33cm2/Vs,电阻率为2.12×10-3Ωcm。图6为实施例1~4制得的n型氮化硼薄膜/p型硅异质pn结在室温下的I-V曲线图。测试结果表明,室温下实施例2所制备的异质pn结在±5V处的整流率约为21.5,反向漏电流约为2.7×10-6A,具有明显的整流特性。在最大电压量程约±10V处,仍未获得饱和时的最大整流率,但从趋势看正向电流远未达到饱和,即pn结的实际整流率更高,且击穿电压大于10V。
实施例3
将按所需尺寸切好的p型硅(100)单晶片依次在丙酮、乙醇、去离子水中超声清洗后,用氮气吹干后放在样品架上,送入真空沉积室,沉积室内真空度抽至3×10-5Pa,加热基底到500℃;继续抽真空,待沉积室的背底真空再次达到3×10-5Pa时,通入反应工作气体氩气50sccm和氮气40sccm至工作气压为2Pa;基底与靶间的距离为8cm,加基底负偏压-150V,设置靶溅射功率150W后起辉,预溅射2min后,挡板移开,进行薄膜溅射,薄膜溅射时间为2h,即得到n型氮化硼薄膜/p型单晶硅异质pn结。分别在n型氮化硼薄膜/p型单晶硅异质pn结两侧制备银电极,形成欧姆接触,即制得所述n型氮化硼薄膜/p型单晶硅异质pn结原型器件,采用半导体测试系统获得器件的I-V曲线。
图3为实施例3制得的氮化硼薄膜的扫描电子显微镜照片,可见薄膜表面致密、平整、颗粒均匀。图5为实施例1~4制得的氮化硼薄膜的红外光谱图,其中实施例3所制得的氮化硼薄膜在774cm-1处为B-N特征峰,在936cm-1处为C-N特征峰,1107cm-1处为C-B特征峰,在1251cm-1处为B-O特征峰。用HL5500霍尔测试系统测得此氮化硼薄膜为n型半导体,其掺杂浓度为1019cm-3,迁移率为214cm2/Vs,电阻率为2.08×10-3Ωcm。图6为实施例1~4制得的n型氮化硼薄膜/p型硅异质pn结在室温下的I-V曲线图。测试结果表明,室温下实施例3所制备的异质pn结在±5V处的整流率约为12.3,在反向漏电流约为8.1×10-6A,具有明显的整流特性。在最大电压量程约±10V处,仍未获得饱和时的最大整流率,但从趋势看正向电流远未达到饱和,即pn结的实际整流率更高,且击穿电压大于10V。
实施例4
将按所需尺寸切好的p型硅(100)单晶片依次在丙酮、乙醇、去离子水中超声清洗后,用氮气吹干后放在样品架上,送入真空沉积室,沉积室内真空度抽至3×10-5Pa,加热基底到500℃;继续抽真空,待沉积室的背底真空再次达到3×10-5Pa时,通入反应工作气体氩气50sccm、氮气50sccm至工作气压为2Pa;基底与靶间的距离为8cm,加基底负偏压-150V,设置靶溅射功率150W后起辉,预溅射2min后,挡板移开,进行薄膜溅射,薄膜溅射时间为2h,即得到n型氮化硼薄膜/p型单晶硅异质pn结。分别在n型氮化硼薄膜/p型单晶硅异质pn结两侧制备银电极,形成欧姆接触,即制得所述n型氮化硼薄膜/p型单晶硅异质pn结原型器件,采用半导体测试系统获得器件的I-V曲线。
图4为实施例4制得的氮化硼薄膜的扫描电子显微镜照片,可见薄膜表面致密、平整、颗粒均匀。图5为实施例1~4制得的氮化硼薄膜的红外光谱图,其中实施例4所制得的氮化硼薄膜在776cm-1处为B-N特征峰,在932cm-1处为C-N特征峰,1104cm-1处为C-B特征峰,在1251cm-1处为B-O特征峰。用HL5500霍尔测试系统测得此氮化硼薄膜为n型半导体,其掺杂浓度为1019cm-3,迁移率为193.67cm2/Vs,电阻率为2.1×10-3Ωcm。图6为实施例1~4制得的n型氮化硼薄膜/p型硅异质pn结在室温下的I-V曲线图。测试结果表明,室温下实施例4所制备的异质pn结在±5V处的整流率约为3,反向漏电流约为1.6×10-5A,具有明显的整流特性。在最大电压量程约±10V处,仍未获得饱和时的最大整流率,但从趋势看正向电流远未达到饱和,即pn结的实际整流率更高,且击穿电压大于10V。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。

Claims (10)

1.一种n型碳掺杂氮化硼薄膜/p型单晶硅异质pn结原型器件的制备方法,其特征在于,为以下步骤:
(1)采用磁控溅射方法在p型单晶硅基底上制备碳掺杂氮化硼薄膜;所述p型单晶硅基底的厚度为100~500μm,所述p型单晶硅基底的电阻率为1~5Ωcm,所述磁控溅射的靶材为含碳的六角氮化硼靶;
所述磁控溅射方法按以下步骤进行:
对磁控溅射室进行预抽真空后加热所述p型单晶硅基底至25~800℃;
继续对磁控溅射室抽真空,直至达到1×10-4~1×10-5Pa后;
向磁控溅射室通入氩气50~100sccm和氮气0~50sccm至工作气压1~3Pa;
施加p型单晶硅基底负偏压0~-200V;
控制p型单晶硅基底和靶材的距离为4~8cm;
设置靶溅射功率80~200W并起辉;
进行薄膜溅射,溅射的时间为30min~3h,制备得到碳掺杂的氮化硼薄膜;所述碳掺杂的氮化硼薄膜的厚度为100~1000nm,所述碳掺杂的氮化硼薄膜的电阻率为10-4~10-3Ωcm,所述碳掺杂的氮化硼薄膜的碳掺杂浓度为1018~1020cm-3,即得到所述n型碳掺杂氮化硼薄膜/p型单晶硅异质pn结;
(2)分别在n型碳掺杂氮化硼薄膜/p型单晶硅异质pn结两侧制备Ag接触电极,即制得所述n型碳掺杂氮化硼薄膜/p型单晶硅异质pn结原型器件。
2.根据权利要求1所述的制备方法,其特征在于,对磁控溅射室进行预抽真空后加热所述p型单晶硅基底至100~600℃。
3.根据权利要求1所述的制备方法,其特征在于,抽真空后,向磁控溅射室通入氩气50sccm和氮气0~50sccm至工作气压1~3Pa。
4.根据权利要求1所述的制备方法,其特征在于,向磁控溅射室通入氩气和氮气至工作气压后,施加所述p型单晶硅基底负偏压-100~-150V。
5.根据权利要求1所述的制备方法,其特征在于,向磁控溅射室通入氩气和氮气至工作气压后,控制所述p型单晶硅基底和靶材的距离为6~8cm。
6.根据权利要求1所述的制备方法,其特征在于,向磁控溅射室通入氩气和氮气至工作气压后,设置靶溅射功率120~150W并起辉。
7.根据权利要求1所述的制备方法,其特征在于,进行薄膜溅射,溅射的时间为2h。
8.根据权利要求1所述的制备方法,其特征在于,所述p型单晶硅基底依次在丙酮、乙醇、去离子水中超声清洗后,用氮气吹干。
9.权利要求1所述的制备方法制得的一种n型碳掺杂氮化硼薄膜/p型单晶硅异质pn结原型器件,其特征在于,包括n型碳掺杂氮化硼薄膜层、p型单晶硅层和设置在n型碳掺杂氮化硼薄膜/p型单晶硅异质pn结两侧的Ag接触电极,所述n型碳掺杂氮化硼薄膜层与p型单晶硅层之间形成异质结,所述n型碳掺杂氮化硼薄膜层是磁控溅射含碳的六角氮化硼靶形成的n型碳掺杂氮化硼薄膜层;所述p型单晶硅层的厚度为100~500μm,所述p型单晶硅层的电阻率为1~5Ωcm,所述n型碳掺杂氮化硼薄膜层的厚度为100~1000nm,所述n型碳掺杂氮化硼薄膜层中碳的掺杂浓度为1018~1020cm-3,所述n型碳掺杂氮化硼薄膜层的电阻率为10-4~10-3Ωcm。
10.权利要求9所述一种n型氮化硼薄膜/p型单晶硅异质pn结原型器件在半导体器件领域的应用。
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