CN113644042B - 半导体封装件 - Google Patents

半导体封装件 Download PDF

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Publication number
CN113644042B
CN113644042B CN202110490195.2A CN202110490195A CN113644042B CN 113644042 B CN113644042 B CN 113644042B CN 202110490195 A CN202110490195 A CN 202110490195A CN 113644042 B CN113644042 B CN 113644042B
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package
semiconductor
semiconductor element
drivers
insulating
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CN113644042A (zh
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今西元纪
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

得到能够防止绝缘性能和可靠性的下降、改善成本和安装性的半导体封装件。内置用封装件(5)包含对半导体元件(1a、1b、1c)进行驱动的多芯片结构的绝缘驱动器(3a、3b、3c)。导线(7a、7b、7c)将内置用封装件(5)与半导体元件(1a、1b、1c)连接。树脂(8)将半导体元件(1a、1b、1c)、引线框(6)、内置用封装件(5)以及导线(7a、7b、7c)封装。内置用封装件(5)与引线框(6)直接接合。

Description

半导体封装件
技术领域
本发明涉及半导体封装件。
背景技术
作为传递模塑型功率模块，使用在传递形成的封装件内还封装有另1个内置用封装件的PIP(Package in package)。当前，内置用封装件被间隔件等支撑而搭载于基板，整体被树脂进行了封装(例如，参照专利文献1的第0062段、图2)。
专利文献1：日本特开2008-198907号公报
就传递型功率模块而言，在引线框上安装有在高电压下进行动作的功率器件。如果间隔件与功率器件接近，则由于沿面距离的不足而使绝缘性能下降。另外，功率模块有时在高温下等严苛的条件下使用，封装件承受到应力，因此存在间隔件破损，可靠性下降这样的问题。
另外，以往的传递型功率模块的高压侧驱动部呈内置了HVIC电平移位器的单芯片结构。但是，就HVIC电平移位器而言，通信速度、误动作的防止等存在极限。因此，需要使用搭载了信号绝缘的绝缘驱动器。绝缘驱动器为了将输入侧与输出侧绝缘，呈将多个芯片封装于一个封装件的多芯片结构。为了将该多芯片结构安装于当前的引线框上，需要开发新引线框，成本和安装性存在问题。
发明内容
本发明就是为了解决上述这样的课题而提出的，其目的在于，得到能够防止绝缘性能和可靠性的下降、改善成本和安装性的半导体封装件。
本发明涉及的半导体封装件的特征在于，具有：半导体元件；引线框；内置用封装件，其包含对所述半导体元件进行驱动的多芯片结构的绝缘驱动器；导线，其将所述内置用封装件与所述半导体元件连接；以及树脂，其将所述半导体元件、所述引线框、所述内置用封装件以及所述导线封装，所述内置用封装件与所述引线框直接接合。
发明的效果
在本发明中，将包含多芯片结构的绝缘驱动器的内置用封装件直接接合于引线框之上。由此，不需要用于对内置用封装件进行支撑的间隔件等机构。由此，能够防止绝缘性能和可靠性的下降。另外，由于不需要为了将内置用封装件直接接合于引线框之上而开发新引线框，因此能够改善成本和安装性。
附图说明
图1是实施方式1涉及的半导体封装件的电路图。
图2是表示实施方式1涉及的半导体封装件的内部的俯视图。
图3是表示内置用封装件的内部结构的图。
图4是表示内置用封装件的外形的斜视图。
图5是表示安装了内置用封装件的状态的斜视图。
图6是实施方式2涉及的半导体封装件的电路图。
图7是表示实施方式2涉及的半导体封装件的内部的俯视图。
图8是实施方式3涉及的半导体封装件的电路图。
图9是表示实施方式3涉及的半导体封装件的内部的俯视图。
具体实施方式
参照附图，对实施方式涉及的半导体封装件进行说明。对相同或者相应的结构要素标注相同的标号，有时省略重复说明。
实施方式1.
图1是实施方式1涉及的半导体封装件的电路图。该半导体封装件是传递型功率模块。P侧半导体元件1a、1b、1c以及N侧半导体元件1d、1e、1f是IGBT，是3相逆变器的开关元件。二极管2a～2f是续流二极管(Freewheeling Diode)，分别与各半导体元件1a～1f反向并联连接。
3个高压侧绝缘驱动器3a、3b、3c根据来自MCU(Micro Controller Unit)的输入信号而分别对3相的P侧半导体元件1a、1b、1c进行驱动。3个低压侧驱动器4a、4b、4c根据输入信号而分别对3相的N侧半导体元件1d、1e、1f进行驱动。3个高压侧绝缘驱动器3a、3b、3c被集中于1个内置用封装件5。
图2是表示实施方式1涉及的半导体封装件的内部的俯视图。P侧半导体元件1a、1b、1c的集电极以及二极管2a、2b、2c的阴极通过焊料等而与P端子连接。N侧半导体元件1d的集电极以及二极管2d的阴极通过焊料等而与U端子连接。N侧半导体元件1e的集电极以及二极管2e的阴极通过焊料等而与V端子连接。N侧半导体元件1f的集电极以及二极管2f的阴极通过焊料等而与W端子连接。半导体元件1a～1f的发射极分别与二极管2a～2f的阳极通过导线连接。二极管2a～2f的阳极分别与U端子、V端子、W端子、UN端子、VN端子、WN端子通过导线连接。
内置用封装件5被安装于引线框6之上。内置用封装件5的高压侧绝缘驱动器3a、3b、3c分别通过导线7a、7b、7c而与P侧半导体元件1a、1b、1c的栅极连接。低压侧驱动器4a、4b、4c分别通过导线7d、7e、7f而与N侧半导体元件1d、1e、1f的栅极连接。
内置用封装件5以及低压侧驱动器4a、4b、4c分别与将输入信号从外部的MCU输入的输入端子通过导线连接。树脂8将半导体元件1a～1f、二极管2a～2f、内置用封装件5、引线框6以及导线7a～7f、各端子等封装。
图3是表示内置用封装件的内部结构的图。在引线框9之上安装有调制IC 10和绝缘元件11a、11b、11c。调制IC 10对输入信号进行调制。绝缘元件11a、11b、11c是绝缘变压器等。绝缘元件11a、11b、11c的输入侧与输出侧电绝缘，因此，绝缘元件11a、11b、11c能够保持着绝缘而对来自调制IC 10的信号进行传输。驱动电路12a是对绝缘元件11a的输出信号进行解调，生成对半导体元件1a进行驱动的驱动信号的U相驱动器IC。驱动电路12b是对绝缘元件11b的输出信号进行解调，生成对半导体元件1b进行驱动的驱动信号的V相驱动器IC。驱动电路12c是对绝缘元件11c的输出信号进行解调，生成对半导体元件1c进行驱动的驱动信号的W相驱动器IC。
绝缘驱动器3a具有调制IC 10、绝缘元件11a以及驱动电路12a，但这些结构无法由1个芯片构成。因此，绝缘驱动器3a呈将多个芯片封装于一个封装件的多芯片结构。绝缘驱动器3b、3c也同样地呈多芯片结构。这些绝缘驱动器3a、3b、3c被树脂13封装而构成内置用封装件5。在内置用封装件5内，框被分离开，U相、V相、W相的驱动电路12a、12b、12c相对于输入侧而各自确保了绝缘性。
图4是表示内置用封装件的外形的斜视图。内置用封装件5是QFN(Quad Flat Non-lead)封装件，具有彼此相对的第1主面和第2主面。沿着四边形的内置用封装件5的第2主面的四条边而设置有多个电极焊盘14a、14b、14c。电极焊盘14a、14b、14c分别与内置用封装件5的内部的绝缘驱动器3a、3b、3c连接。由于QFN封装件未引出引线端子，因此能够小型化。
图5是表示安装了内置用封装件的状态的斜视图。内置用封装件5的第1主面经由银膏或者树脂膏等接合材料而与引线框6直接接合。即，在内置用封装件5与引线框6之间仅存在接合材料，不存在间隔件等机构。设置有电极焊盘14a、14b、14c的第2主面朝上，因此，能够容易地通过导线7a、7b、7c而将电极焊盘14a、14b、14c与P侧半导体元件1a、1b、1c连接。
如以上所说明的这样，在本实施方式中，将多芯片结构的绝缘驱动器3a、3b、3c集中于1个内置用封装件5，将内置用封装件5直接接合于引线框6之上。由此，不需要用于对内置用封装件5进行支撑的间隔件等机构。因此，能够防止绝缘性能和可靠性的下降。因此，本实施方式的半导体模块能够用于功率模块这样的要求高绝缘性和可靠性的用途。
另外，将内置用封装件5直接接合于引线框6之上。因此，不需要新引线框的开发，能够沿用以往的功率模块的引线框。因此，能够改善成本和安装性。
以往，对半导体元件使用AL导线，对驱动器芯片使用由Au或者Ag等AL以外的材质构成的导线。与此相对，在本实施方式中，能够使用AL导线作为键合至内置用封装件5的电极焊盘14a、14b、14c的导线7a、7b、7c。由此，不需要针对半导体元件和绝缘驱动器而区分使用导线材料，因此制造性提高。另外，通过使用AL导线，从而与Au导线或者Ag导线相比，能够降低成本。
另外，在本实施方式中，3个高压侧绝缘驱动器3a、3b、3c被集中于1个内置用封装件5。由此，每个相的传输速度的差异变小，因此，与使用了以往的电平移位器的P侧栅极驱动器相比，能够高速动作。另外，由于P侧的基准电位的配线的绕引变少，因此，寄生L成分变小，能够防止由次级侧基准电位变动引起的误动作。
这里，低压侧驱动器4a、4b、4c的基准电位与客户的系统的基准电位在同电位下使用，因此，在动作上，低压侧驱动器4a、4b、4c的信号绝缘并非是必须的。因此，低压侧驱动器4a、4b、4c不是绝缘驱动器，分别由廉价的Si芯片构成。由此，能够降低成本。
实施方式2.
图6是实施方式2涉及的半导体封装件的电路图。图7是表示实施方式2涉及的半导体封装件的内部的俯视图。与实施方式1同样地，3个高压侧绝缘驱动器3a、3b、3c被集中于1个内置用封装件5。这里，根据用途，有时为了消除由半导体模块与客户的系统之间的噪声造成的影响，低压侧驱动器也需要信号绝缘。因此，在本实施方式中，使用低压侧绝缘驱动器3d、3e、3f作为分别对3相的N侧半导体元件1d、1e、1f进行驱动的低压侧驱动器。另外，与实施方式1的高压侧绝缘驱动器3a、3b、3c同样地，将3个低压侧绝缘驱动器3d、3e、3f集中于1个内置用封装件15。由此，能够达成半导体模块与客户的系统之间的信号绝缘。另外，作为功率模块，能够实现完全的信号绝缘。其它结构以及效果与实施方式1相同。
实施方式3.
图8是实施方式3涉及的半导体封装件的电路图。图9是表示实施方式3涉及的半导体封装件的内部的俯视图。P侧/N侧共6相即3个高压侧绝缘驱动器3a、3b、3c和3个低压侧绝缘驱动器3d、3e、3f被集中于1个内置用封装件16。由此，能够使装置小型化，减少配线。其它结构以及效果与实施方式2相同。
此外，半导体元件1a～1f不限于由硅形成，也可以由与硅相比带隙大的宽带隙半导体形成。宽带隙半导体例如是碳化硅、氮化镓类材料或者金刚石。由这样的宽带隙半导体形成的半导体元件由于耐电压性、容许电流密度高，因此能够小型化。通过使用该小型化的半导体元件，从而组装了该半导体元件的半导体模块也能够小型化、高集成化。另外，半导体元件的耐热性高，因此能够使散热器的散热鳍片小型化，能够使水冷部空冷化，因而能够使半导体模块进一步小型化。另外，半导体元件的电力损耗低且高效，因此，能够使半导体模块高效化。
并且，如果半导体元件1a～1f是SiC元件，则能够通过绝缘驱动器的绝缘性和高速性而实现SiC元件的高耐压、高频驱动这些优点。另外，如果半导体元件1a～1f是GaN元件，则就GaN元件的特征即高载流子(high carrier)驱动而言，能够有效利用绝缘驱动器的高速性。
标号的说明
1a、1b、1c P侧半导体元件(半导体元件)，1d、1e、1f N侧半导体元件(半导体元件)，3a、3b、3c高压侧绝缘驱动器(绝缘驱动器)，3d、3e、3f低压侧绝缘驱动器(绝缘驱动器)，5内置用封装件，6引线框，7a～7f导线，8树脂，14a、14b、14c电极焊盘。

Claims (9)

1.一种半导体封装件，其特征在于，具有：
半导体元件；
引线框；
内置用封装件，其通过第1树脂封装有对所述半导体元件进行驱动的多芯片结构的绝缘驱动器；
导线，其将所述内置用封装件与所述半导体元件连接；以及
第2树脂，其将所述半导体元件、所述引线框、所述内置用封装件以及所述导线封装，
所述绝缘驱动器具有对输入信号进行调制的调制IC的芯片、保持着绝缘而对来自所述调制IC的信号进行传输的绝缘元件、对所述绝缘元件的输出信号进行解调的驱动电路的芯片，
所述内置用封装件的外表面与所述引线框直接接合。
2.根据权利要求1所述的半导体封装件，其特征在于，
所述内置用封装件具有彼此相对的第1主面和第2主面，
所述第1主面与所述引线框接合，
在所述第2主面设置有与所述绝缘驱动器连接的电极焊盘，
所述电极焊盘通过所述导线而与所述半导体元件连接。
3.根据权利要求1或2所述的半导体封装件，其特征在于，
所述导线是AL导线。
4.根据权利要求1或2所述的半导体封装件，其特征在于，
所述半导体元件具有3相的P侧半导体元件，
所述绝缘驱动器具有分别对所述3相的P侧半导体元件进行驱动的3个高压侧绝缘驱动器，
所述3个高压侧绝缘驱动器被集中于1个所述内置用封装件。
5.根据权利要求1或2所述的半导体封装件，其特征在于，
所述半导体元件具有3相的P侧半导体元件和3相的N侧半导体元件，
所述绝缘驱动器具有分别对所述3相的P侧半导体元件进行驱动的3个高压侧绝缘驱动器和分别对所述3相的N侧半导体元件进行驱动的3个低压侧绝缘驱动器，
所述内置用封装件具有第1内置用封装件及第2内置用封装件，
所述3个高压侧绝缘驱动器被集中于1个所述第1内置用封装件，
所述3个低压侧绝缘驱动器被集中于1个所述第2内置用封装件。
6.根据权利要求1或2所述的半导体封装件，其特征在于，
所述半导体元件具有3相的P侧半导体元件和3相的N侧半导体元件，
所述绝缘驱动器具有分别对所述3相的P侧半导体元件进行驱动的3个高压侧绝缘驱动器和分别对所述3相的N侧半导体元件进行驱动的3个低压侧绝缘驱动器，
所述3个高压侧绝缘驱动器和所述3个低压侧绝缘驱动器被集中于1个所述内置用封装件。
7.根据权利要求1或2所述的半导体封装件，其特征在于，
所述半导体元件由宽带隙半导体形成。
8.根据权利要求7所述的半导体封装件，其特征在于，
所述半导体元件是SiC元件。
9.根据权利要求7所述的半导体封装件，其特征在于，
所述半导体元件是GaN元件。
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101682291A (zh) * 2007-11-20 2010-03-24 爱信艾达株式会社 电机控制装置
CN102931182A (zh) * 2012-11-12 2013-02-13 杭州士兰微电子股份有限公司 紧凑型单相集成驱动电路的封装装置及单相集成驱动电路
CN105655314A (zh) * 2014-05-13 2016-06-08 快捷韩国半导体有限公司 半导体封装体

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3074099B2 (ja) * 1993-09-30 2000-08-07 シャープ株式会社 ソリッドステートリレー及びその製造方法
US20030107120A1 (en) * 2001-12-11 2003-06-12 International Rectifier Corporation Intelligent motor drive module with injection molded package
JP2006280148A (ja) * 2005-03-30 2006-10-12 Toyota Motor Corp 電圧制御装置
JP2008198907A (ja) 2007-02-15 2008-08-28 Toyobo Co Ltd パッケージ・イン・パッケージ型半導体装置
US7834575B2 (en) * 2008-04-01 2010-11-16 International Rectifier Corporation Gate-driver IC with HV-isolation, especially hybrid electric vehicle motor drive concept
US8587101B2 (en) * 2010-12-13 2013-11-19 International Rectifier Corporation Multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections
JP5714455B2 (ja) 2011-08-31 2015-05-07 ルネサスエレクトロニクス株式会社 半導体集積回路
WO2016002385A1 (ja) * 2014-07-03 2016-01-07 日産自動車株式会社 ハーフブリッジパワー半導体モジュール及びその製造方法
EP3460979A4 (en) 2016-07-01 2020-01-22 Rohm Co., Ltd. SEMICONDUCTOR COMPONENT
JP2019012767A (ja) * 2017-06-30 2019-01-24 ルネサスエレクトロニクス株式会社 半導体モジュールの製造方法および半導体モジュール
US10622274B2 (en) * 2017-10-06 2020-04-14 Industrial Technology Research Institute Chip package
JP7238277B2 (ja) * 2018-06-14 2023-03-14 富士電機株式会社 半導体装置、リードフレーム及び半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101682291A (zh) * 2007-11-20 2010-03-24 爱信艾达株式会社 电机控制装置
CN102931182A (zh) * 2012-11-12 2013-02-13 杭州士兰微电子股份有限公司 紧凑型单相集成驱动电路的封装装置及单相集成驱动电路
CN105655314A (zh) * 2014-05-13 2016-06-08 快捷韩国半导体有限公司 半导体封装体

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