CN113612489B - 接收电路、包括该接收电路的半导体装置和半导体系统 - Google Patents

接收电路、包括该接收电路的半导体装置和半导体系统 Download PDF

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Publication number
CN113612489B
CN113612489B CN202110695884.7A CN202110695884A CN113612489B CN 113612489 B CN113612489 B CN 113612489B CN 202110695884 A CN202110695884 A CN 202110695884A CN 113612489 B CN113612489 B CN 113612489B
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signal
positive
negative
noise
voltage level
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CN202110695884.7A
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Chinese (zh)
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CN113612489A (zh
Inventor
李贤培
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SK Hynix Inc
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SK Hynix Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/1018—Means associated with receiver for limiting or suppressing noise or interference noise filters connected between the power supply and the receiver
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/109—Control signal input circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/12—Neutralising, balancing, or compensation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/18—Input circuits, e.g. for coupling to an antenna or a transmission line
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03114—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals
    • H04L25/03133—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals with a non-recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0091—Transmitter details

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
CN202110695884.7A 2018-11-05 2019-08-28 接收电路、包括该接收电路的半导体装置和半导体系统 Active CN113612489B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR10-2018-0134534 2018-11-05
KR1020180134534A KR102661493B1 (ko) 2018-11-05 2018-11-05 수신 회로, 이를 이용하는 반도체 장치 및 반도체 시스템
CN201910801329.0A CN111147093B (zh) 2018-11-05 2019-08-28 接收电路、包括该接收电路的半导体装置和半导体系统

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CN113612489B true CN113612489B (zh) 2023-03-10

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CN201910801329.0A Active CN111147093B (zh) 2018-11-05 2019-08-28 接收电路、包括该接收电路的半导体装置和半导体系统

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US (2) US10727884B2 (ko)
KR (2) KR102661493B1 (ko)
CN (2) CN113612489B (ko)
TW (1) TWI805833B (ko)

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KR102487430B1 (ko) * 2018-05-10 2023-01-11 에스케이하이닉스 주식회사 기준전압 생성 회로, 이를 이용하는 버퍼, 반도체 장치 및 반도체 시스템
KR102684575B1 (ko) 2019-02-26 2024-07-15 에스케이하이닉스 주식회사 수신 회로, 이를 포함하는 반도체 장치 및 반도체 시스템
CN117393009A (zh) * 2022-07-04 2024-01-12 长鑫存储技术有限公司 数据接收电路、数据接收系统以及存储装置

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CN103346778A (zh) * 2013-07-04 2013-10-09 北京大学 一种宽带线性均衡电路
CN103746671A (zh) * 2014-01-24 2014-04-23 南京邮电大学 一种高增益高补偿范围的均衡滤波器

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JP3737058B2 (ja) * 2002-03-12 2006-01-18 沖電気工業株式会社 アナログ加減算回路、主増幅器、レベル識別回路、光受信回路、光送信回路、自動利得制御増幅回路、自動周波数特性補償増幅回路、及び発光制御回路
US6653895B1 (en) * 2002-06-12 2003-11-25 Texas Instruments Incorporated Gain-boost nulling amplifier for auto-zero circuit
US7206366B2 (en) * 2002-08-07 2007-04-17 Broadcom Corporation System and method for programmably adjusting gain and frequency response in a 10-GigaBit ethernet/fibre channel system
US7271623B2 (en) 2004-12-17 2007-09-18 Rambus Inc. Low-power receiver equalization in a clocked sense amplifier
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WO2013158106A1 (en) * 2012-04-19 2013-10-24 Intel Corporation Unequalized clock data recovery for serial i/o receiver
KR20170013040A (ko) 2015-07-27 2017-02-06 에스케이하이닉스 주식회사 버퍼, 반도체 장치 및 이를 이용한 반도체 시스템
KR20170024807A (ko) 2015-08-26 2017-03-08 에스케이하이닉스 주식회사 반도체 장치 및 이를 위한 수신회로
KR20170025883A (ko) * 2015-08-31 2017-03-08 에스케이하이닉스 주식회사 버퍼 회로, 이를 이용하는 리시버 및 시스템
KR20170077933A (ko) * 2015-12-28 2017-07-07 에스케이하이닉스 주식회사 반도체 장치
KR102432873B1 (ko) * 2016-02-05 2022-08-17 에스케이하이닉스 주식회사 리시버 회로 및 이를 이용하는 시스템
KR20180003938A (ko) * 2016-07-01 2018-01-10 삼성전자주식회사 수신 인터페이스 회로 및 이를 포함하는 메모리 시스템
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CN103346778A (zh) * 2013-07-04 2013-10-09 北京大学 一种宽带线性均衡电路
CN103746671A (zh) * 2014-01-24 2014-04-23 南京邮电大学 一种高增益高补偿范围的均衡滤波器

Also Published As

Publication number Publication date
KR20230175165A (ko) 2023-12-29
CN111147093A (zh) 2020-05-12
US20200321993A1 (en) 2020-10-08
CN111147093B (zh) 2021-09-28
TWI805833B (zh) 2023-06-21
US10727884B2 (en) 2020-07-28
KR20200051890A (ko) 2020-05-14
CN113612489A (zh) 2021-11-05
KR102661493B1 (ko) 2024-04-30
US10790864B1 (en) 2020-09-29
US20200145036A1 (en) 2020-05-07
TW202023208A (zh) 2020-06-16
KR102661496B1 (ko) 2024-04-26

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