CN113497022A - 电子系统、晶粒组件及元件晶粒 - Google Patents

电子系统、晶粒组件及元件晶粒 Download PDF

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Publication number
CN113497022A
CN113497022A CN202110367592.0A CN202110367592A CN113497022A CN 113497022 A CN113497022 A CN 113497022A CN 202110367592 A CN202110367592 A CN 202110367592A CN 113497022 A CN113497022 A CN 113497022A
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landing
pads
die
landing pad
pad
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CN202110367592.0A
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杨吴德
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Nanya Technology Corp
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Nanya Technology Corp
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Abstract

本公开提供一种元件晶粒、一种晶粒组件、及一种电子系统。该元件晶粒包括一封装体和多个转接垫，其设置于该封装体的一功能性表面上。所述多个转接垫被分为与彼此电性隔离的多个区段。在相邻对的转接垫中，转接垫之间只存在一个电性连接，包括其中一转接垫中的一区段电性连接至另一转接垫中的一区段。该晶粒组件包括以阶梯式配置堆叠的一对元件晶粒。该电子系统包括具有至少一金属层的一支撑件；以及多个元件晶粒，其设置于该支撑件上并通过多个条导线机械性且电性耦合至该金属层。

Description

电子系统、晶粒组件及元件晶粒
技术领域
本公开涉及一种元件晶粒、一种晶粒组件、及一种电子系统。特别涉及一种具有内连线结构的元件晶粒，其有效降低导线电容(wiring capacitance)、包括该元件晶粒的三维(3D)晶粒组件以改善信号传递速度、以及包括该晶粒组件的电子系统。
背景技术
半导体元件已运用在各种电子应用上，像是个人电脑、手机、数码相机、以及其他的电子设备。半导体元件的制造通常会按序将材料的各绝缘层或介电层、导电层、及半导体层沉积在半导体晶片之上，并且利用光刻工艺将各材料层图案化以形成其上的电路构件和元件。许多集成电路通常制造在单一半导体晶片上，并且沿着切割线(scribe line)在集成电路之间锯切而将晶片上个别的晶粒单一化。个别的晶粒通常会分别地封装在例如多芯片模块(modules)中或是在其他类型的封装中。
半导体工业通过持续地降低最小部件尺寸，不断增加各种电子元件(例如：晶体管、二极管、电阻器、电容)的积集度，使得更多的元件可集中在一给定区域中。在一些应用中，相较于过去的封装体，这些较小型的电子元件也需要利用较小区域的较小封装体。
三维集成电路(3DICs)是半导体封装中的最新发展，其中多个半导体晶粒彼此堆叠，像是堆叠式封装(package on package；PoP)和系统级封装(system-in-package；SiP)的封装技术。三维集成电路提供了更高的积集密度和其他优点，像是更快的速度和更大的带宽，这是因为例如堆叠晶粒之间的内连线长度降低。然而，存在许多与三维集成电路相关的挑战。
上文的“现有技术”说明仅是提供背景技术，并未承认上文的“现有技术”说明公开本公开的标的，不组成本公开的现有技术，且上文的“现有技术”的任何说明均不应做为本公开的任一部分。
发明内容
本公开的一方面提供一种元件晶粒。该元件晶粒包括一封装体、一对转接垫(transfer pad)、以及至少一导线(conductive trace)。该封装体具有一功能性表面。该对转接垫设置于该封装体的该功能性表面上。所述多个转接垫被分为与彼此电性隔离的多个区段。该导线设置于该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段。
在一些实施例中，该对转接垫包括相互配合的互补形凸起和凹陷区段。
在一些实施例中，该对转接垫包括一第一转接垫和一第二转接垫，设置于该封装体的该功能性表面上，其中该第一转接垫包括一第一凹入区段以及与该第一凹入区段电性隔离的一第一凸出区段，且该第二转接垫包括一第二凹入区段以及与该第二凹入区段电性隔离的一第二凸出区段。该导线将该第一转接垫中的该第一凹入区段电性连接至该第二转接垫中的该第二凸出区段。
在一些实施例中，所述多个转接垫的所述多个区段具有一相同的面积。
在一些实施例中，该元件晶粒还包括至少一接触垫，设置于该功能性表面上并位于靠近该封装体的一边缘处，其中所述多个转接垫与该接触垫对齐。
本公开的另一方面提供一种晶粒组件。该晶粒组件包括以阶梯式配置堆叠的一对元件晶粒。所述多个元件晶粒的至少一者包括一封装体、一对转接垫、以及至少一导线。该封装体具有一功能性表面。该对转接垫设置于该封装体的该功能性表面上。所述多个转接垫被分为与彼此电性隔离的多个区段。该导线设置于该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段。该对元件晶粒通过一内连线与彼此机械性且电性地耦合，该内连线包括一打线(wire)，其通过球焊(ball bonding)附接至两元件晶粒中的其中一转接垫的该区段。
在一些实施例中，该转接垫包括相互配合的互补形凸起和凹陷区段。
在一些实施例中，该对转接垫包括一第一转接垫和一第二转接垫，设置于该封装体的该功能性表面上，其中该第一转接垫包括一第一凹入区段以及与该第一凹入区段电性隔离的一第一凸出区段，且该第二转接垫包括一第二凹入区段以及与该第二凹入区段电性隔离的一第二凸出区段。该导线将该第一转接垫中的该第一凹入区段电性连接至该第二转接垫中的该第二凸出区段。
在一些实施例中，所有所述多个转接垫的所述多个区段具有一相同的面积。
在一些实施例中，至少一元件晶粒还包括至少一接触垫，设置于该功能性表面上并位于靠近该封装体的一边缘处，其中所述多个转接垫与该接触垫对齐。
在一些实施例中，所述多个元件晶粒以一阶梯式配置排列。
本公开的另一方面提供一种电子系统。该电子系统包括一支撑件以及设置于该支撑件上的多个元件晶粒。该支撑件包括至少一金属层。所述多个元件晶粒设置于该支撑件上并通过多个条导电串列(conductive strings，导电串行的)机械性且电性地耦合至该金属层。至少一元件晶粒包括一封装体、一对转接垫、以及至少一导线。该封装体具有一功能性表面。该对转接垫设置于该封装体的该功能性表面上。所述多个转接垫被分为与彼此电性隔离的多个区段。该导线设置于该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段。所述多个元件晶粒通过多个内连线与彼此机械性且电性地耦合，所述多个内连线包括一打线，其通过球焊附接至两元件晶粒中的其中一转接垫。
在一些实施例中，该导电串列通过订合式接合(stitch bonding)耦接该接触垫和该金属层。
在一些实施例中，该转接垫包括相互配合的互补形凸起和凹陷区段。
在一些实施例中，该对转接垫包括一第一转接垫和一第二转接垫，设置于该封装体的该功能性表面上，其中该第一转接垫包括一第一凹入区段以及与该第一凹入区段电性隔离的一第一凸出区段，且该第二转接垫包括一第二凹入区段以及与该第二凹入区段电性隔离的一第二凸出区段。该导线将该第一转接垫中的该第一凹入区段电性连接至该第二转接垫中的该第二凸出区段。
在一些实施例中，所有所述多个转接垫的所述多个区段具有一相同的面积。
在一些实施例中，该电子系统还包括至少一接触垫，设置于该功能性表面上并位于靠近该封装体的一边缘处，其中所述多个转接垫与该接触垫对齐。
在一些实施例中，所述多个元件晶粒的其中一者通过一导电串列机械性且电性地耦合至该支撑层，其中该导电串列直接接触该金属层和该接触垫。
利用具有分离成多个区段的转接垫的元件晶粒的上述配置，可有效地降低包括两个或更多个元件晶粒的晶粒组件的导线电容，以改善信号传递速度。
上文已相当广泛地概述本公开的技术特征及优点，从而使下文的本公开详细描述得以获得优选了解。组成本公开的权利要求标的的其它技术特征及优点将描述于下文。本公开所属技术领域中技术人员应了解，可相当容易地利用下文公开的概念与特定实施例可做为修改或设计其它结构或工艺而实现与本公开相同的目的。本公开所属技术领域中技术人员亦应了解，这类等效建构无法脱离权利要求所界定的本公开的构思和范围。
附图说明
本公开各方面可配合以下附图及详细说明阅读以便了解。要强调的是，依照工业上的标准惯例，各个部件(feature)并未按照比例绘制。事实上，为了清楚的讨论，可能任意的放大或缩小各个部件的尺寸。
图1是根据本公开一些实施例显示电子系统的透视图。
图2是根据本公开一些实施例显示电子系统的剖面图。
图3是根据本公开一些实施例显示元件晶粒中的核心电路的部分电路方框图。
图4是根据本公开一些实施例显示元件晶粒中的接触垫和转接垫的布局配置示意图。
图5是根据本公开一些实施例显示元件晶粒的示意图，其转接垫通过内连线机械性且电性地连接。
图6是根据本公开一些实施例显示电子系统的透视图。
图7是根据本公开一些实施例显示电子系统的剖面图。
图8是根据本公开一些实施例显示主要晶粒或从属晶粒的接触垫和转接垫的布局配置示意图。
图9A至图9D是根据本公开一些实施例显示转接垫的平面图。
图10是根据本公开一些实施例显示主要晶粒或从属晶粒的示意图，其转接垫通过内连线机械性且电性地连接。
图11和图12是根据本公开一些实施例显示晶粒组件的电路方框图。
附图标记说明：
10：电子系统
20：支撑件
30：晶粒组件
40：电子系统
50：支撑件
60：晶粒组件
70：密封剂
80：电脑
110：粘着层
120：焊锡凸块
130：粘着层
131：第一导电串列
210：基板
212：前表面
214：后表面
220：金属层
230：导电通孔
310：元件晶粒
312：封装体
3122：功能性表面
314：接触垫
316：转接垫
318：串列
319：连接
320a：第一输入接收器
320b：第二输入接收器
330：第二导电串列
334：球焊
410：粘着层
420：焊锡凸块
430：导电串列
510：基板
512：前表面
514：后表面
520：金属层
530：导电通孔
610：主要晶粒
620：从属晶粒
630：粘合层
632：封装体
634：接触垫
636：转接垫
638：串列
640：导线
650：内连线
650a：第一输入接收器
650b：第二输入接收器
652：打线
654：球焊
6322：功能性表面
6362：区段
6362a：区段
6362b：区段
6362c：区段
712：顶表面
A：节点
B：节点
具体实施方式
现在使用特定的语言描述附图所示的本公开实施例或示例。应理解的是，此处无意限制本公开的范围。所述实施例的任何改变或修改，以及本文所述原理的任何进一步应用，都被视为是本公开相关技术领域技术人员可思及的。本公开可能在不同实施例中重复参照符号，但即使它们共用相同的参照符号，也不一定意味着一实施例的部件适用于另一实施例。
应理解的是，尽管本文可以使用用语第一、第二、第三等来描述各种元件、构件、区域、层、或部分，但是这些构件、区域、层、或部分不受到这些用语的限制。相反地，这些用语仅用于区分一个元件、构件、区域、层、或部分与另一个元件、构件、区域、层、或部分。因此，例如，在不脱离本公开概念的情况下，以下所讨论的第一元件、构件、区域、层、或部分可以被称为第二元件、构件、区域、层、或部分。
本文使用的用语仅出于描述特定示例实施例的目的，并且不用以限制本公开的概念。如本文所使用的，除非上下文另外明确指出，单数形式的“一(a/an)”和“该”也包括多个形式。应理解的是，在本说明书中使用用语“包括(comprises)”和“包含(comprising)”时指出所述的部件、整数、步骤、操作、元件、或构件的存在，但不排除存在或增加一个或多个其他部件、整数、步骤、操作、元件、构件、或前述的组合。
图1是根据本公开一些实施例显示电子系统10的透视图，且图2是根据本公开一些实施例显示电子系统10的剖面图。参照图1和图2，电子系统10包括支撑件20和设置于支撑件20上的晶粒组件30。晶粒组件30可包括动态随机存取存储器(dynamic random accessmemory；DRAM)模块，并且通过打线接合(wire bonding)电性连接至支撑件20。在一些实施例中，可使用粘着层110将晶粒组件30固定于支撑件20，该粘着层110可例如由双面粘着聚酰亚胺胶带组成，以提高可靠性。
支撑件20包括基板210和多个金属层220，其中该基板210具有前表面212和相对于前表面212的后表面214，且所述多个金属层220设置于前表面212和后表面214上。将金属层220图案化以提供适当的电路，并通过导电通孔230进行连接。支撑件20可为双面印刷电路板(double-sided printed circuit board；PCB)。粘着层110提供于基板210的前表面212上，以将支撑件20黏附到晶粒组件30。
基板210可由电绝缘材料制成，例如BT树脂或FR4环氧树脂/玻璃。可选地，可使用聚酰亚胺基(polyimide-based)基板或陶瓷基板。金属层220可为镀金层、镀铜层、或铝镀层；导电通孔230可为铜导体。在一些实施例中，焊锡凸块120回流至基板210的后表面214上的金属层220，以提供内连线至最终产物(例如：电脑)的外部电路(例如，主机板)。
晶粒组件30包括以阶梯式配置堆叠的多个元件晶粒310。更具体地，为了提供与外部电路及/或另一元件晶粒310的连接，每一个元件晶粒310的一区域暴露于堆叠于其上的元件晶粒310。粘着层130可提供于晶粒组件30的相邻元件晶粒310之间。粘着层130通常是指晶粒附着环氧树脂(die attach epoxy)。应注意的是，粘着层110和130可由相同的材料组成以降低成本。也就是说，在一些实施例中，粘着层110和130可为双面粘着聚酰亚胺胶带或晶粒粘着环氧树脂。
元件晶粒310包括封装与元件晶粒310相关的核心电路(未显示)的封装体312、以及多个接触垫314和设置于封装体312的功能性表面3122上的多个转接垫316。在将元件晶粒310组装于支撑件20上之后，封装体312的功能性表面3122背对基板210的前表面212。亦即，元件晶粒310以前后配置(front-to-back configuration)的方式堆叠。其中一元件晶粒310的接触垫314和转接垫316暴露于堆叠于其上的另一元件晶粒310。
接触垫314和转接垫316电性连接至包括存储器电路、控制电路、缓冲电路等的核心电路。接触垫314可提供将元件晶粒310的核心电路连接至外部电路的方法，且转接垫316可提供将元件晶粒310的核心电路连接至另一个元件晶粒310的方法。接触垫314和转接垫316可具有适合打线接合的金属化。
图3是根据本公开一些实施例显示元件晶粒310中的核心电路的部分电路方框图，且图4是根据本公开一些实施例显示元件晶粒310中的接触垫和转接垫的布局配置示意图。参照图3和4所示，元件晶粒310可包括多个第一输入接收器320a和分别串联连接至所述多个第一输入接收器320a的多个第二输入接收器320b。接触垫314电性连接至第一输入接收器320a的输入处的节点A，且转接垫316串联连接至第一输入接收器320a的输出处和第二输入接收器320b的输入处之间的节点B。
接触垫314以等距方式设置且位于靠近封装体312的一边缘处。接触垫314与彼此电性隔离。以矩阵方式排列的转接垫316形成分别与接触垫314对齐的多个串列(strings)318。串列318中的转接垫316通过位于功能性表面3122上的连接319而以串联的方式电性连接。更具体地，每一个连接319用以机械性且电性地连接相邻对的转接垫316。每一串列318中的转接垫316与另一个串列318中的转接垫316电性隔离。
再次参照图1和图2，电子系统10还包括多个第一导电串列(first conductivestring)131，其用于将基板210的前表面212上的其中一金属层220机械性且电性地连接至其中一元件晶粒310的接触垫314，从而在支撑件20和晶粒组件30之间产生电路。据此，可将外部元件产生的信号传递至晶粒组件30。导电串列131可通过订合式接合或球焊(ballbonding)附接至金属层220和接触垫314。在一些实施例中，可将导电串列131附接至接近支撑件20的元件晶粒310以降低导电串列131的长度，从而降低其电阻。
晶粒组件30还包括用于机械性且电性地连接元件晶粒310的多个第二导电串列330。更具体地，与支撑件20连接的元件晶粒310通过第二导电串列330电性耦合至另一个元件晶粒310。第二导电串列330可通过订合式接合或球焊附接至转接垫316。应注意的是，通过第二导电串列330堆叠在连接至支撑件20的其中一元件晶粒310上的元件晶粒310的数量等于每一个串列318中的转接垫316的数量。举例而言，如果与支撑件20连接的元件晶粒310在每一个串列318中包括三个转接垫316，则晶粒组件30可包括四个堆叠的元件晶粒310；其中的一通过第一导电串列131连接至支撑件20并通过第二导电串列330连接至另外三个堆叠的元件晶粒310。
图5是根据本公开一些实施例显示元件晶粒310的示意图，其转接垫316通过第二导电串列330机械性且电性地连接。参照图5，在第二导电串列330通过球焊334接合到一对元件晶粒310的转接垫316之后，串列318中的转接垫316以并联的方式连接。假设每一个串列318包括三个转接垫316且每一个转接垫316具有1pf的电容，则每一个串列318中以串联连接的转接垫316的电容为3pf，且以并联电性连接的不同元件晶粒310中的串列318的电容为6pf。
图6是根据本公开一些实施例显示电子系统40的透视图，且图7是根据本公开一些实施例显示电子系统40的剖面图。参照图6和图7，电子系统40包括支撑件50和晶粒组件60，其包括放置于支撑件50上的DRAM模块。晶粒组件60和支撑件50之间的附接通过粘着层410而实现，粘着层410可例如为糊状物(paste)或具有黏附性的树脂。通过使用粘着层410，晶粒组件60可固定于支撑件50上，以提高可靠性。晶粒组件60通过包括多个导电串列430的打线接合技术机械性且电性地连接至支撑件50。在一些实施例中，导电串列430可包括金、铜、铝、或前述材料的合金。
支撑件50包括基板510和多个金属层520，其中该基板510具有前表面512和相对于前表面512的后表面514，且晶粒组件60设置于前表面512；所述多个金属层520具有分别设置于前表面512和后表面514上的预定图案。穿过基板510的多个导电通孔530被提供以机械性且电性地耦合至基板510的前表面512和后表面514上的金属层520。在一些实施例中，支撑件50还可包括位于基板510内的电路图案(未显示)，且所述多个电路图案通过导电通孔530电性耦合至金属层520。换句话说，支撑件50可为一多层印刷电路板(PCB)。
基板510可由电绝缘材料组成，金属层520和电路图案可为铜层或覆金铜层(gold-cladding copper layers)，且导电通孔530可为铜导体。电子系统40还可包括附接至放置于基板510的后表面514上的金属层520的多个焊锡凸块420。焊锡凸块420用作输入/输出(I/O)连接以将电子系统40机械性且电性地连接至外部电路，例如最终产品(像是电脑)的主机板。焊锡凸块420的形成包括(1)将助焊剂(未显示)放置于基板510的后表面514上的金属层520上、(2)将焊锡凸块420放置于助焊剂上，以使焊锡凸块420和助焊剂接触、以及(3)回流焊锡凸块420和助焊剂的材料以将焊锡凸块420物理地接合至金属层520。
主要晶粒610和从属晶粒620以阶梯式排列堆叠。在一些实施例中，主要晶粒610设置于支撑件50的近侧，以降低将支撑件50机械性且电性地耦合至主要晶粒610的导电串列430的长度。在替代实施例中，主要晶粒610和从属晶粒620可随机地排列在支撑件50上。为了通过打线接合技术提供连接到至少一个外部电路(亦即，金属层520、主要晶粒610及/或从属晶粒620)，主要晶粒610和从属晶粒620的一区域暴露于堆叠于其上的另一个从属晶粒610。黏合层630可提供于堆叠的主要晶粒610和从属晶粒620之间和堆叠的从属晶粒620之间。
应注意的是，本公开的主要晶粒610和从属晶粒620可具有相同的布局配置，以降低制造步骤，从而降低成本。图8是根据本公开一些实施例显示主要晶粒610或从属晶粒620的接触垫和转接垫的布局配置示意图。参照图6至图8，包括积集电路的主要晶粒610或从属晶粒620包括封装体632，其封装与主要晶粒610或从属晶粒620相关的核心电路(未显示)；以及多个接触垫634和多个转接垫636，设置于封装体632的功能性表面6322上。在主要晶粒610和从属晶粒620组装于支撑件50上之后，主要晶粒610或从属晶粒620的功能性表面6322背对基板510的前表面512。
接触垫634和转接垫636放置于主要晶粒610和从属晶粒620被堆叠于其上的从属晶粒620所暴露的区域上，且电性连接至包括存储器电路、控制电路、缓冲电路等的核心电路。具有适合打线接合的金属化的接触垫634和转接垫636可提供将主要晶粒610或从属晶粒620的核心电路连接至外部电路的方法。
参照图8，放置于功能性表面6322上的接触垫634沿着Y轴排列。在一些实施例中，接触垫634以等距的方式设置且位于靠近封装体632的一边缘处。以矩阵方式排列的转接垫636形成分别与接触垫634对齐的多个串列638。每一个转接垫636被分成与彼此电性隔离的多个区段6362。在串列638中的相邻对转接垫636中，不同转接垫636中只有两个区段6362通过导电线路640电性连接。转接垫636的区段6362可通过球焊与彼此电性耦合。
参照图9A，每一个转接垫636可具有矩形轮廓且被分成一对互补形区段，包括凹入区段6362a和凸出区段6362b。在相邻对的转接垫636中提供导电线路640以将凹入区段6362a机械性且电性地连接至不同的转接垫636中的凸出区段6362b。在一些实施例中，区段6362a和6362b可具有相同的面积。
参照图9B，具有矩形轮廓的每一个转接垫636被分成具有相同轮廓和相同面积的一对区段6362a和6362b。与图9A所示的转接垫636相反，图9B所示的具有矩形轮廓的转接垫636具有更容易制造的优点。然而，具有互补形区段6362a和6362b的转接垫636可增加区段6362a和6362b与打线接合之间的接触面积。
参照图9C，转接垫636被分成与彼此电性隔离的三个区段6362a、6362b、和6362c。区段6362a、6362b、和6362c可具有三角形轮廓。应注意的是，转接垫636可被分成两个以上与彼此电性隔离的区段。在一些实施例中，可利用光刻和蚀刻工艺将转接垫636图案化，以形成具有上述预定轮廓的多个区段6362a、6362b、和6362c。
参照图9D，转接垫636可被分成具有C形轮廓的外部区段6362a和具有矩形轮廓且被外部区段6362a包围的内部区段6362b。在相邻对的转接垫636中提供导电线路640以将其中一转接垫636中的内部区段6362b机械性且电性地连接至不同的转接垫636中的外部曲段6362a。外部区段6362a和内部区段6362b可具有不同的面积。
再次参照图6和7，晶粒组件60还包括多个内连线650，其用于将从属晶粒620机械性且电性地连接至主要晶粒610。图10是根据本公开一些实施例显示主要晶粒610或从属晶粒620的示意图，其转接垫636通过内连线650机械性且电性地连接。参照图10，内连线650包括通过球焊654附接至主要晶粒610的其中一转接垫636和从属晶粒620的其中一转接垫636的打线(wire)652。应注意的是，主要晶粒610可通过内连线650机械性且电性地连接的从属晶粒620的数量等于每一个串列638中的转接垫636的数量。举例而言，若主要晶粒610在每一个串列638中包括三个转接垫636，则晶粒组件60可包括三个从属晶粒620。
图11和12是根据本公开一些实施例显示晶粒组件60的电路方框图。参照图6、图11和图12，晶粒组件60包括以前后配置的方式堆叠的主要晶粒610和从属晶粒620。主要晶粒610和从属晶粒620可包括至少一个第一输入接收器650a和至少一个第二输入接收器650b，其以串联的方式电性连接至第一输入接收器650a。接触垫634电性连接至第一输入接收器650a的输入处的节点A，且转接垫636以串联的方式电性连接至第一输入接收器650a的输出处和第二输入接收器650b的输入处之间的节点B。
主要晶粒610通过接合到金属层520和接触垫634的导电串列430电性耦合至支撑件50，使得在电子系统40安装于提供有电脑80的主机板上之后，可在晶粒组件60和电脑80之间产生内连线，从而通过焊锡凸块420、基板510的后表面514上的金属层520、导电通孔530、基板510的前表面512上的金属层520、以及导电串列430提供用于控制晶粒组件60操作的信号。
再次参照图10至图12，主要晶粒610通过内连线650电性耦合至每一个从属晶粒620，该内连线650包括通过球焊654接合至主要晶粒610和从属晶粒620的转接垫636的打线652。因此，从属晶粒620的第二输入接收器650b连接至节点B。换句话说，晶粒组件60的从属晶粒620以并联的方式电性连接。然后，由电脑80提供并传导至主要晶粒610的第一输入接收器650a的信号被传递至主要晶粒610和从属晶粒620的第二输入接收器650b。
再次参照图10，假设每一个串列638包括三个转接垫636、每一个转接垫636具有1pf的电容、且每一个转接垫636被分成两个具有相同面积的分离区段6362，则每一个区段6362的电容为0.5pf。据此，只包括一个球焊654以机械性且电性地连接其中一转接垫636的分离区段6362的串列638的电容是1.5pf，且包括两个球焊654以机械性且电性地连接两个转接垫636的分离区段6362的串列638的电容是2.5pf。也就是说，若用以机械性且电性地连接串列638中分离区段6362的球焊654的数量小于串列638中转接垫636的数量，则包括被分成两个或更多个区段6362的转接垫636的主要晶粒610或从属晶粒620可降低每一个串列638中的(内连线)电容。
另外，若通过球焊654机械性且电性地连接于主要晶粒610的其中一转接垫636和从属晶粒620的其中一转接垫636之间的打线652安装至转接垫636的分离区段6362，则主要晶粒610和从属晶粒620中与彼此电性连接的串列638的电容为3pf，其小于转接垫未分离的配置中的串列的电容。
再次参照图6和图7，为了机械和环境的保护，电子系统40还包括覆盖主要晶粒610、从属晶粒620、和内连线650的密封剂70。在一些实施例中，密封剂70更覆盖导电串列430和位于基板510的前表面512上的金属层520。在一些实施例中，支撑件50的周边通过密封剂70而暴露。在一些实施例中，密封剂70可具有平坦的顶表面712。在一些实施方案中，密封剂70可包括环氧基树脂(epoxy-based resin)、聚酰亚胺基树脂(polyimide-basedresin)、聚酯基树脂(polyester-based resin)、或聚丙烯酸酯基聚合物树脂(polyacrylate-based polymer resin)。
在一些实施例中，密封剂70可为透明的或不透明的。当密封剂70为不透明时，优选为黑色。黑色辐射出最多热量且最有效地从主要晶粒610和从属晶粒610散热到内连线650、导电串列430、和金属层520。在一些实施例中，黑色可由添加调色剂粒子(未显示)而形成。在一些实施例中，可另外将包括像是碳的调色剂粒子施加于密封剂70内，以将产生自主要晶粒610和从属晶粒620的热量随时传递到支撑件50，从而改善电子系统40的散热特性。通过将调色剂粒子放入密封剂70中，可减少密封剂70的固化时间。在一些实施例中，密封剂70可包含用于加强机械特性的填充材料(未显示)。具体地，填充材料的功用在于避免密封剂70的机械特性在电子系统40的接合期间劣化。在一些实施例中，填充材料可包括氧化硅、二氧化硅、二氧化钛、或氧化铝。
总而言之，通过元件晶粒(亦即，上述的主要晶粒610和从属晶粒620)的配置，使其具有分成与彼此电性隔离的多个区段6362a和6362b的转接垫636，可有效降低包括两个或更多个元件晶粒的晶粒组件60的导线电容，以改善信号传递速度。
本公开的一方面提供一种元件晶粒。该元件晶粒包括一封装体、一对转接垫、以及至少一导线。该封装体具有一功能性表面。该对转接垫设置于该封装体的该功能性表面上。所述多个转接垫被分为与彼此电性隔离的多个区段。该导线设置于该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段。
本公开的另一方面提供一种晶粒组件。该晶粒组件包括以阶梯式配置堆叠的一对元件晶粒。所述多个元件晶粒的至少一者包括一封装体、一对转接垫、以及至少一导线。该封装体具有一功能性表面。该对转接垫设置于该封装体的该功能性表面上。所述多个转接垫被分为与彼此电性隔离的多个区段。该导线设置于该封装体的该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段。该对元件晶粒通过一内连线与彼此机械性且电性地耦合，该内连线包括一打线，其通过球焊附接至两元件晶粒中的其中一转接垫的该区段。
本公开的另一方面提供一种电子系统。该电子系统包括一支撑件以及设置于该支撑件上的多个元件晶粒。该支撑件包括至少一金属层。所述多个元件晶粒设置于该支撑件上并通过至少一导电串列机械性且电性地耦合至该金属层。该元件晶粒包括一封装体、一对转接垫、以及至少一导电线路。该封装体具有一功能性表面。该对转接垫设置于该封装体的该功能性表面上。所述多个转接垫被分为与彼此电性隔离的多个区段。该导电线路设置于该封装体的该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段。该对元件晶粒通过多个内连线与彼此机械性且电性耦合，所述多个内连线包括一打线，其通过球焊附接至两元件晶粒中的其中一转接垫。
虽然已详述本公开及其优点，然而应理解可进行各种变化、取代与替代而不脱离权利要求所定义的本公开的构思与范围。例如，可用不同的方法实施上述的许多工艺，且以其他工艺或前述的组合替代上述的许多工艺。
再者，本公开的范围并不受限于说明书中该的工艺、机械、制造、物质组成物、手段、方法与步骤的特定实施例。该技艺的技术人士可自本公开的公开内容理解可根据本公开而使用与本文该的对应实施例具有相同功能或是达到实质上相同结果的现存或是未来发展的工艺、机械、制造、物质组成物、手段、方法、或步骤。据此，这些工艺、机械、制造、物质组成物、手段、方法、或步骤是包含于本公开的权利要求内。

Claims (18)

1.一种元件晶粒，包括：
一封装体，具有一功能性表面；
一对转接垫，设置于该功能性表面上，其中多个所述转接垫被分为与彼此电性隔离的多个区段；以及
至少一导线，设置于该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段。
2.如权利要求1所述的元件晶粒，其中该转接垫包括相互配合的互补形区段。
3.如权利要求1所述的元件晶粒，其中该对转接垫包括一第一转接垫和一第二转接垫，设置于该封装体的该功能性表面上，其中该第一转接垫包括一第一凹入区段以及与该第一凹入区段电性隔离的一第一凸出区段，且该第二转接垫包括一第二凹入区段以及与该第二凹入区段电性隔离的一第二凸出区段；该导线将该第一转接垫电性连接至该第二转接垫，包括将该第一转接垫中的该第一凹入区段电性连接至该第二转接垫中的该第二凸出区段。
4.如权利要求1所述的元件晶粒，其中所有多个所述转接垫的所述多个区段具有一相同的面积。
5.如权利要求1所述的元件晶粒，还包括至少一接触垫，设置于该功能性表面上并位于靠近该封装体的一边缘处，其中所述多个转接垫与该接触垫对齐。
6.一种晶粒组件，包括：
一对元件晶粒，以一阶梯式配置堆叠，其中多个所述元件晶粒的至少一者包括：
一封装体，具有一功能性表面；
一对转接垫，设置于该封装体的该功能性表面上，其中多个所述转接垫被分为与彼此电性隔离的多个区段；以及
至少一导线，设置于该封装体的该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段，
其中该对元件晶粒通过一内连线与彼此机械性且电性耦合，该内连线包括一打线，其通过球焊附接至两元件晶粒中的其中一转接垫的该区段。
7.如权利要求6所述的晶粒组件，其中该转接垫包括相互配合的互补形区段。
8.如权利要求6所述的晶粒组件，其中该对转接垫包括一第一转接垫和一第二转接垫，设置于该封装体的该功能性表面上，其中该第一转接垫包括一第一凹入区段以及与该第一凹入区段电性隔离的一第一凸出区段，且该第二转接垫包括一第二凹入区段以及与该第二凹入区段电性隔离的一第二凸出区段；该导线将该第一转接垫电性连接至该第二转接垫，包括将该第一转接垫中的该第一凹入区段电性连接至该第二转接垫中的该第二凸出区段。
9.如权利要求6所述的晶粒组件，其中所有所述多个转接垫的所述多个区段具有一相同的面积。
10.如权利要求6所述的晶粒组件，其中所述多个元件晶粒的至少一者还包括至少一接触垫，设置于该功能性表面上并位于靠近该封装体的一边缘处，其中所述多个转接垫与该接触垫对齐。
11.如权利要求6所述的晶粒组件，其中所述多个元件晶粒以一阶梯式配置排列。
12.一种电子系统，包括：
一支撑件，包括至少一金属层；以及
多个元件晶粒，设置于该支撑件上并通过多个导电串列机械性且电性地耦合至该金属层，其中至少一元件晶粒包括：
一封装体，具有一功能性表面；
一对转接垫，设置于该封装体的该功能性表面上，其中多个所述转接垫被分为与彼此电性隔离的多个区段；以及
至少一导线，设置于该封装体的该功能性表面上，以将其中一转接垫中的一区段机械性且电性地连接至另一转接垫中的一区段，
其中所述多个元件晶粒通过多个内连线与彼此机械性且电性耦合，所述多个内连线包括一导线，其通过球焊附接至两元件晶粒中的其中一转接垫。
13.如权利要求12所述的电子系统，其中所述多个导电串列通过订合式接合耦接一接触垫和该金属层。
14.如权利要求12所述的电子系统，其中该转接垫包括相互配合的互补形区段。
15.如权利要求12所述的电子系统，其中该对转接垫包括一第一转接垫和一第二转接垫，设置于该封装体的该功能性表面上，其中该第一转接垫包括一第一凹入区段以及与该第一凹入区段电性隔离的一第一凸出区段，且该第二转接垫包括一第二凹入区段以及与该第二凹入区段电性隔离的一第二凸出区段；该导线将该第一转接垫电性连接至该第二转接垫，包括将该第一转接垫中的该第一凹入区段电性连接至该第二转接垫中的该第二凸出区段。
16.如权利要求12所述的电子系统，其中所有所述多个转接垫的所述多个区段具有一相同的面积。
17.如权利要求12所述的电子系统，还包括至少一接触垫，设置于该功能性表面上并位于靠近该封装体的一边缘处，其中所述多个转接垫与该接触垫对齐。
18.如权利要求17所述的电子系统，其中所述多个元件晶粒的其中一者通过所述多个导电串列机械性且电性地耦合至一支撑层，其中所述多个导电串列直接接触该金属层和该接触垫。
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