CN113299765A - Preparation method of heterogeneous GeSn-based solid-state plasma PiN diode array with mesa structure and device thereof - Google Patents
Preparation method of heterogeneous GeSn-based solid-state plasma PiN diode array with mesa structure and device thereof Download PDFInfo
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- 229910005898 GeSn Inorganic materials 0.000 title claims abstract description 119
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
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- 238000011065 in-situ storage Methods 0.000 claims abstract description 27
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 26
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 26
- 239000010703 silicon Substances 0.000 claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 claims abstract description 15
- 239000004065 semiconductor Substances 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims description 93
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 89
- 239000010410 layer Substances 0.000 claims description 71
- 230000008569 process Effects 0.000 claims description 59
- 239000000377 silicon dioxide Substances 0.000 claims description 46
- 235000012239 silicon dioxide Nutrition 0.000 claims description 43
- 239000007787 solid Substances 0.000 claims description 35
- 238000000151 deposition Methods 0.000 claims description 34
- 238000005229 chemical vapour deposition Methods 0.000 claims description 26
- 238000001259 photo etching Methods 0.000 claims description 24
- 238000001039 wet etching Methods 0.000 claims description 20
- 229910045601 alloy Inorganic materials 0.000 claims description 19
- 239000000956 alloy Substances 0.000 claims description 19
- 238000003491 array Methods 0.000 claims description 18
- 230000005404 monopole Effects 0.000 claims description 18
- 230000002093 peripheral effect Effects 0.000 claims description 16
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 14
- 230000008021 deposition Effects 0.000 claims description 14
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 13
- 238000001312 dry etching Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 12
- 238000002347 injection Methods 0.000 claims description 8
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- 230000003213 activating effect Effects 0.000 claims description 4
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- 238000002161 passivation Methods 0.000 description 2
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
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Abstract
The invention relates to the technical field of semiconductor device manufacturing, and discloses a preparation method of a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure and a device thereof, wherein the preparation method of the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure comprises the following steps: selecting a semiconductor GeOI substrate, and doping the GeOI substrate to form a top GeSn region; forming an active area of the table top on the surface of the GeSn area; forming a P area and an N area in the active area of the table top by in-situ doping; the preparation method and the device of the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure realize dynamic reconfiguration of antenna performance, and greatly improve the integration level and the stealth performance of a silicon-based antenna system.
Description
Technical Field
The invention relates to the technical field of semiconductor device manufacturing, in particular to a preparation method of a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure and a device thereof.
Background
In modern wireless communication systems, antennas are indispensable components of all radio systems as interfaces between the system and the external propagation medium. The antenna is used as a device for radiating and receiving electromagnetic waves, and realizes the switching between the electromagnetic waves and guided waves on a transmission line: when the antenna is used as a transmitting device, converting current with specific frequency on a transmission line into electromagnetic waves of a free space; when the antenna is used as a receiving device, external electromagnetic waves are converted into high-frequency currents on the transmission line. With the rapid progress of modern communications and the closer and closer integration of communications with other technologies, the antenna functions and system complexity required by people will also be higher and higher. The silicon-based high-integration reconfigurable antenna based on the solid-state plasma PiN diode has the advantages of flexible reconfiguration technology, high integration characteristic, good stealth performance and the like, and can be widely applied to the fields of radar communication, helicopters, high signal-to-noise ratio microwave communication antennas and the like.
Therefore, how to manufacture a high-performance solid plasma lateral surface PiN diode for application to a silicon-based high-integration reconfigurable antenna becomes important.
Disclosure of Invention
The invention provides a preparation method of a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure and a device thereof, which can solve the problems in the prior art.
The invention provides a preparation method of a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure, which comprises the following steps:
the method comprises the following steps:
(a) selecting a semiconductor GeOI substrate, and doping the GeOI substrate to form a top GeSn region;
(b) forming an active area of the table top on the surface of the GeSn area;
(c) forming a P area and an N area in the active area of the table top by in-situ doping;
(d) and forming GeSn alloy leads on the substrate and connecting the GeSn alloy leads to form a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure.
The method for doping and forming the top GeSn region in the GeOI substrate in the step (a) comprises the following steps:
(a1) photoetching the GeOI substrate;
(a2) doping the GeOI substrate with Sn component to form a top GeSn region, and dynamically controlling the content of the Sn component in the top Ge layer to realize the maximum injection ratio of current carriers;
(a3) and removing the photoresist.
The step (b) of forming the active region of the mesa specifically includes the steps of:
(b1) depositing a layer of silicon nitride on the surface of the GeSn area by Chemical Vapor Deposition (CVD);
(b2) forming a mesa active region pattern on the silicon nitride layer by utilizing a photoetching process;
(b3) and etching the protective layer and the top GeSn region at the designated position of the active region pattern by using a dry etching process so as to form a mesa active region.
The specific method for forming the P region and the N region by in-situ doping in the step (c) comprises the following steps:
(c1) flattening the periphery of the active area of the table board;
(c2) depositing P-type AlAs on the P area pattern on the surface of the substrate by in-situ doping to form a P area;
(c3) depositing N-type AlAs on the N area pattern on the surface of the substrate by in-situ doping to form an N area;
the step (c1) of planarizing the periphery of the active region of the mesa includes the steps of:
(c11) oxidizing the peripheral side wall of the table-board active region to form an oxide layer on the peripheral side wall of the table-board active region;
(c12) and etching the peripheral side wall oxide layer of the table-board active region by using a wet etching process to complete the planarization of the peripheral side wall of the table-board active region.
The step (c2) of forming the P region by in-situ doping deposition of P-type AlAs comprises the following steps:
(c21) depositing a layer of silicon dioxide on the surface of the substrate by Chemical Vapor Deposition (CVD);
(c22) forming a P area pattern on the silicon dioxide layer by utilizing a photoetching process;
(c23) removing silicon dioxide on the P area by using a wet etching process;
(c24) forming a P area by in-situ doping deposition of P-type AlAs;
(c25) the surface of the P area is flattened by utilizing a dry etching process, and then the silicon dioxide on the surface of the substrate is removed by utilizing a wet etching process.
The step (c3) of forming the N region by in-situ doping deposition of N-type AlAs comprises the following steps:
(c31) depositing a layer of silicon dioxide on the surface of the substrate by Chemical Vapor Deposition (CVD);
(c32) forming an N area pattern on the silicon dioxide layer by utilizing a photoetching process;
(c33) removing silicon dioxide on the N region by using a wet etching process;
(c34) forming an N region by in-situ doping deposition of N-type AlAs;
(c35) the surface of the N area is flattened by utilizing a dry etching process, and then the silicon dioxide on the surface of the substrate is removed by utilizing a wet etching process.
The specific method for forming the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure in the step (d) comprises the following steps:
(d1) generating silicon dioxide on the substrate;
(d2) activating impurities in the P area and the N area by using an annealing process to form a diode;
(d3) photoetching lead holes in the P area and the N area and forming a GeSn alloy lead by adopting plasma chemical vapor deposition (RPCVD);
(d4) passivating and photoetching PAD;
(d5) the diodes are connected in series to form a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure.
A heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure is characterized by being manufactured by the manufacturing method.
A silicon-based reconfigurable monopole antenna comprises a semiconductor substrate GeOI, an antenna arm, a first direct current bias line, a second direct current bias line, a third direct current bias line, a fourth direct current bias line and a coaxial feeder line; the antenna arm is connected with a coaxial feeder line, the antenna arm is composed of a plurality of heterogeneous GeSn-based solid-state plasma PiN diode arrays with mesa structures, the diode arrays are connected to a direct-current bias power supply through a first direct-current bias line, a second direct-current bias line, a third direct-current bias line and a fourth direct-current bias line, and the conduction and the cut-off of the different PiN diode arrays are dynamically controlled through the direct-current feeder line, so that the dynamic reconfiguration of the performance of the antenna is realized.
Compared with the prior art, the invention has the beneficial effects that:
(1) the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure is used for forming a silicon-based reconfigurable monopole antenna, and the dynamic reconfiguration of the performance of the antenna is realized by dynamically controlling the conduction and the cut-off of the PiN diode array.
(2) The heterogeneous GeSn-based solid plasma PiN diode array with the mesa structure realizes the adjustability of the forbidden bandwidth of the GeSn in the intrinsic region of the diode by dynamically controlling the content of the Sn component in the top Ge layer. Due to the characteristics of large injection ratio and high mobility, the solid plasma concentration and distribution uniformity of the PiN diode can be effectively improved.
(3) A GeSn alloy lead is formed by the heterogeneous GeSn-based solid plasma PiN diode array with the mesa structure by adopting an RPCVD (plasma-chemical vapor deposition) technology to replace a metal electrode in a traditional PiN diode, so that the integration level and the stealth performance of a silicon-based antenna system are greatly improved.
(4) The P area and the N area of the heterogeneous GeSn-based solid plasma PiN diode array with the mesa structure adopt a polysilicon inlaying process based on etching deep groove etching, and the process can provide abrupt junction Pi and Ni junctions, can effectively improve junction depth and improve the concentration and distribution of solid plasma.
(5) The heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure adopts a deep groove medium isolation process, so that the breakdown voltage of the diode is effectively improved, and the influence of leakage current on the performance of the device is inhibited.
Drawings
Fig. 1 is a schematic structural diagram of a silicon-based reconfigurable monopole antenna based on a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure according to an embodiment of the present invention.
Fig. 2 is a flowchart of a method for manufacturing a heterogeneous GeSn-based solid-state plasma PiN diode array having a mesa structure according to an embodiment of the present invention.
Fig. 3a to fig. 3u are schematic diagrams of a method for manufacturing a heterogeneous GeSn-based solid-state plasma PiN diode array having a mesa structure according to an embodiment of the present invention.
Fig. 4 is a schematic device structure diagram of a heterogeneous GeSn-based solid-state plasma PiN diode with a mesa structure according to an embodiment of the present invention.
Fig. 5 is a schematic structural diagram of a heterogeneous GeSn-based solid-state plasma PiN diode array having a mesa structure according to an embodiment of the present invention.
Reference numbers for fig. 1 illustrate:
1-semiconductor substrate GeOI, 2-antenna arm, 3-first DC bias line, 4-second DC bias line, 5-third DC bias line, 6-fourth DC bias line, 7-coaxial feeder line.
The reference numerals of fig. 3 illustrate:
101-GeOI substrate, 201-GeSn region, 401-active region deep groove, 501-oxide layer, 601-silicon dioxide, 801-P region, 1001-silicon dioxide layer, 1201-N region, 1401-polycrystalline AlAs layer, 1501-silicon dioxide layer, 1801-lead hole, 1901-GeSn alloy, 2001-passivation layer.
The reference numerals of fig. 4 illustrate:
301-silicon nitride layer, 302-top GeSn region, 303-P region, 304-N region.
Detailed Description
An embodiment of the present invention will be described in detail below with reference to fig. 1-6, but it should be understood that the scope of the present invention is not limited to the embodiment.
The invention provides a preparation method of a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure, which is suitable for forming a silicon-based reconfigurable monopole antenna. The PiN diode can be a lateral heterogeneous GeSn-based PiN diode formed by doping a Sn component based On Germanium (GeOI) On an insulating substrate, wherein when a direct current bias is applied, a solid plasma composed of free carriers (electrons and holes) is formed On the surface of a direct current, the plasma has a metal-like characteristic, namely has a reflection effect On electromagnetic waves, and the reflection characteristic is closely related to the microwave transmission characteristic, concentration and distribution of the surface plasma.
The silicon-based reconfigurable monopole antenna can be formed by arranging and combining heterogeneous GeSn-based solid plasma PiN diode arrays with mesa structures, the diodes in the arrays are selectively conducted by external control, so that the arrays form dynamic solid plasma stripes and have the functions of the antenna, the antenna has the functions of transmitting and receiving specific electromagnetic waves, the antenna can change the shapes and the distribution of the solid plasma stripes through the selective conduction of the diodes in the arrays, the reconfiguration of the antenna is realized, and the silicon-based reconfigurable monopole antenna has important application prospects in the aspects of helicopters, national defense communication and radar technologies.
The process flow of the heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure prepared by the present invention will be described in further detail below. In the drawings, the thickness of layers and regions are exaggerated or reduced for convenience of explanation, and the illustrated sizes do not represent actual dimensions.
Example one
Referring to fig. 1, fig. 1 is a schematic diagram of a silicon-based reconfigurable monopole antenna structure according to an embodiment of the present invention. The silicon-based reconfigurable monopole antenna comprises: a semiconductor substrate GeOI1, an antenna arm 2, a first dc bias line 3, a second dc bias line 4, a third dc bias line 5, a fourth dc bias line 6, and a coaxial feed line 7; the antenna arm 2 is composed of a plurality of heterogeneous GeSn-based solid-state plasma PiN diode arrays with mesa structures.
The antenna arm comprises a plurality of heterogeneous GeSn-based solid-state plasma PiN diode arrays with mesa structures, and the reconfiguration of the antenna performance is realized by controlling the conduction and the cut-off of different PiN diode arrays; the number of diode arrays in other similar systems can be increased or decreased as required by the performance of the antenna.
The antenna arm, the direct current bias straight line and the coaxial feeder are prepared on the semiconductor substrate by adopting a semiconductor process, and the diode antenna arm 2 is connected with the coaxial feeder 14. The antenna arm 2 comprises heterogeneous GeSn-based solid-state plasma PiN diode arrays L1, L2 and L3 which are connected in series and have mesa structures, and different heterogeneous GeSn-based solid-state plasma PiN diode arrays with mesa structures are connected to a direct-current bias power supply through direct- current bias lines 3, 4, 5 and 6.
Referring to fig. 2, fig. 2 is a flowchart of a method for manufacturing a heterogeneous GeSn-based solid-state plasma PiN diode having a mesa structure according to an embodiment of the present invention, where the method is suitable for manufacturing a silicon-based solid-state plasma PiN diode array, and the diode array is mainly used for manufacturing a silicon-based reconfigurable monopole antenna. The method comprises the following steps:
(a) selecting a GeOI substrate, and doping in the GeOI substrate to form a top GeSn region;
(b) forming an active region of the mesa;
(c) forming a P region and an N region by in-situ doping;
(d) and forming a GeSn alloy lead on the substrate and connecting the GeSn alloy lead to complete the preparation of the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure in the silicon-based reconfigurable monopole antenna.
Among other things, the reason for doping the top GeSn region in the GeOI substrate for step (a) is that the radiating element diode of the silicon-based solid-state plasma antenna needs to have a high concentration of solid-state plasma due to its required good microwave characteristics. The heterogeneous GeSn-based solid plasma PiN diode is a GeSn alloy with a forbidden band width narrower than that of a silicon material by doping Sn components in the top Ge layer and dynamically controlling the content of the Sn components in the top Ge layer, so that the injection ratio of carriers from a source region to an intrinsic region is further improved, and the concentration and distribution uniformity of solid plasma in the diode are greatly improved. Furthermore, the introduction of buried oxide layers and deep trench isolation techniques further improves the carrier confinement capability, so Sn is doped in the GeOI substrate to form a top GeSn region.
For step (a), doping a top layer GeSn region in a GeOI substrate may include the steps of:
(a1) photoetching the GeOI substrate;
(a2) doping the GeOI substrate with Sn component to form a top GeSn region, and dynamically controlling the content of the Sn component in the top Ge layer to realize the maximum injection ratio of carriers;
(a3) and removing the photoresist.
In addition, for the step (b), forming the active region of the mesa may include the steps of:
(b1) depositing a layer of silicon nitride on the surface of the GeSn area by using CVD;
the purpose of depositing the silicon nitride layer is to: after photoetching the mesa active region, silicon nitride can be used as a mask of top GeSn, so that the GeSn material in the mesa active region is etched.
(b2) Forming a mesa active region pattern on the silicon nitride layer by utilizing a photoetching process;
(b3) and etching the protective layer and the top layer GeSn at the appointed position of the active area pattern by using a dry etching process so as to form a mesa active area.
Furthermore, for step (c), the forming of the P region and the N region by in-situ doping may specifically include the following steps:
(c1) flattening the periphery of the active area of the table board;
(c2) forming a P area by in-situ doping deposition of P-type AlAs;
(c3) the N region is formed by in-situ doping deposition of N-type AlAs.
For the step (c1), the planarization process around the active region of the mesa may specifically include the following steps:
(c11) oxidizing the peripheral side wall of the table-board active region to form an oxide layer on the peripheral side wall of the table-board active region;
(c12) and etching the peripheral side wall oxide layer of the table-board active region by using a wet etching process to complete the planarization of the peripheral side wall of the table-board active region.
Further, for the step (c2), forming the P region by in-situ doping deposition of P-type AlAs, the method specifically includes the following steps:
(c21) depositing a layer of silicon dioxide on the surface of the substrate by CVD;
(c22) forming a P area pattern on the silicon dioxide layer by utilizing a photoetching process;
(c23) removing silicon dioxide on the P area by using a wet etching process;
(c24) forming a P area by in-situ doping deposition of P-type AlAs;
(c25) the surface of the P area is flattened by utilizing a dry etching process, and then the silicon dioxide on the surface of the substrate is removed by utilizing a wet etching process.
For the step (c3), forming the N region by in-situ doping deposition of N-type AlAs, the method may specifically include the following steps:
(c31) depositing a layer of silicon dioxide on the surface of the substrate by CVD;
(c32) forming an N area pattern on the silicon dioxide layer by utilizing a photoetching process;
(c33) removing silicon dioxide on the N region by using a wet etching process;
(c34) forming an N region by in-situ doping deposition of N-type AlAs;
(c35) the surface of the N area is flattened by utilizing a dry etching process, and then the silicon dioxide on the surface of the substrate is removed by utilizing a wet etching process.
For the step (d), forming GeSn alloy leads on the substrate and connecting the GeSn alloy leads to complete the preparation of the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure, the method may specifically include the following steps:
(d1) generating silicon dioxide on the substrate;
(d2) activating impurities in the P region and the N region by using an annealing process;
(d3) photoetching lead holes in the P area and the N area and forming a GeSn alloy lead by adopting an RPCVD (plasma chemical vapor deposition) technology;
(d4) passivating and photoetching PAD;
(d5) and the diodes are mutually connected in series to form a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure in the silicon-based reconfigurable monopole antenna.
In the conventional preparation process for manufacturing the P region and the N region of the solid plasma pin diode, the P region and the N region are formed by adopting an injection process, and the method requires larger injection dosage and energy, has high requirements on equipment and is incompatible with the prior process; and by adopting the diffusion process, although the junction depth is deeper, the areas of the P region and the N region are larger, the integration level is low, the doping concentration is uneven, the electrical performance of the solid plasma pin diode is influenced, and the controllability of the concentration and the distribution of the solid plasma is poor.
The preparation method of the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure provided by the invention has the following advantages:
the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure is used for forming a silicon-based reconfigurable monopole antenna, and the dynamic reconfiguration of the performance of the antenna is realized by dynamically controlling the conduction and the cut-off of the PiN diode array.
The heterogeneous GeSn-based solid plasma PiN diode array with the mesa structure realizes the adjustability of the forbidden bandwidth of the GeSn in the intrinsic region of the diode by dynamically controlling the content of the Sn component in the top Ge layer. Due to the characteristics of large injection ratio and high mobility, the solid plasma concentration and distribution uniformity of the PiN diode can be effectively improved.
A GeSn alloy lead is formed by the heterogeneous GeSn-based solid plasma PiN diode array with the mesa structure by adopting an RPCVD (plasma-chemical vapor deposition) technology to replace a metal electrode in a traditional PiN diode, so that the integration level and the stealth performance of a silicon-based antenna system are greatly improved.
The P area and the N area of the heterogeneous GeSn-based solid plasma PiN diode array with the mesa structure adopt a polysilicon inlaying process based on etching deep groove etching, and the process can provide abrupt junction Pi and Ni junctions, can effectively improve junction depth and improve the concentration and distribution of solid plasma.
The heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure adopts a deep groove medium isolation process, so that the breakdown voltage of the diode is effectively improved, and the influence of leakage current on the performance of the device is inhibited.
Example two
Referring to fig. 3a to fig. 3u, fig. 3a to fig. 3u are schematic diagrams illustrating a method for manufacturing a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure according to an embodiment of the present invention, which is based on the first embodiment, and is described in detail by taking an example of manufacturing a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure and a solid state plasma region length of 150 micrometers as an example, where the intrinsic region length may be between 50 micrometers and 150 micrometers, and the specific steps are as follows:
and S10, selecting the GeOI substrate.
Referring to FIG. 3a, the GeOI substrate 101 has a crystal orientation of 111, and the GeOI substrate 101 has an n-type doping concentration of 1 × 1014cm-3The thickness of the top layer Ge is, for example, 100 μm.
And S20, doping the GeOI substrate to form a top layer GeSn region.
Please refer to fig. 3b, which may specifically be: and photoetching the GeOI substrate, doping Sn components into the GeOI substrate to form a top GeSn region 201 on the substrate, wherein the Sn components in the GeSn region are 1% -30%, and removing the photoresist.
And S30, depositing a layer of silicon nitride on the surface of the top layer GeSn area.
Referring to fig. 3c, a silicon nitride layer 301 is deposited on the top GeSn region 201 by Chemical Vapor Deposition (CVD).
And S40, etching the substrate top layer GeSn area to form an active area deep groove.
Referring to fig. 3d, an active region pattern is formed on the silicon nitride layer by using a photolithography process, and the protection layer and the top GeSn region are etched at a designated position of the active region pattern by using a dry etching process, thereby forming an active region deep trench 401.
And S50, performing planarization treatment on the periphery of the active area of the mesa.
Referring to fig. 3e and 3f, the specific implementation may be: and oxidizing the peripheral side wall of the table-board active region to form an oxide layer 501 with the thickness of 5-60 nm on the peripheral side wall of the table-board active region, and etching the peripheral side wall oxide layer of the table-board active region by using a wet etching process to complete the planarization of the peripheral side wall of the table-board active region.
And S60, depositing a layer of silicon dioxide on the surface of the substrate.
Referring to fig. 3g, a layer of silicon dioxide 601 is deposited on the substrate using CVD.
And S70, photoetching the silicon dioxide layer.
Referring to fig. 3h, a P-region pattern is formed on the silicon dioxide layer by using a photolithography process, and the silicon dioxide layer on the P-region pattern is removed by using a wet etching process.
And S80, forming a P area.
Please refer to fig. 3i, the specific method may be: and depositing P-type AlAs on the P area pattern on the surface of the substrate by using an in-situ doping method to form a P area 801, and controlling the doping concentration of the P area by controlling the gas flow.
And S90, flattening the surface of the substrate.
Please refer to fig. 3j, the specific method may be: the surface of the P area is flattened by utilizing a dry etching process, and then the silicon dioxide layer on the surface of the substrate is removed by utilizing a wet etching process.
S100, depositing a layer of silicon dioxide on the surface of the substrate.
Please refer to fig. 3k, which may specifically be: a silicon dioxide layer 1001 is deposited on the substrate surface by CVD.
And S110, photoetching the silicon dioxide layer.
Referring to fig. 3l, an N-region pattern is formed on the silicon dioxide layer by using a photolithography process; and removing the silicon dioxide layer on the N region by utilizing a wet etching process.
And S120, forming an N region.
Referring to fig. 3m, N-type AlAs is deposited on the N-region pattern on the substrate surface by an in-situ doping method to form an N-region 1201, and the doping concentration of the N-region is controlled by controlling the gas flow.
And S130, flattening the surface of the substrate.
Referring to fig. 3N, the surface of the N region is planarized by using a dry etching process, and then the silicon dioxide layer on the surface of the substrate is removed by using a wet etching process.
And S140, depositing a polycrystalline AlAs layer.
Referring to fig. 3o, a polycrystalline AlAs layer 1401 may be deposited in the trench by CVD.
S150, forming a silicon dioxide layer on the surface.
Referring to FIG. 3p, a silicon dioxide layer 1501 with a thickness of 500nm may be deposited on the surface by CVD.
And S160, flattening the surface.
Referring to fig. 3q, the surface silicon dioxide and the silicon nitride layer may be removed by a cmp (common Middle point) method to make the surface flat.
And S170, activating impurities.
Annealing at 950 ℃ and 1150 ℃ for 0.5-2 minutes to activate the ion implanted impurities and drive the impurities in the active region.
And S180, photoetching a lead hole.
Referring to FIG. 3r, a via 1801 is then etched through the silicon dioxide layer.
And S190, forming a lead.
Referring to fig. 3s, a GeSn alloy may be formed in the lead hole by using RPCVD, and the alloy on the surface may be etched away; then, the surface of the substrate is formed into GeSn alloy 1901 by adopting an RPCVD technology to form a lead, wherein the Sn component in the GeSn alloy is 1-30 percent.
S200, passivating, and photoetching PAD.
Referring to fig. 3t, a passivation layer 2001 may be formed by depositing silicon nitride and lithographically patterning the PAD. Finally forming a heterogeneous GeSn-based solid plasma PiN diode with a mesa structure as a basic unit for preparing the silicon-based highly-integrated reconfigurable antenna.
And S210, forming a diode array.
Referring to fig. 3u, the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure is formed by sequentially connecting the heterogeneous GeSn-based solid-state plasma PiN diodes with the mesa structure end to end, and is used for forming a silicon-based reconfigurable monopole antenna.
In the present embodiment, the above various process parameters are illustrated, and the modifications made by the conventional means of those skilled in the art are all within the scope of the present application.
EXAMPLE III
Referring to fig. 4, fig. 4 is a schematic device structure diagram of a heterogeneous GeSn-based solid-state plasma PiN diode with a mesa structure according to an embodiment of the present invention. The PiN diode is manufactured by the manufacturing method shown in fig. 1. Specifically, the heterogeneous GeSn-based solid state plasma PiN diode with a mesa structure is fabricated on a GeOI substrate 301, and a P region 303, an N region 304, and an intrinsic region laterally between the P region 303 and the N region 304 of the PiN diode are all located within a top GeSn region 302 of the substrate.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a heterogeneous GeSn-based solid-state plasma PiN diode array having a mesa structure according to an embodiment of the present invention. The heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure is formed by sequentially connecting basic radiation units PiN diodes of a silicon-based reconfigurable monopole antenna end to end, P areas and N areas between adjacent diodes are connected with each other to form mutual series connection between the diodes, and finally the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure in the silicon-based reconfigurable monopole antenna is formed.
Referring to fig. 1, fig. 1 is a schematic diagram of a silicon-based reconfigurable monopole antenna structure based on a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure according to an embodiment of the present invention. The silicon-based reconfigurable monopole antenna comprises: a semiconductor substrate GeOI1, an antenna arm 2, a first dc bias line 3, a second dc bias line 4, a third dc bias line 5, a fourth dc bias line 6, and a coaxial feed line 7; the antenna arm is composed of a plurality of heterogeneous GeSn-based solid plasma PiN diode arrays with mesa structures, and the reconfiguration of the antenna performance is realized by controlling the conduction and the cut-off of different PiN diode arrays.
In summary, the principle and the implementation of the method for manufacturing the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure according to the present invention are explained herein by using specific examples, and the above description of the examples is only used to help understanding the method and the core concept of the method according to the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention, and the scope of the present invention should be subject to the appended claims.
The above disclosure is only for a few specific embodiments of the present invention, however, the present invention is not limited to the above embodiments, and any variations that can be made by those skilled in the art are intended to fall within the scope of the present invention.
Claims (10)
1. The preparation method of the heterogeneous GeSn-based solid-state plasma PiN diode array with the mesa structure is characterized by comprising the following steps of:
(a) selecting a semiconductor GeOI substrate, and doping the GeOI substrate to form a top GeSn region;
(b) forming an active area of the table top on the surface of the GeSn area;
(c) forming a P area and an N area in the active area of the table top by in-situ doping;
(d) and forming GeSn alloy leads on the substrate and connecting the GeSn alloy leads to form a heterogeneous GeSn-based solid-state plasma PiN diode array with a mesa structure.
2. The method of claim 1, wherein the step (a) of doping the GeOI substrate to form a top GeSn region comprises the steps of:
(a1) photoetching the GeOI substrate;
(a2) doping the GeOI substrate with Sn component to form a top GeSn region, and dynamically controlling the content of the Sn component in the top Ge layer to realize the maximum injection ratio of current carriers;
(a3) and removing the photoresist.
3. The method for preparing a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure according to claim 1, wherein the step (b) forms an active region of the mesa, and the method comprises the following steps:
(b1) depositing a layer of silicon nitride on the surface of the GeSn area by Chemical Vapor Deposition (CVD);
(b2) forming a mesa active region pattern on the silicon nitride layer by utilizing a photoetching process;
(b3) and etching the protective layer and the top GeSn region at the designated position of the active region pattern by using a dry etching process so as to form a mesa active region.
4. The method for preparing the heterogeneous GeSn-based solid state plasma PiN diode array with the mesa structure as claimed in claim 1, wherein the specific method for forming the P region and the N region by in-situ doping in the step (c) comprises the following steps:
(c1) flattening the periphery of the active area of the table board;
(c2) depositing P-type AlAs on the P area pattern on the surface of the substrate by in-situ doping to form a P area;
(c3) and depositing N-type AlAs on the N region pattern on the surface of the substrate by utilizing in-situ doping to form an N region.
5. The method for preparing a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure as claimed in claim 4, wherein the step (c1) of planarizing the periphery of the active region of the mesa specifically comprises the following steps:
(c11) oxidizing the peripheral side wall of the table-board active region to form an oxide layer on the peripheral side wall of the table-board active region;
(c12) and etching the peripheral side wall oxide layer of the table-board active region by using a wet etching process to complete the planarization of the peripheral side wall of the table-board active region.
6. The method for preparing a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure as claimed in claim 4, wherein the specific method for forming the P region by in-situ doping deposition of P-type AlAs in the step (c2) comprises the following steps:
(c21) depositing a layer of silicon dioxide on the surface of the substrate by Chemical Vapor Deposition (CVD);
(c22) forming a P area pattern on the silicon dioxide layer by utilizing a photoetching process;
(c23) removing silicon dioxide on the P area by using a wet etching process;
(c24) forming a P area by in-situ doping deposition of P-type AlAs;
(c25) the surface of the P area is flattened by utilizing a dry etching process, and then the silicon dioxide on the surface of the substrate is removed by utilizing a wet etching process.
7. The method for preparing a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure as claimed in claim 4, wherein the specific method for forming the N region by in-situ doping deposition of N-type AlAs in the step (c3) comprises the following steps:
(c31) depositing a layer of silicon dioxide on the surface of the substrate by Chemical Vapor Deposition (CVD);
(c32) forming an N area pattern on the silicon dioxide layer by utilizing a photoetching process;
(c33) removing silicon dioxide on the N region by using a wet etching process;
(c34) forming an N region by in-situ doping deposition of N-type AlAs;
(c35) the surface of the N area is flattened by utilizing a dry etching process, and then the silicon dioxide on the surface of the substrate is removed by utilizing a wet etching process.
8. The method of claim 1, wherein the step (d) of forming the heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure comprises the steps of:
(d1) generating silicon dioxide on the substrate;
(d2) activating impurities in the P area and the N area by using an annealing process to form a diode;
(d3) photoetching lead holes in the P area and the N area and forming a GeSn alloy lead by adopting plasma chemical vapor deposition (RPCVD);
(d4) passivating and photoetching PAD;
(d5) the diodes are connected in series to form a heterogeneous GeSn-based solid state plasma PiN diode array with a mesa structure.
9. A heterogeneous GeSn-based solid-state plasma PiN diode array having a mesa structure, characterized by being produced by the production method according to any one of claims 1 to 8.
10. A silicon-based reconfigurable monopole antenna is characterized by comprising a semiconductor substrate GeOI, an antenna arm, a first direct current bias line, a second direct current bias line, a third direct current bias line, a fourth direct current bias line and a coaxial feeder line; the antenna arm is connected with a coaxial feeder line, the antenna arm is composed of a plurality of heterogeneous GeSn-based solid-state plasma PiN diode arrays with mesa structures as claimed in claim 9, the diode arrays are connected to a direct-current bias power supply through a first direct-current bias line, a second direct-current bias line, a third direct-current bias line and a fourth direct-current bias line, and the conduction and the cut-off of the different PiN diode arrays are dynamically controlled through the direct-current feeder line, so that the dynamic reconfiguration of the antenna performance is realized.
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