CN106876872A - The preparation method of the Ge base restructural dipole antennas based on AlAs/Ge/AlAs structures - Google Patents
The preparation method of the Ge base restructural dipole antennas based on AlAs/Ge/AlAs structures Download PDFInfo
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- CN106876872A CN106876872A CN201611184373.4A CN201611184373A CN106876872A CN 106876872 A CN106876872 A CN 106876872A CN 201611184373 A CN201611184373 A CN 201611184373A CN 106876872 A CN106876872 A CN 106876872A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 71
- 239000002184 metal Substances 0.000 claims abstract description 29
- 239000010410 layer Substances 0.000 claims description 71
- 238000000034 method Methods 0.000 claims description 49
- 239000000463 material Substances 0.000 claims description 29
- 230000008569 process Effects 0.000 claims description 25
- 239000011241 protective layer Substances 0.000 claims description 22
- 238000001259 photo etching Methods 0.000 claims description 18
- 238000002955 isolation Methods 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 15
- 239000012535 impurity Substances 0.000 claims description 12
- 239000007787 solid Substances 0.000 claims description 11
- 238000001039 wet etching Methods 0.000 claims description 10
- 238000005516 engineering process Methods 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 239000003292 glue Substances 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 229910052681 coesite Inorganic materials 0.000 claims description 3
- 229910052906 cristobalite Inorganic materials 0.000 claims description 3
- 239000007769 metal material Substances 0.000 claims description 3
- 229910052752 metalloid Inorganic materials 0.000 claims description 3
- 150000002738 metalloids Chemical class 0.000 claims description 3
- 229910052682 stishovite Inorganic materials 0.000 claims description 3
- 229910052905 tridymite Inorganic materials 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 238000007740 vapor deposition Methods 0.000 claims 1
- 230000009191 jumping Effects 0.000 abstract description 2
- 230000010354 integration Effects 0.000 abstract 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 26
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 25
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- 150000002500 ions Chemical class 0.000 description 8
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- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 229910052732 germanium Inorganic materials 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- XZWYZXLIPXDOLR-UHFFFAOYSA-N metformin Chemical compound CN(C)C(=N)NC(N)=N XZWYZXLIPXDOLR-UHFFFAOYSA-N 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
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- 238000004544 sputter deposition Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
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- 229910045601 alloy Inorganic materials 0.000 description 1
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- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
- H01L29/66204—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/36—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/50—Structural association of antennas with earthing switches, lead-in devices or lightning protectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q5/00—Arrangements for simultaneous operation of antennas on two or more different wavebands, e.g. dual-band or multi-band arrangements
- H01Q5/30—Arrangements for providing operation on different wavebands
- H01Q5/307—Individual or coupled radiating elements, each element being fed in an unspecified way
- H01Q5/314—Individual or coupled radiating elements, each element being fed in an unspecified way using frequency dependent circuits or components, e.g. trap circuits or capacitors
- H01Q5/321—Individual or coupled radiating elements, each element being fed in an unspecified way using frequency dependent circuits or components, e.g. trap circuits or capacitors within a radiating element or between connected radiating elements
Abstract
The present invention relates to a kind of preparation method of the Ge base restructural dipole antennas based on AlAs/Ge/AlAs structures, wherein, the restructural dipole antenna includes:GeOI substrates, first antenna arm, the second antenna arm, coaxial feeder and direct current biasing line;The preparation method includes:Choose GeOI substrates;The Ge base SPiN diodes of AlAs/Ge/AlAs structures are made on the GeOI substrates;Joined end to end successively by the Ge base SPiN diodes of multiple AlAs/Ge/AlAs structures and form SPiN diode strings;The first antenna arm and the second antenna arm are made by multiple SPiN diodes strings;The direct current biasing line is made on the GeOI substrates;Coaxial feeder is made on the first antenna arm and the second antenna arm to form the restructural dipole antenna, restructural dipole antenna prepared by the present invention, by metal direct current biasing line traffic control SPiN diode current flows, form the adjustable length of plasma antenna arm, so as to realize the restructural of operating frequency of antenna, with it is easy of integration, can stealthy, frequency can rapid jumping the characteristics of.
Description
Technical field
The invention belongs to technical field of semiconductors, and in particular to a kind of Ge base restructurals based on AlAs/Ge/AlAs structures
The preparation method of dipole antenna.
Background technology
Develop swift and violent today in antenna technology, the development trend of new generation of wireless communication system includes realizing high-speed data
Transmission, realizes the interconnection between multiple wireless systems, realizes effective utilization of limited frequency spectrum resource, obtains to surrounding environment
Adaptive ability etc..It is difficult to meet various system requirements and complicated and changeable to break through the changeless service behaviour of traditional antenna
Applied environment, the concept of reconfigurable antenna paid attention to and developed.Reconstructable microstrip aerial is because of its small volume, and section is low
The advantages of as reconfigurable antenna research focus.
As wireless system is to Large Copacity, the development in multi-functional, multiband/ultra wide band direction, different communication systems are mutual
Fusion so that the information subsystem quantity carried in identical platform increases, antenna amount also accordingly increases, but antenna amount
Increasing the aspects such as Electro Magnetic Compatibility, cost, weight to communication system has larger negative effect.Therefore, wireless communication system
It is required that antenna can change its electrical characteristics according to practical service environment, that is, realize " restructural " of antenna performance.Reconfigurable antenna
Function with multiple antennas, reduces the quantity of antenna in system.Wherein, reconstructable microstrip aerial is cutd open because of its small volume
The low advantage in face is paid close attention to by reconfigurable antenna research field.
The each several part of current frequency reconfigurable microstrip antenna has mutual coupling, and frequency hopping is slow, and feed structure is complicated, hidden
Body performance is not good, and section is high, and the difficulty problems demand of integrated processing is solved.
The content of the invention
In order to solve the above-mentioned problems in the prior art, AlAs/Ge/AlAs structures are based on the invention provides one kind
Ge base restructural dipole antennas preparation method.The technical problem to be solved in the present invention is achieved through the following technical solutions:
The embodiment provides a kind of Ge base restructural dipole antennas based on AlAs/Ge/AlAs structures
Preparation method, wherein, the restructural dipole antenna includes:GeOI substrates, first antenna arm, the second antenna arm, coaxial feed
Line and direct current biasing line;The preparation method includes:
Choose GeOI substrates;
The Ge base SPiN diodes of AlAs/Ge/AlAs structures are made on the GeOI substrates;
Joined end to end successively by the Ge base SPiN diodes of multiple AlAs/Ge/AlAs structures and form SPiN diodes
String;
The first antenna arm and the second antenna arm are made by multiple SPiN diodes strings;
The direct current biasing line is made on the GeOI substrates;Made on the first antenna arm and the second antenna arm
Coaxial feeder is forming the restructural dipole antenna.
In one embodiment of the invention, the Ge bases SPiN of AlAs/Ge/AlAs structures is made on the GeOI substrates
Diode, including:
A () chooses GeOI substrates, and set isolated area in the GeOI substrates;
B () etches the GeOI substrates and forms p-type groove and N-type groove;
C () aoxidizes the p-type groove and the N-type groove so that the inwall of the p-type groove and the N-type groove is formed
Oxide layer;
D () etches the oxide layer of the p-type groove and the N-type trench wall using wet-etching technology described to complete
The planarizing of p-type groove and the N-type trench wall;
E () deposits AlAs materials in the p-type groove and the N-type groove, and to the p-type groove and the N-type
AlAs materials in groove carry out ion implanting and form p-type active area and N-type active area;
F () generates SiO in whole substrate surface2Material;The p-type active area and the N-type are activated using annealing process
Impurity in active area;
G () forms lead in the p-type active area and the N-type surfaces of active regions, to complete the AlAs/Ge/AlAs
The preparation of the base plasma pin diodes of structure.
Wherein, step (a) includes:
(a1) the first protective layer is formed in the GeOI substrate surfaces;
(a2) the first isolated area figure is formed on first protective layer using photoetching process;
(a3) dry etch process is utilized, in first protection of the specified location etching of the first isolated area figure
Layer and the GeOI substrates to form isolation channel, and the isolation channel depth more than or equal to the top layer Ge's of the GeOI substrates
Thickness;
(a4) isolation channel is filled to form the isolated area.
On the basis of above-described embodiment, step (b) includes:
(b1) the second protective layer is formed in the GeOI substrate surfaces;
(b2) the second isolated area figure is formed on second protective layer using photoetching process;
(b3) the specified location etching described second using dry etch process in the second isolated area figure is protected
Layer and top layer Ge the layer of the GeOI substrates are with described top layer Ge layer interior formation the p-type groove and the N-type groove.
Wherein, step (e) includes:
(e1) MOCVD techniques are utilized, in the p-type groove and the N-type groove and whole substrate surface deposit AlAs
Material;
(e2) CMP is utilized, after planarizing process GeOI substrates, AlAs layers is formed on GeOI substrates;
(e3) photoetching AlAs layers, and using the method with glue ion implanting to where the p-type groove and the N-type groove
Position is injected separately into p type impurity and N-type impurity and is connect with forming the p-type active area and the N-type active area and forming p-type simultaneously
Touch area and N-type contact zone;
(e4) photoresist is removed;
(e5) the AlAs materials beyond p-type contact zone and N-type contact zone are removed using wet etching.
Wherein, step (g) includes:
(g1) the p-type contact zone and N-type contact zone surface specific bit are etched away using anisotropic etch process
The SiO for putting2Material is forming the fairlead;
(g2) to depositing metal material in the fairlead, treatment is passivated to whole backing material and photoetching PAD with
Form the Ge base SPiN diodes of the AlAs/Ge/AlAs structures.
In one embodiment of the invention, the direct current biasing line includes that the first direct current biasing line (5), the second direct current are inclined
Put line (6), the 3rd direct current biasing line (7), the 4th direct current biasing line (8), the 5th direct current biasing line (9), the 6th direct current biasing line
(10), the 7th direct current biasing line (11), the 8th direct current biasing line (12), the direct current biasing line use the side of chemical vapor deposition
Method is fixed on the GeOI substrates (1).
In one embodiment of the invention, it is characterised in that
The first antenna arm (2) and second antenna arm (3) are respectively arranged at the both sides of the coaxial feeder (4),
First antenna arm (2) includes SPiN diodes string (w1), the 2nd SPiN diodes string (w2) and the 3rd that are sequentially connected in series
SPiN diodes string (w3), second antenna arm (3) includes the 4th SPiN diodes string (w4), the 5th SPiN that are sequentially connected in series
Diode string (w5) and the 6th SPiN diodes string (w6);
Wherein, the length of SPiN diodes string (w1) is equal to the length of the 6th SPiN diodes string (w6)
Degree, the length of the 2nd SPiN diodes string (w2) is equal to the length of the 5th SPiN diodes string (w5), the described 3rd
The length of SPiN diodes string (w3) is equal to the length of the 4th SPiN diodes string (w4);The first antenna arm (2) and
The length of second antenna arm (3) is a quarter of its reception or the electromagnetic wavelength for sending.
In one embodiment of the invention, the SPiN diodes in the SPiN diodes string include P+ areas (27), N+
Area (26) and intrinsic region (22), and also include the first metal contact zone (23) and the second metal contact zone (24);Wherein,
The first metal contact zone (23) is electrically connected the positive pole of the P+ areas (27) and the DC offset voltage,
The second metal contact zone (24) is electrically connected the negative pole of the N+ areas (26) and the DC offset voltage, so that correspondence
Its all SPiN diode is in forward conduction state after SPiN diode strings are applied in DC offset voltage.
In one embodiment of the invention, the internal core wire of the coaxial feeder (4) is welded in the first antenna arm (2)
Sheet metal, the sheet metal of the first antenna arm (2) is connected with direct current biasing line (5);The screen layer of the coaxial feeder (4)
It is welded in the sheet metal of second antenna arm (3), the sheet metal of second antenna arm (3) and the second direct current biasing line (6)
It is connected;The first direct current biasing line (5), the second direct current biasing line (6) are connected with the negative pole of DC offset voltage, to be formed
Public negative pole;
First direct current biasing line group (7,12) is formed by the 3rd direct current biasing line (7) and the 8th direct current biasing line (12), by
4th direct current biasing line (8) and the 7th direct current biasing line (11) form the second direct current biasing line group (8,11), inclined by the 5th direct current
Put line (9) and the 6th direct current biasing line (10) forms the 3rd direct current biasing line group (9,10), only select described in Antenna Operation
First direct current biasing line group (7,12), the second direct current biasing line group (8,11) and the 3rd direct current biasing line group (9,10)
In one group be connected with the positive pole of the DC offset voltage so that the diode string of different length is in the conduction state,
The diode produces the irradiation structure for having the solid state plasma of metalloid characteristic for antenna in intrinsic region (22), with
The antenna arm for forming different length and then the restructural for realizing operating frequency of antenna.
Compared with prior art, beneficial effects of the present invention:
The Ge base restructural dipole antennas of AlAs/Ge/AlAs structures prepared by the present invention, small volume, section are low, knot
Structure is simple, easy to process, without complicated feed structure, frequency can rapid jumping, and antenna will be in the stealthy shape of electromagnetic wave when closing
State, can be used for various frequency hopping radio sets or equipment;It is planar structure because its all constituents is in semiconductor chip side,
It is easy to a group battle array, can be used as the basic component units of phased array antenna.
Brief description of the drawings
Fig. 1 is a kind of knot of the Ge base restructural dipole antennas of AlAs/Ge/AlAs structures provided in an embodiment of the present invention
Structure schematic diagram;
Fig. 2 is a kind of system of the Ge base restructural dipole antennas of AlAs/Ge/AlAs structures provided in an embodiment of the present invention
Preparation Method schematic diagram;
Fig. 3 is a kind of preparation method schematic diagram of SPiN diodes provided in an embodiment of the present invention;
Fig. 4 a- Fig. 4 r are a kind of preparation side of the Ge base SPiN diodes of AlAs/Ge/AlAs structures of the embodiment of the present invention
Method schematic diagram;
Fig. 5 is that a kind of Ge base SPiN diode structures of AlAs/Ge/AlAs structures provided in an embodiment of the present invention are illustrated
Figure;
Fig. 6 is that a kind of structure of the Ge base SPiN diode strings of AlAs/Ge/AlAs structures provided in an embodiment of the present invention is shown
It is intended to.
Specific embodiment
Further detailed description is done to the present invention with reference to specific embodiment, but embodiments of the present invention are not limited to
This.
Embodiment one
Fig. 1 is referred to, Fig. 1 is a kind of Ge base restructurals based on AlAs/Ge/AlAs structures provided in an embodiment of the present invention
Dipole antenna configuration schematic diagram, wherein, the restructural dipole antenna includes:GeOI substrates, first antenna arm, second day
Line arm, coaxial feeder and direct current biasing line;Fig. 2 is referred to, Fig. 2 is that the Ge bases based on AlAs/Ge/AlAs structures can
Reconstruct dipole antenna preparation method flow chart:
Choose GeOI substrates;
The Ge base SPiN diodes of AlAs/Ge/AlAs structures are made on the GeOI substrates;
Joined end to end successively by the Ge base SPiN diodes of multiple AlAs/Ge/AlAs structures and form SPiN diodes
String;
The first antenna arm and the second antenna arm are made by multiple SPiN diodes strings;
The direct current biasing line is made on the GeOI substrates;Made on the first antenna arm and the second antenna arm
Coaxial feeder is forming the restructural dipole antenna.
Fig. 3 is referred to, Fig. 3 is prepared by the Ge base SPiN diodes that AlAs/Ge/AlAs structures are made on the GeOI substrates
Method flow diagram:Including:
A () chooses GeOI substrates, and set isolated area in the GeOI substrates;
B () etches the GeOI substrates and forms p-type groove and N-type groove;
C () aoxidizes the p-type groove and the N-type groove so that the inwall of the p-type groove and the N-type groove is formed
Oxide layer;
D () etches the oxide layer of the p-type groove and the N-type trench wall using wet-etching technology described to complete
The planarizing of p-type groove and the N-type trench wall;
E () deposits AlAs materials in the p-type groove and the N-type groove, and to the p-type groove and the N-type
AlAs materials in groove carry out ion implanting and form p-type active area and N-type active area;
F () generates SiO in whole substrate surface2Material;The p-type active area and the N-type are activated using annealing process
Impurity in active area;
G () forms lead in the p-type active area and the N-type surfaces of active regions, to complete the AlAs/Ge/AlAs
The preparation of the base plasma pin diodes of structure.
Wherein, it is for step (a), the reason for using GeOI substrates, for solid plasma antenna because it needs
Good microwave property, and solid plasma pin diodes in order to meet this demand, it is necessary to possess good isolation characteristic and
Carrier is the restriction ability of solid state plasma, and GeOI substrates can be conveniently formed pin because it has with isolation channel
Area of isolation, silica (SiO2) also can be that solid state plasma is limited in top layer Ge by carrier, it is advantageous to adopt
With GeOI as solid plasma pin diodes substrate.Also, because the carrier mobility of germanium material is than larger, therefore can
Plasma density higher is formed in I areas, the performance of device is improved.
In one embodiment of the invention, step (a) includes:
(a1) the first protective layer is formed in the GeOI substrate surfaces;
(a2) the first isolated area figure is formed on first protective layer using photoetching process;
(a3) dry etch process is utilized, in first protection of the specified location etching of the first isolated area figure
Layer and the GeOI substrates to form isolation channel, and the isolation channel depth more than or equal to the top layer Ge's of the GeOI substrates
Thickness;
(a4) isolation channel is filled to form the isolated area.
Specifically, the first protective layer includes the first silica (SiO2) layer and the first silicon nitride (SiN) layer;Then first protect
The formation of sheath includes:In GeOI substrate surfaces generation silica (SiO2) forming the first silica (SiO2) layer;
One silica (SiO2) layer surface generates silicon nitride (SiN) forming the first silicon nitride (SiN) layer.The benefit of do so exists
In using silica (SiO2) loose nature, by the stress isolation of silicon nitride (SiN), prevent it from conducting into top layer Ge,
Ensure that the stabilization of top layer Ge performances;Based on silicon nitride (SiN) and high selectivities of the Ge in dry etching, using silicon nitride
(SiN) film is sheltered as dry etching, it is easy to which technique is realized.It is, of course, understood that the number of plies of protective layer and protection
The material of layer is not limited herein, as long as protective layer can be formed.
Wherein, thickness of the depth of isolation channel more than or equal to top layer Ge, it is ensured that silica (SiO in follow-up groove2) with
The connection of the oxide layer of GeOI substrates, forms complete being dielectrically separated from.
In one embodiment of the invention, step (b) includes:
(b1) the second protective layer is formed in the GeOI substrate surfaces;
(b2) the second isolated area figure is formed on second protective layer using photoetching process;
(b3) the specified location etching described second using dry etch process in the second isolated area figure is protected
Layer and top layer Ge the layer of the GeOI substrates are with described top layer Ge layer interior formation the p-type groove and the N-type groove.
Specifically, the second protective layer includes the second silica (SiO2) layer and the second silicon nitride (SiN) layer;Then second protect
The formation of sheath includes:In GeOI substrate surfaces generation silica (SiO2) forming the second silica (SiO2) layer;
Two silica (SiO2) layer surface generates silicon nitride (SiN) forming the second silicon nitride (SiN) layer.The benefit of do so is similar to
In the effect of the first protective layer, here is omitted.
Wherein, the depth of p-type groove and N-type groove is served as a contrast more than the second protective layer thickness and less than the second protective layer and GeOI
Bottom top layer Ge thickness sums.Preferably, distance of the bottom of the p-type groove and N-type groove away from the top layer Ge bottoms of GeOI substrates
It is 0.5 micron~30 microns, forms the deep trouth being generally acknowledged that, impurity point can be so formed when p-type and N-type active area is formed
Cloth is uniform and P, N area of high-dopant concentration and tied with precipitous Pi and Ni, is beneficial to and improves i areas plasma density.
In one embodiment of the invention, step (e) includes:
(e1) MOCVD techniques are utilized, in the p-type groove and the N-type groove and whole substrate surface deposit AlAs
Material;
(e2) CMP is utilized, after planarizing process GeOI substrates, AlAs layers is formed on GeOI substrates;
(e3) photoetching AlAs layers, and using the method with glue ion implanting to where the p-type groove and the N-type groove
Position is injected separately into p type impurity and N-type impurity and is connect with forming the p-type active area and the N-type active area and forming p-type simultaneously
Touch area and N-type contact zone;
(e4) photoresist is removed;
(e5) the AlAs materials beyond p-type contact zone and N-type contact zone are removed using wet etching.
In one embodiment of the invention, step (g) includes:
(g1) the p-type contact zone and N-type contact zone surface specific bit are etched away using anisotropic etch process
The SiO for putting2Material is forming the fairlead;
(g2) to depositing metal material in the fairlead, treatment is passivated to whole backing material and photoetching PAD with
Form the Ge base SPiN diodes of the AlAs/Ge/AlAs structures.
In one embodiment of the invention, the direct current biasing line includes that the first direct current biasing line (5), the second direct current are inclined
Put line (6), the 3rd direct current biasing line (7), the 4th direct current biasing line (8), the 5th direct current biasing line (9), the 6th direct current biasing line
(10), the 7th direct current biasing line (11), the 8th direct current biasing line (12), the direct current biasing line use the side of chemical vapor deposition
Method is fixed on the GeOI substrates (1).
In one embodiment of the invention, the first antenna arm (2) and second antenna arm (3) are respectively arranged at
The both sides of the coaxial feeder (4), first antenna arm (2) includes SPiN diodes string (w1), second that are sequentially connected in series
SPiN diodes string (w2) and the 3rd SPiN diodes string (w3), second antenna arm (3) including be sequentially connected in series the 4th
SPiN diodes string (w4), the 5th SPiN diodes string (w5) and the 6th SPiN diodes string (w6);
Wherein, the length of SPiN diodes string (w1) is equal to the length of the 6th SPiN diodes string (w6)
Degree, the length of the 2nd SPiN diodes string (w2) is equal to the length of the 5th SPiN diodes string (w5), the described 3rd
The length of SPiN diodes string (w3) is equal to the length of the 4th SPiN diodes string (w4);The first antenna arm (2) and
The length of second antenna arm (3) is a quarter of its reception or the electromagnetic wavelength for sending.
In one embodiment of the invention, the SPiN diodes for being provided for the present invention please also refer to Fig. 4 and Fig. 5, Fig. 4
Structural representation;Fig. 5 is a kind of structural representation of SPiN diodes string provided in an embodiment of the present invention.The poles of the SPiN bis-
SPiN diodes in pipe string include P+ areas (27), N+ areas (26) and intrinsic region (22), and also include the first metal contact zone
And the second metal contact zone (24) (23);Wherein,
The first metal contact zone (23) is electrically connected the positive pole of the P+ areas (27) and the DC offset voltage,
The second metal contact zone (24) is electrically connected the negative pole of the N+ areas (26) and the DC offset voltage, so that correspondence
Its all SPiN diode is in forward conduction state after SPiN diode strings are applied in DC offset voltage.
In one embodiment of the invention, the internal core wire of the coaxial feeder (4) is welded in the first antenna arm (2)
Sheet metal, the sheet metal of the first antenna arm (2) is connected with direct current biasing line (5);The screen layer of the coaxial feeder (4)
It is welded in the sheet metal of second antenna arm (3), the sheet metal of second antenna arm (3) and the second direct current biasing line (6)
It is connected;The first direct current biasing line (5), the second direct current biasing line (6) are connected with the negative pole of DC offset voltage, to be formed
Public negative pole;
First direct current biasing line group (7,12) is formed by the 3rd direct current biasing line (7) and the 8th direct current biasing line (12), by
4th direct current biasing line (8) and the 7th direct current biasing line (11) form the second direct current biasing line group (8,11), inclined by the 5th direct current
Put line (9) and the 6th direct current biasing line (10) forms the 3rd direct current biasing line group (9,10), only select described in Antenna Operation
First direct current biasing line group (7,12), the second direct current biasing line group (8,11) and the 3rd direct current biasing line group (9,10)
In one group be connected with the positive pole of the DC offset voltage so that the diode string of different length is in the conduction state,
The diode produces the irradiation structure for having the solid state plasma of metalloid characteristic for antenna in intrinsic region (22), with
The antenna arm for forming different length and then the restructural for realizing operating frequency of antenna.
The preparation method of the Ge base restructural dipole antennas based on AlAs/Ge/AlAs structures that the present invention is provided possesses
Following advantage:
1st, small volume, section are low, simple structure, easy to process.
2nd, using coaxial cable as feed, without complicated feed structure.
3rd, need to be only turned on or off by controlling it as the basic component units of antenna using SPiN diodes, you can
Realize the restructural of frequency.
4th, all constituents are in semiconductor chip side, it is easy to plate-making processing.
Embodiment two
Refer to base of a kind of AlAs/Ge/AlAs structures etc. that Fig. 4 a- Fig. 4 r, Fig. 4 a- Fig. 4 r are the embodiment of the present invention from
The preparation method schematic diagram of sub- pin diodes, on the basis of above-described embodiment one, to prepare channel length as 22nm (solid-states
Ion plasma length of field be 100 microns) AlAs/Ge/AlAs structures base plasma pin diodes as a example by carry out specifically
It is bright, comprise the following steps that:
Step 1, backing material preparation process:
(1a) as shown in fig. 4 a, chooses (100) crystal orientation, and doping type is p-type, and doping concentration is 1014cm-3GeOI lining
Egative film 101, the thickness of top layer Ge is 50 μm;
(1b) as shown in Figure 4 b, using chemical vapor deposition (Chemical vapor deposition, abbreviation CVD)
Method, deposits one layer of SiO of 40nm thickness on GeOI substrates2Layer 201;
(1c) deposits one layer of 2 Si of μ m thick using the method for chemical vapor deposition on substrate3N4/ SiN layer
202;
Step 2, isolates preparation process:
(2a) as illustrated in fig. 4 c, isolated area, wet etching isolated area is formed by photoetching process on above-mentioned protective layer
One Si3N4/ SiN layer 202, forms isolated area figure;Using dry etching, form wide 5 μm in isolated area, depth be 50 μm it is deep every
From groove 301;
(2b) as shown in figure 4d, using the method for CVD, deposits SiO2401 fill up the deep isolation trench;
(2c) as shown in fig 4e, using chemically mechanical polishing (Chemical Mechanical Polishing, referred to as
CMP) method, removes the Si of surface the3N4The SiO of/SiN layer 202 and the2Layer 201, makes GeOI substrate surfaces smooth;
Step 3, P, N area deep trouth preparation process:
(3a) as shown in fig. 4f, using CVD method, consecutive deposition prolongs two layer materials on substrate, and ground floor is 300nm thick
2nd SiO of degree2Layer 601, the second layer is the 2nd Si of 500nm thickness3N4/ SiN layer 602;
(3b) as shown in figure 4g, photoetching P, N areas deep trouth, the Si of wet etching P, N areas the 2nd3N4The SiO of/SiN layer 602 and the 2nd2
Layer 601, forms P, N area figure;Using dry etching, form wide 4 μm in P, N area, deep 5 μm deep trouth 701, the length of P, N area groove
Degree determines according to the applicable cases in prepared antenna;
(3c) as shown in figure 4h, at 850 DEG C, high-temperature process 10 minutes, oxidation trough inwall forms oxide layer 801, so that
P, N area groove inwall are smooth;
(3d) as shown in figure 4i, the oxide layer 801 of P, N area groove inwall is removed using wet-etching technology.
Step 4, P, N contact zone preparation process:
(4a) as shown in figure 4j, using Metalorganic chemical vapor deposition (Metal-organic Chemical Vapor
Deposition, abbreviation MOCVD) technique, polymorph A lAs1001 is deposited in P, N area groove, and groove is filled up;
(4b) as shown in fig. 4k, using CMP, removes surface polymorph A lAs1001 and the 2nd Si3N4/ SiN layer 602, makes surface
It is smooth;
(4c) as shown in Fig. 4 l, using the method for CVD, in one layer of polymorph A lAs1201 of surface deposition, thickness is 200~
500nm;
(4d) as shown in Fig. 4 m, photoetching P areas active area carries out P using band glue ion injection method+Injection, makes P areas active
Area's doping concentration reaches 0.5 × 1020cm-3, photoresist is removed, form P contacts 1301;
(4e) photoetching N areas active area, N is carried out using band glue ion injection method+Injection, makes N areas active area doping concentration
It is 0.5 × 1020cm-3, photoresist is removed, form N contacts 1302;
(4f), using wet etching, etches away the polymorph A lAs1201 beyond P, N contact zone as shown in Fig. 4 n, forms P, N
Contact zone;
(4g) as shown in Fig. 4 o, using the method for CVD, in surface deposition SiO21501, thickness is 800nm;
(4h) anneals 1 minute at 1000 DEG C, makes the impurity activation of ion implanting and advances impurity in AlAs;
Step 5, constitutes PIN diode step:
(5a) as shown in Fig. 4 p, the lithography fair lead 1601 in P, N contact zone;
(5b) as shown in Fig. 4 q, substrate surface splash-proofing sputtering metal forms metal silicide 1701, and etch in 750 DEG C of alloys
Fall the metal on surface;
(5c) substrate surface splash-proofing sputtering metal, photoetching lead;
(5d) deposits Si as shown in Fig. 4 r3N4/ SiN forms passivation layer 1801, and photoetching PAD forms PIN diode, as
Prepare solid plasma antenna material.
In the present embodiment, above-mentioned various technological parameters are for example, according to the conventional meanses of those skilled in the art
The conversion done is the protection domain of the application.
Prepared by the present invention is applied to the Ge base restructural dipole antennas based on AlAs/Ge/AlAs structures, first, institute
The germanium material for using, due to its high mobility and the characteristic of big carrier lifetime, improves the solid state plasma of pin diodes
Concentration;Secondly, the treatment that germanium material is planarized due to the characteristic of its oxide GeO heat endurances difference, P areas and N areas deep groove side wall
Can be automatically performed in hot environment, simplify the preparation method of material;Again, the solid plasma that is applied to that prepared by the present invention can
The GeOI base pin diodes of reconfigurable antenna employ a kind of Deep trench isolation technique based on etching, are effectively improved device
The breakdown voltage of part, it is suppressed that influence of the leakage current to device performance.
In sum, specific case used herein is to Ge base restructural of the present invention based on AlAs/Ge/AlAs structures
The principle and implementation method of the preparation method of dipole antenna are set forth, and the explanation of above example is only intended to help and manages
The solution method of the present invention and its core concept;Simultaneously for those of ordinary skill in the art, according to thought of the invention,
Be will change in specific embodiment and range of application, in sum, this specification content should not be construed as to this hair
Bright limitation, protection scope of the present invention should be defined by appended claim.
Claims (10)
1. a kind of preparation method of the Ge base restructural dipole antennas based on AlAs/Ge/AlAs structures, it is characterised in that institute
Stating restructural dipole antenna includes:GeOI substrates, first antenna arm, the second antenna arm, coaxial feeder and direct current biasing line;
Wherein, the preparation method includes:
Choose GeOI substrates;
The Ge base SPiN diodes of AlAs/Ge/AlAs structures are made on the GeOI substrates;
Joined end to end successively by the Ge base SPiN diodes of multiple AlAs/Ge/AlAs structures and form SPiN diode strings;
The first antenna arm and the second antenna arm are made by multiple SPiN diodes strings;
The direct current biasing line is made on the GeOI substrates;Made on the first antenna arm and the second antenna arm coaxial
Feeder line is forming the restructural dipole antenna.
2. preparation method as claimed in claim 1, it is characterised in that AlAs/Ge/AlAs knots are made on the GeOI substrates
The Ge base SPiN diodes of structure, including:
A () chooses GeOI substrates, and set isolated area in the GeOI substrates;
B () etches the GeOI substrates and forms p-type groove and N-type groove;
C () aoxidizes the p-type groove and the N-type groove so that the inwall of the p-type groove and the N-type groove forms oxidation
Layer;
D () etches the oxide layer of the p-type groove and the N-type trench wall to complete the p-type using wet-etching technology
The planarizing of groove and the N-type trench wall.
E () deposits AlAs materials in the p-type groove and the N-type groove, and to the p-type groove and the N-type groove
Interior AlAs materials carry out ion implanting and form p-type active area and N-type active area;
F () generates SiO in whole substrate surface2Material;The p-type active area and the N-type active area are activated using annealing process
In impurity.
G () forms lead in the p-type active area and the N-type surfaces of active regions, to complete the AlAs/Ge/AlAs structures
Base plasma pin diodes preparation.
3. preparation method as claimed in claim 2, it is characterised in that step (a) includes:
(a1) the first protective layer is formed in the GeOI substrate surfaces;
(a2) the first isolated area figure is formed on first protective layer using photoetching process;
(a3) utilize dry etch process, the specified location of the first isolated area figure etch first protective layer and
The GeOI substrates to form isolation channel, and the isolation channel thickness of the depth more than or equal to the top layer Ge of the GeOI substrates
Degree;
(a4) isolation channel is filled to form the isolated area.
4. preparation method as claimed in claim 2, it is characterised in that step (b) includes:
(b1) the second protective layer is formed in the GeOI substrate surfaces;
(b2) the second isolated area figure is formed on second protective layer using photoetching process;
(b3) using dry etch process the specified location of the second isolated area figure etch second protective layer and
Top layer Ge layers of the GeOI substrates is with the formation p-type groove and the N-type groove in described top layer Ge layers.
5. preparation method as claimed in claim 2, it is characterised in that step (e) includes:
(e1) MOCVD techniques are utilized, in the p-type groove and the N-type groove and whole substrate surface deposit AlAs materials;
(e2) CMP is utilized, after planarizing process GeOI substrates, AlAs layers is formed on GeOI substrates;
(e3) photoetching AlAs layers, and using the method with glue ion implanting to the p-type groove and the N-type groove position
P type impurity and N-type impurity is injected separately into form the p-type active area and the N-type active area and form p-type contact zone simultaneously
With N-type contact zone;
(e4) photoresist is removed;
(e5) the AlAs materials beyond p-type contact zone and N-type contact zone are removed using wet etching.
6. preparation method as claimed in claim 2, it is characterised in that step (g) includes:
(g1) the p-type contact zone and N-type contact zone surface specified location are etched away using anisotropic etch process
SiO2Material is forming the fairlead;
(g2) to metal material is deposited in the fairlead, treatment is passivated to whole backing material and photoetching PAD is to form
The Ge base SPiN diodes of the AlAs/Ge/AlAs structures.
7. preparation method as claimed in claim 1, it is characterised in that the direct current biasing line includes the first direct current biasing line
(5), the second direct current biasing line (6), the 3rd direct current biasing line (7), the 4th direct current biasing line (8), the 5th direct current biasing line (9),
6th direct current biasing line (10), the 7th direct current biasing line (11), the 8th direct current biasing line (12), the direct current biasing line useization
The method for learning vapor deposition is fixed on the GeOI substrates (1).
8. preparation method as claimed in claim 1, it is characterised in that
The first antenna arm (2) and second antenna arm (3) are respectively arranged at the both sides of the coaxial feeder (4), first
Antenna arm (2) includes SPiN diodes string (w1), the 2nd SPiN diodes string (w2) and the 3rd SPiN bis- that are sequentially connected in series
Pole pipe string (w3), second antenna arm (3) includes the 4th SPiN diodes string (w4), the 5th SPiN diodes that are sequentially connected in series
String (w5) and the 6th SPiN diodes string (w6);
Wherein, the length of SPiN diodes string (w1) is equal to the length of the 6th SPiN diodes string (w6), institute
The length for stating the 2nd SPiN diodes string (w2) is equal to the length of the 5th SPiN diodes string (w5), the 3rd SPiN bis-
The length of pole pipe string (w3) is equal to the length of the 4th SPiN diodes string (w4);The first antenna arm (2) and described
The length of two antenna arms (3) is a quarter of its reception or the electromagnetic wavelength for sending.
9. preparation method as claimed in claim 1, it is characterised in that the SPiN diodes in the SPiN diodes string include
P+ areas (27), N+ areas (26) and intrinsic region (22), and also include the first metal contact zone (23) and the second metal contact zone (24);
Wherein,
The first metal contact zone (23) is electrically connected the positive pole of the P+ areas (27) and the DC offset voltage, described
Second metal contact zone (24) is electrically connected the negative pole of the N+ areas (26) and the DC offset voltage, so that correspondence SPiN
Its all SPiN diode is in forward conduction state after diode string is applied in DC offset voltage.
10. preparation method as claimed in claim 1, it is characterised in that the internal core wire of the coaxial feeder (4) is welded in described
The sheet metal of first antenna arm (2), the sheet metal of the first antenna arm (2) is connected with direct current biasing line (5);The coaxial feed
The screen layer of line (4) is welded in the sheet metal of second antenna arm (3), the sheet metal and second of second antenna arm (3)
Direct current biasing line (6) is connected;The first direct current biasing line (5), the second direct current biasing line (6) are negative with DC offset voltage
Extremely it is connected, to form public negative pole;
First direct current biasing line group (7,12) is formed by the 3rd direct current biasing line (7) and the 8th direct current biasing line (12), by the 4th
Direct current biasing line (8) and the 7th direct current biasing line (11) form the second direct current biasing line group (8,11), by the 5th direct current biasing line
(9) and the 6th direct current biasing line (10) formed the 3rd direct current biasing line group (9,10), described first is only selected in Antenna Operation
In direct current biasing line group (7,12), the second direct current biasing line group (8,11) and the 3rd direct current biasing line group (9,10)
One group is connected with the positive pole of the DC offset voltage, so that the diode string of different length is in the conduction state, it is described
Diode produces the solid state plasma with metalloid characteristic for the irradiation structure of antenna in intrinsic region (22), to be formed
The antenna arm of different length and then realize the restructural of operating frequency of antenna.
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