CN113281943A - 显示面板及显示装置 - Google Patents
显示面板及显示装置 Download PDFInfo
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- 238000000059 patterning Methods 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims description 51
- 239000004973 liquid crystal related substance Substances 0.000 claims description 7
- 229910004205 SiNX Inorganic materials 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 239000002923 metal particle Substances 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 143
- 238000000034 method Methods 0.000 description 6
- 238000002161 passivation Methods 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 230000003068 static effect Effects 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 2
- 238000005034 decoration Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000002346 layers by function Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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Abstract
本发明提供一种显示面板及显示装置。本发明通过在显示区和栅极驱动单元之间对应扫描线位置增加静电释放器件,其中所述静电释放器件的第一极板由所述扫描线的一部分构成,第二极板由所述有源层于所述第一极板下方图形化形成,第三极板由位于所述第二极板下方图形化的遮光层形成,利用静电释放器件存储静电电荷,诱导在栅极驱动单元附近处静电释放,防止在开关晶体管的栅极层和有源层之间出现静电释放产生金属颗粒,导致栅极层和有源层短路,保护显示区内的晶体管器件,提升制作良率。
Description
技术领域
本发明涉及显示技术领域,特别是涉及一种显示面板及显示装置。
背景技术
在显示面板制造行业中,像素亮点一直是影响良率的常见不良。此不良成因多种多样,最常见的是由于在制程中或机台的静电释放(ESD)造成线路短路搭接异常所致像素被点亮。尽管在显示面板内部有设计不同防静电释放器件,但静电释放器件只能是在该器件的结构形成后才会起作用,具体是在源漏极层制程完成后才能形成完整的静电释放器件,因此如何防止在源漏极层制程之前的静电击伤是目前显示面板的难题。
由于栅极层和有源层之间出现静电释放产生金属颗粒,导致栅极层和有源层之间产生细微的短路路径。电信号通过栅极层传输至有源层,再到源极,源极连接至像素电极导致对应的像素开启而发光,出现亮点异常,特别是在低显示帧频率使用环境下,因为充电时间较长,亮点越明显。尤其是绿色子像素的亮点最为明显,导致产品判定为次品,只能降等级贱卖,很大程度上影响良率,进而影响企业利润。
发明内容
本发明的一个目的在于,提供一种显示面板及显示装置,用以解决现有静电释放器件无法防止栅极层和有源层之间静电击伤的技术问题。
为实现上述目的,本发明提供一种显示面板,所述显示面板包括阵列基板,所述阵列基板包括衬底基板、有源层、栅极绝缘层以及栅极层;所述有源层设于所述衬底基板上;所述栅极绝缘层覆盖所述有源层;所述栅极层设于所述栅极绝缘层上,其中,所述显示面板定义有显示区和环绕所述显示区设置的非显示区,所述阵列基板还包括多个像素、多个栅极驱动单元、多条扫描线以及多个静电释放器件;所述多个像素设置于所述显示区;所述多个栅极驱动单元设置所述非显示区;所述多条扫描线电连接于所述栅极驱动单元并延伸至所述显示区的所述多个像素;所述多个静电释放器件设于所述显示区和所述栅极驱动单元之间对应所述扫描线位置,所述静电释放器件包括相对设置的第一极板和第二极板,其中,所述扫描线的一部分构成所述第一极板,所述有源层于所述第一极板下方图形化形成所述第二极板。
于本申请一实施例中所述的显示面板,其中,每个所述像素包括开关晶体管,每个所述开关晶体管包括依次层迭的有源层图案、所述栅极绝缘层以及栅极图案,所述有源层图案为所述有源层于所述栅极图案下方图形化形成且与所述第二极板彼此电绝缘。
于本申请一实施例中所述的显示面板,其中,所述静电释放器件还包括第三极板,所述第三极板相对所述第二极板设置,所述阵列基板还包括遮光层以及缓冲层;所述遮光层设于所述衬底基板上;所述缓冲层设于所述衬底基板上且完全覆盖所述遮光层,其中,所述有源层设于所述缓冲层上,所述遮光层于所述第二极板下方图形化形成所述第三极板。
于本申请一实施例中所述的显示面板,其中,每个所述开关晶体管还包括遮光层图案设置于所述缓冲层与所述衬底基板之间,所述遮光层图案为所述遮光层于所述有源层图案下方图形化形成且与所述第三极板彼此电绝缘。
于本申请一实施例中所述的显示面板,其中,所述栅极绝缘层或所述缓冲层的材质包括SiNx或SiOx中的一种或其组合。
于本申请一实施例中所述的显示面板,其中,所述栅极层图形化形成所述扫描线,所述扫描线的一部分构成所述栅极图案。
于本申请一实施例中所述的显示面板,其中,形成所述第二极板的所述有源层经导体化处理。
于本申请一实施例中所述的显示面板,其中,每一条所述扫描线贯穿所述显示区,每一条所述扫描线的两端分别电连接一个所述栅极驱动单元,且每一条所述扫描线的所述两端的所述栅极驱动单元和所述显示区之间分别对应设置一个所述静电释放器件。
于本申请一实施例中所述的显示面板,其中,所述显示面板还包括彩膜基板与液晶层,所述彩膜基板与所述阵列基板相对设置,所述液晶层设置于所述彩膜基板与所述阵列基板之间。
为实现上述目的,本发明还提供一种显示装置,包括前文所述的显示面板。
本发明的技术效果在于,提供一种显示面板及显示装置,通过在显示区和栅极驱动区之间对应扫描线位置增加静电释放器件,其中所述静电释放器件的第一极板由所述扫描线的一部分构成,第二极板由所述有源层于所述第一极板下方图形化形成,第三极板由位于所述第二极板下方图形化的遮光层形成,利用静电释放器件存储静电电荷,诱导在栅极驱动区附近处静电释放,防止在开关晶体管的栅极层和有源层之间出现静电释放产生金属颗粒,导致栅极层和有源层短路,保护显示区内的晶体管器件,提升制作良率。
附图说明
下面结合附图,通过对本申请的具体实施方式详细描述,以使本申请的技术方案及其它有益效果显而易见。
图1为本发明实施例中的一种显示装置的平面结构示意图;
图2为本发明实施例中的一种显示面板的截面结构示意图;
图3为本发明实施例中的阵列基板的部分截面结构示意图;
图4为本发明实施例中的阵列基板的部分平面结构示意图;
图5为本发明实施例中的阵列基板的部分平面结构示意图;
图6为本发明实施例中的一种显示面板的截面结构示意图。
附图中部分标识如下:
衬底基板1,遮光层2,缓冲层3,
有源层4,栅极绝缘层5,栅极层6,
层间绝缘层7,源漏极层8,平坦层9,
钝化层11,像素电极层12,发光功能层13,
公共电极层14,开关晶体管21、21’,栅极图案211、211’,
源极图案212,漏极图案213,有源层图案214、214’,
遮光层图案215,像素22,像素电极221,栅极驱动单元23,
扫描线24,静电释放器件25,数据线26,
数据驱动单元27,第一极板31,第二极板32,
第三极板33,显示装置100,显示面板110、110’,
显示区101,非显示区102,阵列基板120、120’,
彩膜基板130,液晶层140,像素定义层150,
控制电路160。
具体实施方式
以下参考说明书附图介绍本发明的优选实施例,用以举例证明本发明可以实施,这些实施例可以向本领域中的技术人员完整介绍本发明的技术内容,使得本发明的技术内容更加清楚和便于理解。然而本发明可以通过许多不同形式的实施例来得以体现,本发明的保护范围并非仅限于文中提到的实施例。
在本发明中,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”、“固定”等术语应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或成一体;可以是机械连接,也可以是电性连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本发明中的具体含义。
在本发明的描述中,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。
在附图中,为了清楚,层和区域的厚度被夸大。例如,为了便于描述,附图中的元件的厚度和尺寸被任意地示出,因此,所描述的技术范围不由附图限定。
本发明一实施例中提供一种显示装置,所述显示装置可以为:手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
如图1所示,本发明一实施例中,所述显示装置100包括显示面板110以及控制电路160。所述显示面板110定义有显示区101和环绕所述显示区101设置的非显示区102。
如图2所示,本发明一实施例中,所述显示面板110包括阵列基板120、彩膜基板130与液晶层140,所述彩膜基板130与所述阵列基板120相对设置,所述液晶层140设置于所述彩膜基板130与所述阵列基板120之间。
图3是图4的阵列基板沿AA’线的剖面图。如图3所示,所述阵列基板120包括衬底基板1、遮光层2、缓冲层3、有源层4、栅极绝缘层5、栅极层6、层间绝缘层7、源漏极层8、平坦层9、钝化层11以及像素电极层12;所述遮光层2设于所述衬底基板1上;所述缓冲层3设于所述衬底基板1上且完全覆盖所述遮光层2;所述有源层4设于所述缓冲层3上;所述栅极绝缘层5覆盖所述有源层4;所述栅极层6设于所述栅极绝缘层5上,所述层间绝缘层7设于所述栅极层6上;所述源漏极层8设于所述层间绝缘层7上;所述平坦层9设于所述源漏极层8上;所述钝化层11设于所述平坦层9上;所述像素电极层12设于所述钝化层11上。
具体的,如图4所示,所述像素电极层12图形化形成多个所述像素电极221。
具体的,所述缓冲层3、所述栅极绝缘层5、层间绝缘层7、平坦层9、钝化层11的材质包括SiNx或SiOx中的一种或其组合,实现电性绝缘作用。所述阵列基板120还可包括换线层设于所述平坦层9与所述钝化层11之间。
如图1所示,所述阵列基板120还包括多个像素22、多个栅极驱动单元23、多条扫描线24以及多个静电释放器件25。所述多个像素22设置于所述显示区101。所述多个栅极驱动单元23设置所述非显示区102。所述多条扫描线24电连接于所述栅极驱动单元23并延伸至所述显示区101的所述多个像素22。
具体的,如图4所示,每个所述像素22包括开关晶体管21、所述栅极驱动单元23通过所述扫描线24及所述开关晶体管21实现与所述像素22的连接。如图1、图4所示,所述多个静电释放器件25设于所述显示区101和所述栅极驱动单元23之间对应所述扫描线24位置。如图3、图4所示,所述静电释放器件25包括相对设置的第一极板31和第二极板32,其中,所述扫描线24的一部分构成所述第一极板31,所述有源层4于所述第一极板31下方图形化形成所述第二极板32。其中,形成所述第二极板32的所述有源层4经导体化处理。
具体的,所述阵列基板120还包括数据驱动单元27用以通过多条数据线26对所述多个像素22提供数据讯号。
本申请一实施例通过所述第一极板31与所述第二极板32之间对应设置形成电容,可以避免在制备开关晶体管21过程中,在形成源漏极层8之前,在开关晶体管21中的所述栅极层6和所述有源层4之间出现静电释放产生金属颗粒,导致所述栅极层6和所述有源层4短路。而且所述静电释放器件25位于所述显示区101和所述栅极驱动单元23之间最易累积静电的位置,提供较佳的静电释放效果,且不影响原有的结构排布,简化了制作工艺。
如图1所示,于本申请一实施例中,每一条所述扫描线24贯穿所述显示区101,每一条所述扫描线24的两端分别电连接一个所述栅极驱动单元23,且每一条所述扫描线24的所述两端的所述栅极驱动单元23和所述显示区101之间分别对应设置一个所述静电释放器件25。在本申请其他实施例中,所述栅极驱动单元23也可仅设置于所述显示区101的一侧。本申请不限于此。
如图3、图4所示,于本申请一实施例中,每个所述开关晶体管21包括依次层迭的有源层图案214、所述栅极绝缘层5以及栅极图案211,所述有源层图案214为所述有源层4于所述栅极图案211下方图形化形成且与所述第二极板32彼此电绝缘。
具体的,本实施例的数据线26与源极图案212位于同一层,为同一种导电材料图形化形成的不同组件。但本申请不以此为限。在其他实施例中,数据线26与源极图案212可以位于不同层。
具体的,本申请一实施例通过所述第一极板31与所述第二极板32之间对应设置形成电容,可以避免在制备开关晶体管21过程中,在形成源极图案212与漏极图案213之前,在开关晶体管21中的所述栅极图案211和所述有源层4的所述有源层图案214之间出现静电释放产生金属颗粒,导致所述栅极图案211和所述有源层图案214短路。于本申请实施例中,每个所述开关晶体管21还包括遮光层图案215设置于所述缓冲层3与所述衬底基板1之间,所述遮光层图案215为所述遮光层2于所述有源层图案214下方图形化形成。
于本申请一实施例中,为了进一步避免在所述开关晶体管21的所述有源层图案214和所述遮光层图案215的之间出现静电释放产生金属颗粒,导致所述遮光层图案215和所述有源层图案214短路。所述静电释放器件25还包括第三极板33。所述第三极板33相对所述第二极板32设置。所述遮光层2于所述第二极板32下方图形化形成所述第三极板33。所述遮光层图案215与所述第三极板33彼此电绝缘。
于本申请一实施例中,所述栅极层6图形化形成所述扫描线24、所述第一极板31、以及所述栅极图案211。可以简化制程,提高生产效率。
如图5所示,于本申请一实施例中,阵列基板120’与上述阵列基板120类似,不同之处在于,所述阵列基板120’的所述开关晶体管21’具有U形的有源层图案214’,可减小载流子从源极图案212迁移至漏极图案213时对漏极图案213的冲击。具体的,图5为了显示数据线26下方的结构,因此采用虚线的形式绘制数据线26。漏极图案213则是因为位于像素电极221的下方,所以采用虚线的形式绘制。
如图6所示,于本申请一实施例中,显示面板110’为有机发光显示面板。所述显示面板110’还包括像素定义层150。所述像素定义层150中包括多个发光功能层13。所述发光功能层13上方设有公共电极层14。
本发明的技术效果在于,提供一种显示面板及显示装置,通过在显示区和栅极驱动区之间对应扫描线位置增加静电释放器件,其中所述静电释放器件的第一极板由所述扫描线的一部分构成,第二极板由所述有源层于所述第一极板下方图形化形成,第三极板由位于所述第二极板下方图形化的遮光层形成,利用静电释放器件存储静电电荷,诱导在栅极驱动区附近处静电释放,防止在开关晶体管的栅极层和有源层之间出现静电释放产生金属颗粒,导致栅极层和有源层短路,保护显示区内的晶体管器件,提升制作良率。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。
Claims (10)
1.一种显示面板,其特征在于,所述显示面板包括阵列基板,所述阵列基板包括:
衬底基板;
有源层,设于所述衬底基板上;
栅极绝缘层,覆盖所述有源层;以及
栅极层,设于所述栅极绝缘层上,其中,所述显示面板定义有显示区和环绕所述显示区设置的非显示区,所述阵列基板还包括:
多个像素,设置于所述显示区;
多个栅极驱动单元,设置所述非显示区;
多条扫描线,电连接于所述栅极驱动单元并延伸至所述显示区的所述多个像素;以及
多个静电释放器件,设于所述显示区和所述栅极驱动单元之间对应所述扫描线位置,所述静电释放器件包括相对设置的第一极板和第二极板,其中,所述扫描线的一部分构成所述第一极板,所述有源层于所述第一极板下方图形化形成所述第二极板。
2.根据权利要求1所述的显示面板,其特征在于,每个所述像素包括开关晶体管,每个所述开关晶体管包括依次层迭的有源层图案、所述栅极绝缘层以及栅极图案,所述有源层图案为所述有源层于所述栅极图案下方图形化形成且与所述第二极板彼此电绝缘。
3.根据权利要求2所述的显示面板,其特征在于,所述静电释放器件还包括第三极板,所述第三极板相对所述第二极板设置,所述阵列基板还包括:
遮光层,设于所述衬底基板上;以及
缓冲层,设于所述衬底基板上且完全覆盖所述遮光层,其中,所述有源层设于所述缓冲层上,所述遮光层于所述第二极板下方图形化形成所述第三极板。
4.根据权利要求3所述的显示面板,其特征在于,每个所述开关晶体管还包括遮光层图案设置于所述缓冲层与所述衬底基板之间,所述遮光层图案为所述遮光层于所述有源层图案下方图形化形成且与所述第三极板彼此电绝缘。
5.根据权利要求3所述的显示面板,其特征在于,所述栅极绝缘层或所述缓冲层的材质包括SiNx或SiOx中的一种或其组合。
6.根据权利要求3所述的显示面板,其特征在于,所述栅极层图形化形成所述扫描线,所述扫描线的一部分构成所述栅极图案。
7.根据权利要求1所述的显示面板,其特征在于,形成所述第二极板的所述有源层经导体化处理。
8.根据权利要求3所述的显示面板,其特征在于,每一条所述扫描线贯穿所述显示区,每一条所述扫描线的两端分别电连接一个所述栅极驱动单元,且每一条所述扫描线的所述两端的所述栅极驱动单元和所述显示区之间分别对应设置一个所述静电释放器件。
9.根据权利要求3所述的显示面板,其特征在于,所述显示面板还包括彩膜基板与液晶层,所述彩膜基板与所述阵列基板相对设置,所述液晶层设置于所述彩膜基板与所述阵列基板之间。
10.一种显示装置,包括如权利要求1-9中任一项所述的显示面板。
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