CN113097173A - 半导体封装及其制造方法 - Google Patents

半导体封装及其制造方法 Download PDF

Info

Publication number
CN113097173A
CN113097173A CN202110361488.0A CN202110361488A CN113097173A CN 113097173 A CN113097173 A CN 113097173A CN 202110361488 A CN202110361488 A CN 202110361488A CN 113097173 A CN113097173 A CN 113097173A
Authority
CN
China
Prior art keywords
substrate
semiconductor package
semiconductor
package
bonded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110361488.0A
Other languages
English (en)
Inventor
崔伦华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JMJ Korea Co Ltd
Original Assignee
Jmj Korea Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jmj Korea Co ltd filed Critical Jmj Korea Co ltd
Publication of CN113097173A publication Critical patent/CN113097173A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/10—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating making use of vibrations, e.g. ultrasonic welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/42—Printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29113—Bismuth [Bi] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29116—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/40175—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247—Connecting the strap to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/48175—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73263—Layer and strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83455—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84399—Material
    • H01L2224/844—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/84401—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/84411—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84399—Material
    • H01L2224/844—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/84417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/84424—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84399—Material
    • H01L2224/844—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/84438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/84447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84399—Material
    • H01L2224/844—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/84438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/84455—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85401—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/85411—Tin (Sn) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/85424—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85447—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85455—Nickel (Ni) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H01L23/4952—Additional leads the additional leads being a bump or a wire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/183—Connection portion, e.g. seal
    • H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part

Abstract

本发明包括：延伸形成有一个以上的第1基板端子(111)的一个以上的第1基板(110)；在第1基板(110)上面通过超音波熔接粘接的一个以上的第2基板(120)；在第2基板(120)上面粘接的一个以上的半导体芯片(130)；覆盖将一个以上的半导体芯片(130)和第2基板(120)的超音波熔接的区域的封装外壳(140)；及与第1基板(110)分离形成,通过电信号线(151)与一个以上的半导体芯片(130)电性连接且一个以上向封装外壳(140)外部裸露的端子(150)，在封装外壳(140)内部形成的端子(150)的厚度与第1基板(110)的厚度相同或更小，在第2基板(120)的上面表面形成有一个以上的压印槽(122)。

Description

半导体封装及其制造方法
技术领域
本发明涉及一种第1基板和第2基板由可进行超音波熔接的材质形成，而相互粘接使其轻量化，从而，将其适用于电车时能够减少电池消耗量，并节省材质费用的半导体封装及其制造方法。
背景技术
一般而言，封装型电力半导体装置因在驱动中发散的电力形成所需以上的高温环境，因此，重要的一点是释放热量使其以既定水准冷却而将热阻抗最小化。
并且，作为与其有关的先行技术，公开了韩国登录专利公报第 0685253号，以往的封装型电力半导体装置如图1所示，功率半导体裸晶26直接被焊接在铜键合(DBC)基板28，并且，DBC基板28包括裸晶侧第1铜层30、陶瓷层32及后方侧第2铜层34，密封层36形成于在电力半导体裸晶26、DBC基板28及第1铜层30上焊接的40装置导线38的上部。
但，作为引线框架的引线的导线38和裸晶侧铜层30被焊接结合，因高温环境发生变形时，可使得结构性结合强度下降，并且，作为热扩散层的裸晶侧铜层30和陶瓷层32和后方侧铜层34被引入至密封层 36的内侧模塑，因此，放热效果有限，并且，因热扩散层的温度特性而发生变化时，向电力半导体裸晶26施加压力，而存在半导体芯片的信赖性降低的可能性。
并且，以往为了提高半导体的热效率，使用较厚的铜材质将半导体芯片粘接并放热，但，因铜材质的价格和根据厚度的重量，使得半导体封装自身的重量增加，从而，将其适用于电车时，存在电池消耗量增加的问题。
因此，需要一种将半导体芯片的发热有效地向封装外壳外部释放冷却，最小化半导体封装的变形，并且，减少半导体封装的重量且降低制造成本的技术。
【先行技术文献】
【专利文献】
(专利文献0001)韩国登录专利公报第0685253号(封装型电力半导体装置,2007.02.22)
(专利文献0002)韩国公开专利公报第2001-0111736号(具有在引线框架的背面直接附着的绝缘散热板的电力模块封装,2011.02.20)
(专利文献0003)韩国登录专利公报第10-1682067号(利用超音波熔接的散热块及引线框架粘接型半导体封装,2016.12.02)
发明内容
发明要解决的技术问题
本发明的思想要解决的技术问题是提供一种第1基板和第2基板由可进行超音波熔接的材质形成，将其相互粘接形成轻量化，而适用于电车时，能够减少电池消耗量且节省材质费用的半导体封装及其制造方法。
解决问题的技术方案
为了实现上述目的，本发明的一实施例提供一种半导体封装，包括：一个以上的第1基板，其延伸形成有一个以上的第1基板端子；一个以上的第2基板，其在所述第1基板上面上通过超音波熔接粘接；一个以上的半导体芯片，其在所述第2基板上面粘接；封装外壳，其将一个以上的所述半导体芯片和所述第2基板的超音波熔接的区域覆盖；及端子，其与所述第1基板分离形成，通过电信号线与一个以上的所述半导体芯片电性连接，并且，一个以上向所述封装外壳外部裸露，并且，在所述封装外壳内部形成的所述端子的厚度与所述第1基板的厚度相同或更小，在所述第2基板的上面表面形成有一个以上的压印槽。
并且，本发明的另一实施例提供一种半导体封装，包括：一个以上的第1基板；一个以上的第2基板，其在所述第1基板上面通过超音波熔接粘接，延伸形成有第2基板端子；一个以上的半导体芯片，其在所述第1基板或所述第2基板上面粘接；封装外壳，其将一个以上的所述半导体芯片和所述第2基板的超音波熔接的区域覆盖；及端子，其与所述第1基板分离形成，通过电信号线与一个以上的所述半导体芯片电性连接，并且，一个以上向所述封装外壳外部裸露，并且，在所述封装外壳内部形成的所述端子的厚度与所述第1基板的厚度相同或更小，在所述第2基板的上面表面形成有一个以上的压印槽。
在此，所述第1基板或所述第2基板包括导电金属。
并且，所述导电金属由以不同的金属或合金金属层积两层以上的结构形成。
并且，所述第1基板或所述第2基板包括一层以上层积形成的绝缘层。
并且，所述第1基板、所述第1基板端子，或所述第1基板及所述第1基板端子由Al单一材质形成,或由含Al成分50％以上的合金材质形成。
并且，所述第2基板、所述第2基板端子,或所述第2基板及所述第 2基板端子由Cu单一材质形成,或由含Cu成分50％以上的合金材质形成。
并且，一个以上的所述端子由Al或Cu单一材质形成,或由含Al成分或Cu成分50％以上的合金材质形成。
并且，所述第1基板、所述第2基板、所述第1基板及所述第2基板、所述第1基板端子、所述第2基板端子、或一个以上的所述端子在一面以上形成有涂覆层,所述涂覆层由单一层形成，或由相同金属或不同的金属的两层以上层积形成。
并且，所述涂覆层由Ni单一材质的单一层形成，或由含Ni成分70％以上的合金材质的一层以上层积形成的Ni涂覆层形成，并且，所述Ni 涂覆层的厚度为0.1μm至10μm。
并且，一个以上的所述端子的最外廓涂覆层可包含Sn。
并且，所述半导体芯片在所述第2基板上面介入粘接导电粘接剂而被粘合。
并且，所述导电粘接剂在所述第2基板的表面的压印槽的至少一部分涂覆。
并且，所述导电粘接剂为包含Sn,Pb及Bi成分中某一个以上的焊料系列,或包含Ag及Cu成分中某一个以上的烧结材质。
并且，所述电信号线为金属线形态，或金属成分的金属夹。
并且，一个以上的所述端子在所述第1基板上面以既定距离分隔排列。
并且，一个以上的所述端子与所述第1基板上面重叠且物理性地分离形成。
并且，所述第1基板和所述第2基板由以相互不同的成分构成的导电金属形成。
并且，所述第1基板、所述第1基板端子及所述端子由Al单一材质形成,或含Al成分50％以上的合金材质形成。
并且，所述第2基板由Al单一材质形成,或由含Al成分50％以上的合金材质形成。
并且，所述第1基板的面积大于所述第2基板的面积。
并且，所述第1基板的厚度大于所述第2基板的厚度。
并且，所述第1基板的下面的一部分或全部向所述封装外壳的底面裸露。
并且，在所述第1基板上未粘接所述第2基板或所述半导体芯片的区域形成有用于与散热设备结合的贯通孔。
并且，所述第1基板或所述第2基板的厚度与除了所述涂覆层之外的所述端子的厚度相同。
并且，所述压印槽的深度小于100μm。
并且，所述压印槽形成V字、U字或多角形的截面结构。
并且，所述压印槽由格子、点或线形态形成。
并且，在一个以上的所述压印槽周边形成有一个以上的毛边，所述毛边不超过100μm。
并且，本发明提供一种制造上述的半导体封装的半导体封装制造方法。
发明的效果
根据本发明，将分离的第1基板和第2基板由可进行超音波熔接的材质形成，将其相互粘接形成轻量化而适用于电车时，能够减少电池消耗量且节省材质费用，并且，可将半导体芯片选择性地安装在第1 基板或第2基板上，使得向封装外壳外部裸露的基板的大小和厚度相对较大且较厚，从而，提高放热效果，并且，借助于压印槽和毛边提高与半导体芯片的粘接强度。
附图说明
图1示例以往技术的利用超音波熔接的散热块及引线框架粘接型半导体封装；
图2分别图示根据本发明的一实施例的半导体封装的立体图；
图3分别图示图2的半导体封装的分解立体图；
图4图示图2的半导体封装的侧面图；
图5分别图示根据本发明的另一实施例的半导体封装的第1例的立体图；
图6分别图示图5的半导体封装的分解立体图；
图7图示图5的半导体封装的侧面图；
图8分别图示根据本发明的另一实施例的半导体封装的第2例的立体图；
图9分别图示图8的半导体封装的分解立体图；
图10图示图8的半导体封装的侧面图；
图11分别图示根据本发明的另一实施例的半导体封装的第3例的立体图；
图12分别图示图11的半导体封装的分解立体图；
图13图示图11的半导体封装的侧面图；
图14分别图示根据本发明的另一实施例的半导体封装的第4例的立体图；
图15分别图示图14的半导体封装的分解立体图；
图16图示图15的半导体封装的侧面图；
图17分别图示根据本发明的实施例的半导体封装的压印槽；
图18示例在图17的压印槽形成的毛边。
附图标记说明
110:第1基板 111:第1基板端子
120:第2基板 121:导电粘接剂
122:压印槽 123:毛边
124:第2基板端子 130:半导体芯片
140:封装外壳 150:端子
151:电信号线 160:贯通孔
具体实施方式
以下，参照附图详细说明本发明的实施例，以便本发明的所述技术领域的普通技术人员容易实施。本发明可以各种不同的形态实施，并非限定于如下此说明的实施例。
参照图2至图4，根据本发明的一实施例的半导体封装，整体上包括：延伸形成有一个以上的第1基板端子111的一个以上的第1基板110；在第1基板110上面通过超音波熔接粘接的一个以上的第2基板120；在第2基板120上面粘接的一个以上的半导体芯片130；覆盖将一个以上的半导体芯片130和第2基板120的超音波熔接的区域的封装外壳140；及与第1基板110分离形成,通过电信号线151与一个以上的半导体芯片130电性连接，并且，一个以上向封装外壳140外部裸露的端子150，并且，本发明的要旨为：在封装外壳140内部形成的端子150的厚度与第1基板110的厚度相同或更小，在第2基板120的上面表面形成有一个以上的压印槽122，将分离的第1基板110和第2基板120由可进行超音波熔接的材质形成而粘接使其轻量化，并且，使得第1基板110的大小较大地形成而提高散热效果，借助于压印槽122提高与半导体芯片130 粘接力。
首先，第1基板110形成一个以上,在第1基板110的一端延伸形成有一个以上的第1基板端子111，并且，可与第1基板110的上面相同的高度延伸，或如图4的(b)所示，从第1基板110的上面向上方倾斜弯曲而延伸。
如图2所示,第1基板端子111的一端向封装外壳140外部裸露，而与外部端子电性连接。
在此，第1基板110、第1基板端子111、或第1基板110和第1基板端子111都由Al单一材质形成，或由含Al成分50％以上的合金材质形成，并且，在第1基板110的上面通过超音波熔接粘接含有Cu材质的第2基板120，从而，能够代替以往的由铜材质形成的第1基板110或第1基板端子111而使其轻量化，并节省材质费用。
然后，第2基板120形成一个以上，在第1基板110上面通过超音波熔接粘接。
作为参考，超音波熔接(ultrasonic welding)是对于Al或铜箔的熔接适宜的方式，其通过超音波熔接机的高频振动能源生成的摩擦热相互加压粘接，从而，能够最小化粘接部的变形，省略表面处理的后处理工艺，而提高生产性。
并且，上述的第1基板110或第2基板120可包括导电金属，导电金属可由不同的金属或不同的合成金属形成层积两层以上的结构。
并且，第1基板110或第2基板120可包括层积形成一层以上的绝缘层。
例如，第2基板120可由Cu单一材质形成，或由含Cu成分50％以上的合金材质形成。
并且，第1基板110和第2基板120也可由以相互不同的成分构成的导电金属形成。
并且，第1基板110的面积可大于第2基板120的面积，或第1基板 110的厚度大于第2基板120的厚度，并且，如图2的(c)所示,第1基板 110的下面一部分或全部向封装外壳140的底面裸露，从而，能够有效地将半导体芯片130的发热向封装外壳140外部发散。
并且，如图3的(a)所示,在第1基板110上未粘接第2基板120或半导体芯片130的区域可形成有用于与散热设备(未图示)结合的贯通孔 160，其与封装外壳140连通形成。
然后，半导体芯片130形成一个以上，而在第2基板120上面粘接，参照图17的(c)，半导体芯片130可在第2基板120上面介入导电粘接剂 121而粘接结合。
并且，在第2基板120的上面表面形成有一个以上的压印槽122，在第2基板120的表面的压印槽122的至少一部分涂布导电粘接剂121，从而，能够提高第2基板120与半导体芯片130之间的粘接强度。
在此，导电粘接剂121为含有Sn,Pb及Bi成分中的至少一个以上的适用于焊接的焊料系列，或含有Ag及Cu成分中某一个以上的适用于烧结的烧结材质。
并且，在第2基板120可通过超音波熔接形成深度小于100μm的压印槽122,并且，如图17及图18所示，压印槽122可形成各种形状，例如，形成V字(图18的(a)),U字(图17的(c))或多角形的截面结构，从而，能够最大化压印槽122的表面积，而提高与导电粘接剂121的粘接强度。
或者，如图17的(a)所示，压印槽122由格子纹形成，或如图17 的(b)所示，以点形态排列形成或以各种线形态形成，从而，将压印槽122的表面积最大化，而提高与导电粘接剂121的粘接强度。
并且，在第2基板120通过超音波熔接形成压印槽122时,必然发生毛边(burr)123，如图18的(b)所示,在一个以上的压印槽122周边可形成有一个以上的毛边123,毛边123的高度可形成得不超过100μm。
作为参考，半导体芯片130可适用硅控整流器(SCR)、电力晶体管、绝缘栅双极晶体管(IGBT)、金属氧化物半导体场效应晶体管 (MOSFET)、电力整流器、电力调节器、或其组合体的电力半导体。
然后，封装外壳140覆盖一个以上的半导体芯片130及第1基板110 第2基板120的超音波熔接的区域，并且，作为半导体电路保护用绝缘 体，可由EMC(Epoxy MoldingCompound),PPS(Poly Phenylene Sulfide) 或PBT(Poly Butylene Terephtalate)材质形成封装外壳140。
然后，端子150与第1基板110物理性地分离形成，通过电信号线 151与一个以上的半导体芯片130电性连接，并使得一个以上向封装外壳140外部裸露，而与外部端子电性连接。
并且，如图3的(c)及图4的(c)所示，一个以上的端子150在第1 基板110上面分隔既定距离排列而物理性地分离。
并且，如图3所示,电信号线151为金属线形态，或金属成分的金属夹。
并且，上述的第1基板110、第1基板端子111及端子150可由A单一材质形成,或由含Al成分50％以上的合金材质形成。
并且，如图4的(c)及(e)所示,在封装外壳140内部形成的端子150 的厚度d1小于第1基板110的厚度d2(c)，或与第1基板110的厚度d2相同地形成(e)。
并且，如图4的(c)所示，第2基板120的厚度d3可与除涂覆层之外的端子150的厚度d1相同,或如图4的(e)所示，第1基板110的厚度d2 与除涂覆层之外的端子150的厚度d1相同。
或者,一个以上的端子150由Al或Cu单一材质形成,或由含Al成分或Cu成分50％以上的合金材质形成。
并且，第1基板110、第2基板120、第1基板110及第2基板120、第 1基板端子111、第2基板端子124、或一个以上的端子150在一面以上分别形成涂覆层，在此，涂覆层形成单一层，或以相同金属或不同的金属的两层以上层积形成。
并且，涂覆层形成Ni单一材质的单一层，或也可形成含Ni成分70％以上的合金材质的一层以上层积形成的Ni涂覆层,在此，Ni涂覆层的厚度可为0.1μm至10μm。
并且，一个以上的端子150的最外廓涂覆层可含有Sn。
从而，根据本发明的一实施例的半导体封装，代替高价的铜材质的基板,将分离的第1基板和第2基板由可进行超音波熔接的材质构成，将其相互粘接使其轻量化，由此，适用于电车时能够减少电池消耗量、节省材质费用，并且，将半导体芯片安装在第2基板上，使得向封装外壳外部裸露的基板的大小及厚度相对地较大较厚而提高散热效果，并借助于压印槽和毛边提高与半导体芯片的粘接强度。
参照图5至图16,本发明的另一实施例的半导体封装的要旨为，整体上包括：一个以上的第1基板110；在第1基板110上面通过超音波熔接粘接，并延伸形成第2基板端子124的一个以上的第2基板120；在第 1基板110或第2基板120上面粘接的一个以上的半导体芯片130；覆盖一个以上的半导体芯片130和第2基板120的被超音波熔接的区域的封装外壳140；与及第1基板110分离而形成，并通过电信号线151与一个以上的半导体芯片130电性连接，并且，一个以上向封装外壳140外部裸露的端子150，并且，在封装外壳140内部形成的端子150的厚度与第1基板110的厚度相同或更小，在第2基板120的上面表面形成有一个以上的压印槽122，而将分离的第1基板110和第2基板120由可进行超音波熔接的材质构成将其粘接使得轻量化，并且，将第1基板110的大小较大地形成而提高散热效果，借助于压印槽122提高与半导体芯片 130的粘接力。
首先,第1基板110形成一个以上,第1基板110由Al单一材质形成, 或由含Al成分50％以上的合金材质形成,并且，在第1基板110的上面通过超音波熔接粘接第2基板120,从而，代替以往的由铜材质形成的第1 基板110而使其轻量化，并节省材质费用。
然后第2基板120形成一个以上,在第1基板110上面通过超音波熔接粘接。
并且，上述的第1基板110或第2基板120可包含导电金属,导电金属可形成以相互不同的金属或不同的合金金属层积两层以上的结构。
并且，第1基板110或第2基板120可包括一层以上层积形成的绝缘层。
例如，第2基板120由Cu单一材质形成，或由含Cu成分50％以上的合金材质形成。
即，如图6的第1例及图9的第2例所示,在含有Al成分的第1基板 110上面通过超音波熔接粘接第2基板120,并且，在第1基板110上面安装半导体芯片130，使其不与第2基板120重叠。
或者,如图12的第3例及图15的第4例，在含Al成分的第1基板110 上面通过超音波熔接粘接第2基板120,并在第2基板120上面安装半导体芯片130。
并且，第1基板110和第2基板120也可由以相互不同的成分形成的导电金属形成。
并且，第1基板110的面积大于第2基板120的面积，或第1基板110 的厚度大于第2基板120的厚度,并且，如图5、图8、图11、图14的(c) 所示,使得第1基板110的下面一部分或全部向封装外壳140的底面裸露，从而，将半导体芯片130的发热有效地向封装外壳140外部发散。
并且，如图6、图9、图12、图15的(a)所示，在第1基板110上未粘接第2基板120或半导体芯片130的区域与封装外壳140连通形成用于与散热设备(未图示)结合的贯通孔160。
然后，半导体芯片130形成一个以上,如如图6和图9的(b)所示，与第1基板110上面粘接,或如图12及图15的(b)所示,在第2基板120上面粘接。
并且，参照图17的(c),半导体芯片130也可在第2基板120上面介入粘合导电粘接剂121粘接。
并且，在安装半导体芯片130的第2基板120的上面表面形成有一个以上的压印槽122,导电粘接剂121在第2基板120的表面的压印槽 122的至少一部分涂覆，从而，提高第2基板120与半导体芯片130之间的粘接强度。
在此，导电粘接剂121可为含有Sn,Pb及Bi成分中某一个以上的焊料系列,含有Ag及Cu成分中某一个以上的烧结材质。
并且，在第2基板120通过超音波熔接形成深度小于100μm的压印槽122,并且，如图17及图18所示,压印槽122可形成各种形状，例如，形成V字(图18的(a))、U字(图17的(c))或多角形的截面结构,使得压印槽122的表面积最大化，而提高与导电粘接剂121的粘接强度。
或者,如图17的(a)所示，压印槽122形成格子纹,或如图17的(b) 所示，以点形状排列形成，或以各种线形状形成，而使得压印槽122 的表面积最大化，提高与导电粘接剂121的粘接强度。
并且，在第2基板120通过超音波熔接形成压印槽122时必然发生毛边123,如图18的(b)所示,在一个以上的压印槽122周边可形成一个以上的毛边123,毛边123的高度不超过100μm。
然后，封装外壳140覆盖一个以上的半导体芯片130及第1基板110 和第2基板120的超音波熔接的区域,并且，作为半导体线路保护用绝缘体，由EMC、PPS或PBT材质形成封装外壳140。
然后，一个以上的端子150与第1基板110物理性地分离形成，如图6及图12的(c)所示，与第1基板110的上面不重叠形成，或如图9及图15的(c)所示,与第1基板110的上面重叠(overlap)且物理性地分离 (分隔)形成,并且，通过电信号线151与一个以上的半导体芯片130电性连接，并使得一个以上向封装外壳140外部裸露形成，而与外部端子电性连接。
并且，电信号线151为金属线形状，或金属成分的金属夹。
并且，上述的第1基板110由Al单一材质形成,或含Al成分50％以上的合金材质形成。
并且，虽未图示，如图4的(c)及(e)所示相同地适用，在封装外壳140内部形成的端子150的厚度d1小于第1基板110的厚度d2(c)，或与第1基板110的厚度d2相同地形成(e)。
并且，虽未图示，如图4的(c)所示相同地适用，第2基板120的厚度d3与除了涂覆层之外的端子150的厚度d1相同，或如图4的(e)所示相同地适用，第1基板110的厚度d2与除了涂覆层之外的端子150的厚度d1相同。
在此，如同上述，第2基板120、第2基板端子124、或第2基板120 及第2基板端子124由Cu单一材质形成,或由含Cu成分50％以上的合金材质形成。
或者,一个以上的端子150由Al或Cu单一材质形成，或由含Al成分或Cu成分50％以上的合金材质形成。
并且，第1基板110、第2基板120、第1基板110及第2基板120、第 2基板端子124、或一个以上的端子150在一面以上分别形成涂覆层, 在此，涂覆层由单一层形成，或以相同金属或不同的金属的两层以上层积形成。
并且，涂覆层形成Ni单一材质的单一层，或以含Ni成分70％以上的合金材质的一层以上层积形成的Ni涂覆层,在此，Ni涂覆层的厚度可为0.1μm至10μm。
并且，一个以上的端子150的最外廓涂覆层含有Sn。
由此，本发明的另一实施例的半导体封装，代替高价的铜材质的基板，将分离的第1基板和第2基板由可进行超音波熔接的材质构成，相互粘接使其轻量化，从而，适用于电车时能够减少电池消耗量且节省材质费用，并且，将半导体芯片选择性地安装在第1基板或第2基板上，使得向封装外壳外部裸露的基板的大小及厚度相对地较大较厚，而提高散热效果，并且，借助于压印槽和毛边提高与半导体芯片的粘接强度。
以上,参照附图中图示的实施例说明了本发明。但，本发明并非限定于此，本发明的技术领域的普通技术人员可在与本发明均等的范围内进行各种变形例或另一实施例。因此，本发明的真正的保护范围根据权利要求书而定义。

Claims (20)

1.一种半导体封装，其特征在于，包括：
一个以上的第1基板，其延伸形成有一个以上的第1基板端子；
一个以上的第2基板，其在所述第1基板上面上通过超音波熔接粘接；
一个以上的半导体芯片，其在所述第2基板上面粘接；
封装外壳，其将一个以上的所述半导体芯片和所述第2基板的超音波熔接的区域覆盖；及
端子，其与所述第1基板分离形成，通过电信号线与一个以上的所述半导体芯片电性连接，并且，一个以上向所述封装外壳外部裸露，
并且，在所述封装外壳内部形成的所述端子的厚度与所述第1基板的厚度相同或更小，在所述第2基板的上面表面形成有一个以上的压印槽。
2.一种半导体封装，其特征在于，包括：
一个以上的第1基板；
一个以上的第2基板，其在所述第1基板上面通过超音波熔接粘接，延伸形成有第2基板端子；
一个以上的半导体芯片，其在所述第1基板或所述第2基板上面粘接；
封装外壳，其将一个以上的所述半导体芯片和所述第2基板的超音波熔接的区域覆盖；及
端子，其与所述第1基板分离形成，通过电信号线与一个以上的所述半导体芯片电性连接，并且，一个以上向所述封装外壳外部裸露，
并且，在所述封装外壳内部形成的所述端子的厚度与所述第1基板的厚度相同或更小，在所述第2基板的上面表面形成有一个以上的压印槽。
3.根据权利要求1所述的半导体封装，其特征在于，
所述第1基板或所述第2基板包括导电金属，或包括一层以上层积形成的绝缘层。
4.根据权利要求2所述的半导体封装，其特征在于，
所述第1基板或所述第2基板包括导电金属，或包括一层以上层积形成的绝缘层。
5.根据权利要求1所述的半导体封装，其特征在于，
所述第1基板、所述第2基板、所述第1基板及所述第2基板、所述第1基板端子、或一个以上的所述端子在一面以上形成有涂覆层。
6.根据权利要求2所述的半导体封装，其特征在于，
所述第1基板、所述第2基板、所述第1基板及所述第2基板、所述第2基板端子、或一个以上的所述端子在一面以上形成有涂覆层。
7.根据权利要求1所述的半导体封装，其特征在于，
所述半导体芯片在所述第1基板或所述第2基板上面介入粘接导电粘接剂而被粘合。
8.根据权利要求7所述的半导体封装，其特征在于，
所述导电粘接剂在所述第2基板的表面的压印槽的至少一部分涂覆。
9.根据权利要求2所述的半导体封装，其特征在于，
所述半导体芯片在所述第1基板或所述第2基板上面介入粘接导电粘接剂而被粘合。
10.根据权利要求9所述的半导体封装，其特征在于，
所述导电粘接剂在所述第2基板的表面的压印槽的至少一部分涂覆。
11.根据权利要求1所述的半导体封装，其特征在于，
一个以上的所述端子在所述第1基板上面以既定距离分隔而排列。
12.根据权利要求2所述的半导体封装，其特征在于，
一个以上的所述端子在所述第1基板上面以既定距离分隔而排列。
13.根据权利要求1所述的半导体封装，其特征在于，
所述第1基板的面积大于所述第2基板的面积，或所述第1基板的厚度大于所述第2基板的厚度。
14.根据权利要求2所述的半导体封装，其特征在于，
所述第1基板的面积大于所述第2基板的面积，或所述第1基板的厚度大于所述第2基板的厚度。
15.根据权利要求1所述的半导体封装，其特征在于，
在所述第1基板上的未粘接所述第2基板或所述半导体芯片的区域形成有用于与散热设备结合的贯通孔。
16.根据权利要求所2述的半导体封装，其特征在于，
在所述第1基板上的未粘接所述第2基板或所述半导体芯片的区域形成有用于与散热设备结合的贯通孔。
17.根据权利要求1所述的半导体封装，其特征在于，
所述压印槽形成V字、U字或多角形的截面结构,或由格子、点或线形态形成。
18.根据权利要求所2述的半导体封装，其特征在于，
所述压印槽形成V字、U字或多角形的截面结构,或由格子、点或线形态形成。
19.根据权利要求1所述的半导体封装，其特征在于，
在一个以上的所述压印槽周边形成有一个以上的毛边(burr)。
20.根据权利要求所2述的半导体封装，其特征在于，
在一个以上的所述压印槽周边形成有一个以上的毛边(burr)。
CN202110361488.0A 2020-05-21 2021-04-02 半导体封装及其制造方法 Pending CN113097173A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020200060997A KR102228945B1 (ko) 2020-05-21 2020-05-21 반도체 패키지 및 이의 제조방법
KR10-2020-0060997 2020-05-21

Publications (1)

Publication Number Publication Date
CN113097173A true CN113097173A (zh) 2021-07-09

Family

ID=75243513

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110361488.0A Pending CN113097173A (zh) 2020-05-21 2021-04-02 半导体封装及其制造方法

Country Status (3)

Country Link
US (1) US11417577B2 (zh)
KR (1) KR102228945B1 (zh)
CN (1) CN113097173A (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102228945B1 (ko) 2020-05-21 2021-03-17 제엠제코(주) 반도체 패키지 및 이의 제조방법
KR102405129B1 (ko) * 2021-05-21 2022-06-07 제엠제코(주) 히트싱크 노출형 반도체 패키지 및 이의 제조방법
CN117038612A (zh) * 2023-10-09 2023-11-10 烟台台芯电子科技有限公司 一种功率器件的封装结构

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6404065B1 (en) 1998-07-31 2002-06-11 I-Xys Corporation Electrically isolated power semiconductor package
KR100370231B1 (ko) 2000-06-13 2003-01-29 페어차일드코리아반도체 주식회사 리드프레임의 배면에 직접 부착되는 절연방열판을구비하는 전력 모듈 패키지
KR100528437B1 (ko) 2003-03-06 2005-11-15 엘에스전선 주식회사 반도체 모듈 공정에서의 초음파 용접을 이용한 탭접착방법
US7586179B2 (en) * 2007-10-09 2009-09-08 Fairchild Semiconductor Corporation Wireless semiconductor package for efficient heat dissipation
KR101113438B1 (ko) 2010-02-26 2012-02-29 부산대학교 산학협력단 반도체 칩의 실장 방법
KR101224799B1 (ko) * 2011-05-13 2013-01-21 서울과학기술대학교 산학협력단 플라즈마를 이용한 반도체 부품의 접합 방법
KR20130045596A (ko) * 2011-10-26 2013-05-06 삼성전기주식회사 전력 모듈 패키지 및 그 제조방법
KR101643332B1 (ko) * 2015-03-20 2016-07-27 제엠제코(주) 초음파 웰딩을 이용한 클립 본딩 반도체 칩 패키지 및 그 제조 방법
KR101682067B1 (ko) 2015-08-26 2016-12-02 제엠제코(주) 초음파 융착을 이용한 히트 슬러그 및 리드프레임 접합형 반도체 패키지
KR102016019B1 (ko) * 2018-01-11 2019-08-29 제엠제코(주) 고열전도성 반도체 패키지
KR102228945B1 (ko) 2020-05-21 2021-03-17 제엠제코(주) 반도체 패키지 및 이의 제조방법

Also Published As

Publication number Publication date
KR102228945B1 (ko) 2021-03-17
US20210366799A1 (en) 2021-11-25
US11417577B2 (en) 2022-08-16

Similar Documents

Publication Publication Date Title
KR101899788B1 (ko) 양면 방열구조를 갖는 반도체 패키지 및 그 제조 방법
US10297522B2 (en) Semiconductor package structure and manufacturing method thereof
KR102585450B1 (ko) 브레이징된 전기 전도성 층을 포함하는 칩 캐리어를 구비한 몰딩된 패키지
CN113097173A (zh) 半导体封装及其制造方法
CN110021590B (zh) 电源芯片集成模块、其制造方法及双面散热电源模块封装
US11056447B2 (en) Power module having at least one power semiconductor
JP3390661B2 (ja) パワーモジュール
KR20090052688A (ko) 전력 소자 패키지 및 그 제조 방법
US20120080799A1 (en) Semiconductor Module Comprising an Insert and Method for Producing a Semiconductor Module Comprising an Insert
KR20090085256A (ko) 반도체 패키지 및 그 제조방법들
US20090243079A1 (en) Semiconductor device package
KR102172689B1 (ko) 반도체 패키지 및 그 제조방법
JP2019071412A (ja) チップパッケージ
JP4784150B2 (ja) 半導体装置および、半導体装置の製造方法
KR101994727B1 (ko) 전력 모듈 패키지 및 그 제조방법
JP2013254810A (ja) 貫通端子付き金属基板およびそれを用いた表面実装デバイス
JP2013258354A (ja) モールドパッケージおよびその製造方法
US11705387B2 (en) Multi-layer interconnection ribbon
KR200483254Y1 (ko) 반도체 패키지
JP5898575B2 (ja) 半導体装置
CN216413085U (zh) 半导体电路
US11848257B2 (en) Bending semiconductor chip for connection at different vertical levels
CN218788371U (zh) 封装模组及电子设备
CN114050134A (zh) 半导体电路
CN114121845A (zh) 半导体封装

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination