CN112713760B - Parallel redundant ferrite switch driver - Google Patents
Parallel redundant ferrite switch driver Download PDFInfo
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- CN112713760B CN112713760B CN202011380683.XA CN202011380683A CN112713760B CN 112713760 B CN112713760 B CN 112713760B CN 202011380683 A CN202011380683 A CN 202011380683A CN 112713760 B CN112713760 B CN 112713760B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
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Abstract
One embodiment of the invention discloses a parallel redundant ferrite switch driver, which comprises: the circuit comprises a first driving circuit, a second driving circuit, a first resistor, a second resistor, a third resistor, a fourth resistor, a first fuse, a second fuse, a third fuse, a fourth fuse, a first diode, a second diode, a first triode and a second triode; according to the invention, by adding the parallel redundant drive design to the ferrite switch driver, when one of the parallel drive circuits fails, the other parallel drive circuit can continue to work without external intervention, so that the normal work of the ferrite switch is ensured, and the problem of integral failure of the ferrite switch caused by the failure of the traditional ferrite switch driver is solved.
Description
Technical Field
The invention relates to the technical field of ferrite switch drivers, in particular to a ferrite switch driver with parallel redundancy.
Background
The ferrite switch has the function of changing a microwave signal transmission channel, and is widely applied to the fields of ground, airborne and satellite radars at present. The ferrite switch is mainly composed of a microwave transmission line cavity, a ferrite material, a coil, a driver and the like, wherein the ferrite material and the coil are positioned in the microwave transmission line cavity, and the driver is positioned outside the microwave transmission line cavity. The driver is used as an important component of the ferrite switch, and has the main functions of receiving a superior switch switching control signal, alternately generating pulse current excitation on the double coils, changing the microwave characteristics of the ferrite material and further realizing the channel switching of microwave signals.
For application scenes that aircraft, satellite loads and the like are difficult or cannot be maintained, the reliability of a ferrite switch, especially a ferrite switch driver, needs to be improved as much as possible, and when a traditional ferrite switch driver fails in operation, the whole ferrite switch completely fails and loses electrical performance.
Disclosure of Invention
The invention aims to provide a parallel redundant ferrite switch driver to solve the problem of integral failure of a ferrite switch when the traditional ferrite switch driver fails in operation.
In order to achieve the purpose, the invention adopts the following technical scheme:
the invention provides a parallel redundant ferrite switch driver, comprising:
the circuit comprises a first driving circuit, a second driving circuit, a first resistor, a second resistor, a third resistor, a fourth resistor, a first fuse, a second fuse, a third fuse, a fourth fuse, a first diode, a second diode, a first triode and a second triode;
wherein the content of the first and second substances,
the first end of the first resistor receives a control signal, and the second end of the first resistor is connected with the base electrode of the first triode;
the first end of the second resistor is connected with a first power supply, and the second end of the second resistor is connected with the collector of the first triode and the first port of the first driving circuit;
the emitting electrode of the first triode is grounded;
the second port of the first driving circuit is connected with the first end of the first fuse, and the second end of the first fuse is connected with the cathode of the first diode;
the anode of the first diode is connected with the first end of a first coil in the ferrite switch load coil, and the second end of the first coil is connected with a second power supply;
the third port of the first driving circuit is connected with the first end of the second fuse, and the second end of the second fuse is connected with the cathode of the second diode;
the anode of the second diode is connected with the first end of a second coil in the ferrite switch load coil, and the second end of the second coil is connected with a second power supply;
the first end of the third resistor receives a control signal, and the second end of the third resistor is connected with the base electrode of the second triode;
the first end of the fourth resistor is connected with the first power supply, and the second end of the fourth resistor is connected with the collector of the second triode and the first port of the second drive circuit;
the emitter of the second triode is grounded;
a second port of the second driving circuit is connected with a first end of the third fuse, and a second end of the third fuse is connected with a negative electrode of the third diode;
the anode of the third diode is connected with the first end of the first coil in the ferrite switch load coil;
a third port of the second driving circuit is connected with a first end of the fourth fuse, and a second end of the fourth fuse is connected with a negative electrode of the fourth diode;
the anode of the fourth diode is connected with the first end of the second coil in the ferrite switch load coil.
In one embodiment, the first driving circuit includes:
the circuit comprises a first monostable trigger, a second monostable trigger, a first NOT gate, a first pre-amplification chip, a second pre-amplification chip, a first power field effect transistor and a second power field effect transistor;
wherein the content of the first and second substances,
the input end of the first monostable trigger, namely the first port of the first driving circuit, is connected with the second end of the second resistor, the output end of the first monostable trigger is connected with the input end of the first pre-amplification chip, and the output end of the first pre-amplification chip is connected with the grid electrode of the first power field effect transistor;
the drain electrode of the first power field effect transistor, namely the second port of the first driving circuit, is connected with the first end of the first fuse;
the source electrode of the first power field effect transistor is grounded;
the input end of the first NOT gate is connected with the second end of the second resistor, the output end of the first NOT gate is connected with the input end of the second monostable trigger, the output end of the second monostable trigger is connected with the input end of the second pre-amplification chip, and the output end of the second pre-amplification chip is connected with the grid electrode of the second power field effect transistor;
the drain electrode of the second power field effect transistor, namely the third port of the first driving circuit, is connected with the first end of the second fuse;
the source electrode of the second power field effect transistor is grounded.
In one embodiment, the second driving circuit includes:
the first monostable trigger, the second monostable trigger, the first NOT gate, the first pre-amplification chip, the second power field effect transistor and the second power field effect transistor are connected in series;
wherein the content of the first and second substances,
the input end of the third monostable trigger, namely the first port of the second driving circuit, is connected with the second end of the fourth resistor, the output end of the third monostable trigger is connected with the input end of the third pre-amplification chip, and the output end of the third pre-amplification chip is connected with the grid electrode of the third power field effect transistor;
the drain electrode of the third power field effect transistor, namely the second port of the second driving circuit, is connected with the first end of the third fuse;
the source electrode of the third power field effect transistor is grounded;
the input end of the second NOT gate is connected with the second end of the fourth resistor, the output end of the second NOT gate is connected with the input end of the fourth monostable trigger, the output end of the fourth monostable trigger is connected with the input end of the fourth pre-amplification chip, and the output end of the fourth pre-amplification chip is connected with the grid electrode of the fourth power field effect transistor;
the drain electrode of the fourth power field effect transistor, namely the third port of the second driving circuit, is connected with the first end of the fourth fuse;
and the source electrode of the fourth power field effect transistor is grounded.
In a specific embodiment, the first to fourth monostable flip-flops are triggered by the rising edge of the input signal, and the outputs are positive pulse logic signals.
In a specific embodiment, when a control signal received by the driver is switched from a high level to a low level, a base and an emitter of the first triode are changed from a current-on state to a current-off state, a collector of the first triode is switched from the low level to the high level, a rising edge signal is generated at an input end of the first monostable trigger, and the first monostable trigger is triggered to output a positive pulse logic signal to an input end of the first preamplification chip;
meanwhile, the base electrode and the emitting electrode of the second triode are also changed into a current cut-off state from current opening, the collector electrode of the second triode is converted from a low level to a high level, the input end of the third monostable trigger generates a rising edge signal, and the third monostable trigger is triggered to output a positive pulse logic signal to enter the input end of the third preamplification chip;
the first pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of the first power field effect transistor to enable the first power field effect transistor to be conducted;
the third pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a third power field effect transistor to enable the third power field effect transistor to be conducted;
the first power field effect transistor and the third power field effect transistor are connected in parallel and conducted simultaneously, and current generated by the second power supply sequentially passes through a first coil, a first diode, a first fuse and the first power field effect transistor in the ferrite switch load coil to form a first current loop;
the current generated by the second power supply sequentially passes through the first coil, the third diode, the third fuse and the third power field effect transistor in the ferrite switch load coil to the ground to form a second current loop;
the first current loop and the second current loop are in parallel relation with the first coil in the ferrite switch load coil, and current flowing through the first coil in the ferrite switch load coil drives the ferrite switch to be placed in a first microwave channel state.
In a specific embodiment, when a control signal received by the driver is converted from a low level to a high level, a base and an emitter of the first triode are changed from a current cut-off state to a current open state, a collector of the first triode is converted from the high level to the low level, after inversion of a first NOT gate, a rising edge signal is generated at an input end of the second monostable trigger, and the second monostable trigger is triggered to output a positive pulse logic signal to an input end of the second preamplification chip;
meanwhile, the base electrode and the emitting electrode of the second triode are changed into a current opening state from a current cut-off state, the collector electrode of the second triode is converted into a low level from a high level, after the reverse direction of the second NOT gate, the input end of the fourth monostable trigger generates a rising edge signal, and the fourth monostable trigger is triggered to output a positive pulse logic signal to enter the input end of the fourth preamplification chip;
the second pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a second power field effect transistor to enable the second power field effect transistor to be conducted;
the fourth pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a fourth power field effect transistor to enable the fourth power field effect transistor to be conducted;
the second power field effect transistor and the fourth power field effect transistor are connected in parallel and conducted simultaneously, and current generated by the second power supply sequentially passes through a second coil, a second diode, a second fuse and the second power field effect transistor in the ferrite switch load coil to form a third current loop;
the current generated by the second power supply sequentially passes through a second coil, a fourth diode, a fourth fuse and a fourth power field effect transistor in the ferrite switch load coil to form a fourth current loop;
the third current loop and the fourth current loop are in parallel relation with the second coil in the ferrite switch load coil, and current flowing through the second coil in the ferrite switch load coil drives the ferrite switch to be placed in a second microwave channel state.
In a specific embodiment, when the control signal received by the driver maintains a high level or a low level, all the monostable flip-flops are not triggered, the outputs of the monostable flip-flops are all low levels, the outputs of all the pre-amplification chips are all low levels, the gates of all the power field effect transistors are all low levels, and all the power field effect transistors are all in an off state, so that no current flows through the first coil and the second coil in the ferrite switch load coil, and the ferrite switch maintains the current microwave channel unchanged.
In one embodiment, when the first driving circuit fails, the second driving circuit can continue to normally drive the ferrite switch load coil;
when the second driving circuit fails, the first driver circuit can continue to normally drive the ferrite switch load coil.
In a specific embodiment, the first to fourth fuses and the first to fourth diodes ensure that when any one of the first driving circuit and the second driving circuit fails, the other driving circuit is not affected.
The invention has the following beneficial effects:
according to the invention, by adding the parallel redundant drive design to the ferrite switch driver, when one of the parallel drive circuits fails, the other parallel drive circuit can continue to work without external intervention, so that the normal work of the ferrite switch is ensured, and the problem of integral failure of the ferrite switch caused by the failure of the traditional ferrite switch driver is solved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are one embodiment of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 shows a schematic diagram of a parallel redundant ferrite switch driver according to an embodiment of the present invention.
Fig. 2 shows a schematic diagram of a first driving circuit in a parallel redundant ferrite switch driver according to an embodiment of the present invention.
Fig. 3 shows a schematic diagram of a second driving circuit in a parallel redundant ferrite switch driver according to an embodiment of the present invention.
Detailed Description
In order to make the technical solution of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and examples. The present invention will be described in detail with reference to specific examples, but the present invention is not limited to these examples. Variations and modifications may be made by those skilled in the art without departing from the principles of the invention and should be considered within the scope of the invention.
The present embodiment provides a parallel redundant ferrite switch driver, and fig. 1 shows a schematic diagram of a parallel redundant ferrite switch driver according to an embodiment of the present invention.
As can be seen from fig. 1, the driver comprises:
a first driver circuit 19, a second driver circuit 20, first to fourth resistors R1 to R4, a first fuse 8, a second fuse 9, a third fuse 17, a fourth fuse 18, and first to fourth diodes D3～D6A first triode D1And a second triode D2；
Wherein the content of the first and second substances,
a first end of the first resistor R1 receives a control signal KZ, and a second end of the first resistor R1 is connected with the first triode D1A base electrode of (1);
a first end of the second resistor R2 is connected with a first power supply VCCThe second end of the second resistor R2 is connected with the first triode D1And the first port KZA of the first drive circuit 19;
the first triode D1The emitter of (2) is grounded;
the second port DA1 of the first driving circuit 19 is connected to the first terminal of the first fuse 8, and the second terminal of the first fuse 8 is connected to the first diode D3The negative electrode of (1);
first diode D3Is connected with a first end of a first coil 21 in the ferrite switch load coil, and a second end of the first coil 21 is connected with a second power supply VDD；
The third port DA2 of the first driving circuit 19 is connected to the first terminal of the second fuse 9, and the second terminal of the second fuse 9 is connected to the second diode D4The negative electrode of (1);
second diode D4Is connected to a first end of a second coil 22 of the ferrite switch load coil, and a second end of the second coil 22 is connected to a second power supply VDD；
A first end of the third resistor R3 receives a control signal KZ, and a second end of the third resistor R3 is connected with the second triode D2A base electrode of (1);
a first end of the fourth resistor R4 is connected with a first power supply VCCThe second end of the fourth resistor R4 is connected with the second triode D2And a first port KZB of the second drive circuit 20;
the second triode D2The emitter of (2) is grounded;
the second port DB1 of the second driving circuit 20 is connected to the first terminal of the third fuse 17, and the second terminal of the third fuse 17 is connected to the third diode D5The negative electrode of (1);
third diode D5Is connected to a first end of a first coil 21 in the ferrite switch load coil;
the third port DB2 of the second driving circuit 20 is connected to the first terminal of the fourth fuse 18, and the second terminal of the fourth fuse 18 is connected to the fourth diode D6The negative electrode of (1);
fourth diode D6Is connected to a first end of a second coil 22 in the ferrite switch load coil.
The first fuse, the second fuse, the third fuse, the fourth fuse, the first diode, the second diode and the third diode ensure that when any one of the first driving circuit and the second driving circuit breaks down, the other driving circuit cannot be influenced.
Fig. 2 shows a schematic diagram of a first driving circuit in a parallel redundant ferrite switch driver according to an embodiment of the present invention.
As can be seen from fig. 2, the first driving circuit 19 includes:
the circuit comprises a first monostable trigger 1, a second monostable trigger 2, a first NOT gate 3, a first pre-amplification chip 4, a second pre-amplification chip 5, a first power field effect transistor 6 and a second power field effect transistor 7;
wherein the content of the first and second substances,
the input end of the first monostable flip-flop 1, namely the first port KZA of the first driving circuit, is connected to the second end of the second resistor R2, the output end of the first monostable flip-flop 1 is connected to the input end of the first pre-amplification chip 4, and the output end of the first pre-amplification chip 4 is connected to the gate of the first power field-effect transistor 6;
the drain electrode of the first power field effect transistor 6, namely the second port DA1 of the first driving circuit, is connected with the first end of the first fuse 8;
the source electrode of the first power field effect transistor 6 is grounded;
the input end of the first not gate 3 is connected with the second end of the second resistor R2, the output end of the first not gate 3 is connected with the input end of the second monostable trigger 2, the output end of the second monostable trigger 2 is connected with the input end of the second pre-amplifying chip 5, and the output end of the second pre-amplifying chip 5 is connected with the gate of the second power field effect transistor 7;
the drain electrode of the second power field effect transistor 7, namely the third port DA2 of the first driving circuit, is connected with the first end of the second fuse 9;
the source of the second power fet 7 is grounded.
Fig. 3 shows a schematic diagram of a second driving circuit in a parallel redundant ferrite switch driver according to an embodiment of the present invention.
As can be seen from fig. 3, the second driving circuit 20 includes:
a third monostable trigger 10, a fourth monostable trigger 11, a second NOT gate 12, a third preamplification chip 13, a fourth preamplification chip 14, a third power field effect transistor 15 and a fourth power field effect transistor 16;
wherein the content of the first and second substances,
the input end of the third monostable flip-flop 10, namely the first port KZB of the second driving circuit, is connected to the second end of the fourth resistor R4, the output end of the third monostable flip-flop 10 is connected to the input end of the third pre-amplification chip 13, and the output end of the third pre-amplification chip 13 is connected to the gate of the third power fet 15;
the drain of the third power fet 15, i.e., the second port DB1 of the second driving circuit, is connected to the first end of the third fuse 17;
the source electrode of the third power field effect transistor 15 is grounded;
the input end of the second not gate 12 is connected to the second end of the fourth resistor R4, the output end of the second not gate 12 is connected to the input end of the fourth monostable flip-flop 11, the output end of the fourth monostable flip-flop 11 is connected to the input end of the fourth pre-amplification chip 14, and the output end of the fourth pre-amplification chip 14 is connected to the gate of the fourth power fet 16;
the drain of the fourth power fet 16, i.e., the third port DB2 of the second driver circuit, is connected to the first end of the fourth fuse 18;
the source of the fourth power fet 16 is grounded.
Wherein the content of the first and second substances,
the first to fourth monostable flip-flops are triggered by the rising edge of an input signal, and the outputs of the first to fourth monostable flip-flops are positive pulse logic signals.
When a control signal received by the driver is converted from a high level to a low level, a base electrode and an emitting electrode of the first triode are changed from a current starting state to a current cut-off state, a collector electrode of the first triode is converted from the low level to the high level, a rising edge signal is generated at the input end of the first monostable trigger, and the first monostable trigger is triggered to output a positive pulse logic signal to enter the input end of the first preamplification chip;
meanwhile, the base electrode and the emitting electrode of the second triode are also changed into a current cut-off state from current opening, the collector electrode of the second triode is converted from a low level to a high level, the input end of the third monostable trigger generates a rising edge signal, and the third monostable trigger is triggered to output a positive pulse logic signal to enter the input end of the third preamplification chip;
the first pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of the first power field effect transistor to enable the first power field effect transistor to be conducted;
the third pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a third power field effect transistor to enable the third power field effect transistor to be conducted;
the first power field effect transistor and the third power field effect transistor are connected in parallel and conducted simultaneously, and current generated by the second power supply sequentially passes through a first coil, a first diode, a first fuse and the first power field effect transistor in the ferrite switch load coil to form a first current loop;
the current generated by the second power supply sequentially passes through the first coil, the third diode, the third fuse and the third power field effect transistor in the ferrite switch load coil to the ground to form a second current loop;
the first current loop and the second current loop are in parallel relation with the first coil in the ferrite switch load coil, and current flowing through the first coil in the ferrite switch load coil drives the ferrite switch to be placed in a first microwave channel state.
When a control signal received by the driver is converted from a low level to a high level, a base electrode and an emitting electrode of the first triode are changed from a current cut-off state to a current open state, a collector electrode of the first triode is converted from the high level to the low level, after the high level is inverted by the first NOT gate, an input end of the second monostable trigger generates a rising edge signal, and the second monostable trigger is triggered to output a positive pulse logic signal to enter an input end of the second preamplification chip;
meanwhile, the base electrode and the emitting electrode of the second triode are changed into a current opening state from a current cut-off state, the collector electrode of the second triode is converted into a low level from a high level, after the reverse direction of the second NOT gate, the input end of the fourth monostable trigger generates a rising edge signal, and the fourth monostable trigger is triggered to output a positive pulse logic signal to enter the input end of the fourth preamplification chip;
the second pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a second power field effect transistor to enable the second power field effect transistor to be conducted;
the fourth pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a fourth power field effect transistor to enable the fourth power field effect transistor to be conducted;
the second power field effect transistor and the fourth power field effect transistor are connected in parallel and conducted simultaneously, and current generated by the second power supply sequentially passes through a second coil, a second diode, a second fuse and the second power field effect transistor in the ferrite switch load coil to form a third current loop;
the current generated by the second power supply sequentially passes through a second coil, a fourth diode, a fourth fuse and a fourth power field effect transistor in the ferrite switch load coil to form a fourth current loop;
the third current loop and the fourth current loop are in parallel relation with the second coil in the ferrite switch load coil, and current flowing through the second coil in the ferrite switch load coil drives the ferrite switch to be placed in a second microwave channel state.
When the control signal received by the driver maintains high level or low level unchanged, all the monostable triggers are not triggered, the outputs of the monostable triggers are all low level, the outputs of all the preamplification chips are all low level, the grids of all the power field effect tubes are all low level, and all the power field effect tubes are all in a closed state, so that no current flows through the first coil and the second coil in the ferrite switch load coil, and the ferrite switch maintains the current microwave channel unchanged.
When the first driving circuit is in fault mode, the first power field effect transistor is in long-term conducting state, the first current loop is in long-term current flowing state, the first fuse is fused due to long-term current flowing, the first current loop is in open circuit state, and as the first current loop and the second current loop are in parallel connection relation to the first coil in the driving ferrite load coil, the second current loop continues to provide a current channel for the first coil, and the ferrite switch driver can continue to work normally.
When the first driving circuit is in fault and the second power field effect transistor is in a fault mode of a long-term conduction state, the third current loop is in a long-term current flowing state, the second fuse is fused due to the long-term current flowing state, the third current loop is in an open circuit state, and as the third current loop and the fourth current loop are in a parallel connection relation with the second coil in the driving ferrite load coil, the fourth current loop continues to provide a current channel for the second coil, and the ferrite switch driver can continue to work normally.
When the first driving circuit is in fault and the first power field effect transistor is in a fault mode of a long-term disconnection state, the first current loop is in a disconnection state, and the second current loop continues to provide a current channel for the first coil because the first current loop and the second current loop are in a parallel connection relation for driving the first coil in the ferrite load coil, so that the ferrite switch driver can continue to work normally.
When the first driving circuit is in fault and the second power field effect transistor is in a fault mode of a long-term disconnection state, the third current loop is in a disconnection state, and the fourth current loop continues to provide a current channel for the second coil because the third current loop and the fourth current loop are in a parallel connection relation for driving the second coil in the ferrite load coil, so that the ferrite switch driver can continue to work normally.
Similarly, when the second driver circuit fails, the first driver circuit can still continue to operate normally.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.
Claims (5)
1. A parallel redundant ferrite switch driver, the driver comprising:
the circuit comprises a first driving circuit, a second driving circuit, a first resistor, a second resistor, a third resistor, a fourth resistor, a first fuse, a second fuse, a third fuse, a fourth fuse, a first diode, a second diode, a first triode and a second triode;
wherein the content of the first and second substances,
the first end of the first resistor receives a control signal, and the second end of the first resistor is connected with the base electrode of the first triode;
the first end of the second resistor is connected with a first power supply, and the second end of the second resistor is connected with the collector of the first triode and the first port of the first driving circuit;
the emitting electrode of the first triode is grounded;
the second port of the first driving circuit is connected with the first end of the first fuse, and the second end of the first fuse is connected with the cathode of the first diode;
the anode of the first diode is connected with the first end of a first coil in the ferrite switch load coil, and the second end of the first coil is connected with a second power supply;
the third port of the first driving circuit is connected with the first end of the second fuse, and the second end of the second fuse is connected with the cathode of the second diode;
the anode of the second diode is connected with the first end of a second coil in the ferrite switch load coil, and the second end of the second coil is connected with a second power supply;
the first end of the third resistor receives a control signal, and the second end of the third resistor is connected with the base electrode of the second triode;
the first end of the fourth resistor is connected with the first power supply, and the second end of the fourth resistor is connected with the collector of the second triode and the first port of the second drive circuit;
the emitter of the second triode is grounded;
a second port of the second driving circuit is connected with a first end of the third fuse, and a second end of the third fuse is connected with a negative electrode of the third diode;
the anode of the third diode is connected with the first end of the first coil in the ferrite switch load coil;
a third port of the second driving circuit is connected with a first end of the fourth fuse, and a second end of the fourth fuse is connected with a negative electrode of the fourth diode;
the anode of the fourth diode is connected with the first end of the second coil in the ferrite switch load coil;
the first drive circuit includes:
the circuit comprises a first monostable trigger, a second monostable trigger, a first NOT gate, a first pre-amplification chip, a second pre-amplification chip, a first power field effect transistor and a second power field effect transistor;
wherein the content of the first and second substances,
the input end of the first monostable trigger, namely the first port of the first driving circuit, is connected with the second end of the second resistor, the output end of the first monostable trigger is connected with the input end of the first pre-amplification chip, and the output end of the first pre-amplification chip is connected with the grid electrode of the first power field effect transistor;
the drain electrode of the first power field effect transistor, namely the second port of the first driving circuit, is connected with the first end of the first fuse;
the source electrode of the first power field effect transistor is grounded;
the input end of the first NOT gate is connected with the second end of the second resistor, the output end of the first NOT gate is connected with the input end of the second monostable trigger, the output end of the second monostable trigger is connected with the input end of the second pre-amplification chip, and the output end of the second pre-amplification chip is connected with the grid electrode of the second power field effect transistor;
the drain electrode of the second power field effect transistor, namely the third port of the first driving circuit, is connected with the first end of the second fuse;
the source electrode of the second power field effect transistor is grounded;
the second drive circuit includes:
the first monostable trigger, the second monostable trigger, the first NOT gate, the first pre-amplification chip, the second power field effect transistor and the second power field effect transistor are connected in series;
wherein the content of the first and second substances,
the input end of the third monostable trigger, namely the first port of the second driving circuit, is connected with the second end of the fourth resistor, the output end of the third monostable trigger is connected with the input end of the third pre-amplification chip, and the output end of the third pre-amplification chip is connected with the grid electrode of the third power field effect transistor;
the drain electrode of the third power field effect transistor, namely the second port of the second driving circuit, is connected with the first end of the third fuse;
the source electrode of the third power field effect transistor is grounded;
the input end of the second NOT gate is connected with the second end of the fourth resistor, the output end of the second NOT gate is connected with the input end of the fourth monostable trigger, the output end of the fourth monostable trigger is connected with the input end of the fourth pre-amplification chip, and the output end of the fourth pre-amplification chip is connected with the grid electrode of the fourth power field effect transistor;
the drain electrode of the fourth power field effect transistor, namely the third port of the second driving circuit, is connected with the first end of the fourth fuse;
the source electrode of the fourth power field effect transistor is grounded;
wherein the content of the first and second substances,
the first monostable trigger to the fourth monostable trigger are triggered by the rising edge of an input signal, and the output signals are positive pulse logic signals;
when a control signal received by the driver is converted from a high level to a low level, a base electrode and an emitting electrode of the first triode are changed from a current starting state to a current cut-off state, a collector electrode of the first triode is converted from the low level to the high level, a rising edge signal is generated at the input end of the first monostable trigger, and the first monostable trigger is triggered to output a positive pulse logic signal to enter the input end of the first preamplification chip;
meanwhile, the base electrode and the emitting electrode of the second triode are also changed into a current cut-off state from current opening, the collector electrode of the second triode is converted from a low level to a high level, the input end of the third monostable trigger generates a rising edge signal, and the third monostable trigger is triggered to output a positive pulse logic signal to enter the input end of the third preamplification chip;
the first pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of the first power field effect transistor to enable the first power field effect transistor to be conducted;
the third pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a third power field effect transistor to enable the third power field effect transistor to be conducted;
the first power field effect transistor and the third power field effect transistor are connected in parallel and conducted simultaneously, and current generated by the second power supply sequentially passes through a first coil, a first diode, a first fuse and the first power field effect transistor in the ferrite switch load coil to form a first current loop;
the current generated by the second power supply sequentially passes through the first coil, the third diode, the third fuse and the third power field effect transistor in the ferrite switch load coil to the ground to form a second current loop;
the first current loop and the second current loop are in parallel relation with the first coil in the ferrite switch load coil, and current flowing through the first coil in the ferrite switch load coil drives the ferrite switch to be placed in a first microwave channel state.
2. The driver of claim 1, wherein when the control signal received by the driver is switched from a low level to a high level, the base and the emitter of the first triode are changed from a current-off state to a current-on state, the collector of the first triode is changed from a high level to a low level, after being inverted by the first not gate, the input terminal of the second monostable flip-flop generates a rising edge signal, and the second monostable flip-flop is triggered to output a positive pulse logic signal to the input terminal of the second pre-amplification chip;
meanwhile, the base electrode and the emitting electrode of the second triode are changed into a current opening state from a current cut-off state, the collector electrode of the second triode is converted into a low level from a high level, after the reverse direction of the second NOT gate, the input end of the fourth monostable trigger generates a rising edge signal, and the fourth monostable trigger is triggered to output a positive pulse logic signal to enter the input end of the fourth preamplification chip;
the second pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a second power field effect transistor to enable the second power field effect transistor to be conducted;
the fourth pre-amplification chip amplifies and outputs the received positive pulse logic signal to a grid electrode of a fourth power field effect transistor to enable the fourth power field effect transistor to be conducted;
the second power field effect transistor and the fourth power field effect transistor are connected in parallel and conducted simultaneously, and current generated by the second power supply sequentially passes through a second coil, a second diode, a second fuse and the second power field effect transistor in the ferrite switch load coil to form a third current loop;
the current generated by the second power supply sequentially passes through a second coil, a fourth diode, a fourth fuse and a fourth power field effect transistor in the ferrite switch load coil to form a fourth current loop;
the third current loop and the fourth current loop are in parallel relation with the second coil in the ferrite switch load coil, and current flowing through the second coil in the ferrite switch load coil drives the ferrite switch to be placed in a second microwave channel state.
3. The driver of claim 1, wherein when the control signal received by the driver maintains a high level or a low level, all the monostables are not triggered, the output of the monostables is a low level, the output of all the preamplification chips is a low level, the gates of all the power field effect transistors are low levels, all the power field effect transistors are in an off state, so that no current flows through the first coil and the second coil in the ferrite switch load coil, and the ferrite switch maintains the current microwave channel.
4. A driver according to any of claims 1-3, wherein when the first driver circuit fails, the second driver circuit continues to normally drive the ferrite switch load coil;
when the second driving circuit fails, the first driver circuit can continue to normally drive the ferrite switch load coil.
5. The driver of claim 1, wherein the first through fourth fuses and the first through fourth diodes ensure that when any one of the first and second driving circuits fails, the other driving circuit is not affected.
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