CN105840320A - Electronic speed regulator and actuator drive circuit for diesel engine duplicated hot-redundancy - Google Patents

Abstract

The invention relates to a driving circuit for an actuator of an electronic governor for dual-engine hot backup of diesel engines. A dual-engine hot backup electronic governor actuator drive circuit for a diesel engine is composed of a controller end drive circuit part and a drive adapter board. The controller end drive circuit includes a first optocoupler, a first MOS tube, a first A Zener diode, a second freewheeling diode, a first voltage dividing resistor, a fourth voltage dividing resistor, a second current limiting resistor, and a third current limiting resistor; the drive adapter board includes two parts: a drive circuit and a logic control circuit, The drive adapter board end drive circuit includes a second MOS transistor, a third MOS transistor, and a fifth coil drive selection chip. The core of the present invention to realize the passive cut-out function of the fault loop is the edge D flip-flop and the data selector for selecting one out of eight, and the latch function of the edge D flip-flop can ensure the reliable output of the fault control loop. The control circuit of the control transfer part is realized by analog devices, which has high reliability.

Description

A dual engine hot backup electronic governor actuator drive circuit

technical field

The invention relates to a driving circuit for an actuator of an electronic governor for dual-engine hot backup of diesel engines.

Background technique

The development of diesel engine has a history of hundreds of years, and it has been widely used because of its high thermal efficiency, wide power range, good adaptability and other advantages. The dual-machine hot backup electronic governor can improve the reliability of the electronic governor, and the diesel engine can run continuously without stopping in case of a fault. The drive of the double-coil actuator is an important link of the dual-machine hot backup electronic governor. The characteristic of the double-coil actuator is that an actuator is composed of two coils, and the two coils can work independently to drive the pull rod of the actuator. The dual-machine hot backup electronic speed controller has the following requirements for the actuator: firstly, the two-way coils can be driven independently, that is, the two-way actuator coils can work at the same time, and any one of the coils can work independently; When a single unit fails in the hot backup system, the control loop corresponding to the faulty loop can be cut off passively. The designed redundant actuator drive circuit is mainly divided into two parts, the actuator drive on the controller side and the drive adapter board, and the two parts work together to complete the drive of the actuator. The drive circuit for driving the adapter board is equivalent to a switch on the actuator drive circuit, and the on-off of the switch is jointly controlled by two controllers. When both control loops are normal, the two control loops work at the same time. When a control loop fails, the faulty loop will be cut out under the control of the normal path, effectively isolating the fault and improving system availability. There are many patents in the published literature that mention the concept of dual-machine hot backup, but these patents are fundamentally different from this patent in terms of application fields and system performance requirements; The back-up diesel ESC, however, does not exactly mention the drive requirements of the aforementioned dual coil actuators. Two controllers, a drive adapter board and a double-coil actuator constitute a dual-machine hot backup system.

Contents of the invention

The object of the present invention is to provide an actuator drive circuit of an electronic governor for dual-engine hot backup of diesel engines.

The purpose of the present invention is achieved like this:

A dual-engine hot backup electronic governor actuator drive circuit for a diesel engine is composed of a controller-end drive circuit part and a drive adapter board. The controller-side drive circuit includes a first optocoupler G1, a first MOS transistor Q1, The first zener diode Z1, the second freewheeling diode D2, the first voltage dividing resistor R1, the fourth voltage dividing resistor R4, the second current limiting resistor R2, and the third current limiting resistor R3; the drive adapter board includes a driver There are two parts, circuit and logic control circuit. The drive adapter board end drive circuit includes the second MOS transistor Q2, the third MOS transistor Q3, the fifth coil drive selection chip U5, the first diode D1, the third diode D3, the fifth current-limiting resistor R5, the ninth current-limiting resistor R9; the logic control circuit includes a first one-of-eight data selector U1 and a fourth one-of-eight data selector U4, a second edge D flip-flop U2, The third and second input AND gate U3, the seventh pull-up resistor R7, and the eighth pull-up resistor R8; are characterized in that:

Pin 1 of the first optocoupler and the second optocoupler are connected to VCC through the second resistor R2 and the tenth resistor R10 respectively, pin 2 of the first optocoupler G1 is connected to the pulse width modulation signal input port PWM, and the pin 2 of the first optocoupler G1 is connected to the pulse width modulation signal input port PWM. Pin 2 of the second optocoupler G2 is connected to the PWM signal output port of the microcontroller; pin 4 of the first optocoupler G1 and the second optocoupler G2 pass through the first voltage dividing resistor R1 and the eleventh voltage dividing resistor R11 respectively Connect to +24V, pin 3 of the first optocoupler G1 and G2 are respectively connected to GND through the fourth voltage dividing resistor R4 and the thirteenth voltage dividing resistor R13, the first Zener diode Z1 and the second voltage dividing resistor Z2 is respectively connected in parallel with the fourth voltage dividing resistor R4 and the thirteenth voltage dividing resistor R13 to limit the gate voltage applied to the MOS tube. The first optocoupler G1 and the second optocoupler G2 are respectively connected by the third resistor R3 and the Twelve resistors R12 are connected to the bases of the first MOS transistor Q1 and the fourth MOS transistor Q4, and the source and drain of the first MOS transistor Q1 and the fourth MOS transistor Q4 are respectively connected to the 24V voltage and the second freewheeling diode D2 and the fourth freewheeling diode D4, the other ends of the second freewheeling diode D2 and the fourth freewheeling diode D4 are respectively connected to the first driving positive pole DRIVE1+ and the second driving positive pole DRIVE2+ of the first coil L1 and the second coil L2 ;

The connection relationship of the drive circuit on the drive adapter board: including the drive selection chip TPS2812, the second MOS transistor Q2 and the third MOS transistor Q3; the pin 2 and pin 4 of the drive selection chip TPS2812 are respectively connected to the second input of the logic circuit of the drive board The output pin 3 and pin 6 of the AND gate chip U3, and the pin 7 and pin 5 of the driver selection chip TPS2812 are respectively connected to the second MOS transistor Q2 and the third MOS transistor Q3 through the fifth resistor R5 and the ninth resistor R9 The base of the second MOS transistor Q2 and the source of the third MOS transistor Q3 are respectively connected to the 24V voltage through the first diode D1 and the third diode D3, and the second MOS transistor Q2 and the third MOS transistor Q3 The source is connected to the first negative pole DRIVE1- and the second negative pole DRIVE2- of the coil drive, and the drains of the second MOS transistor Q2 and the third MOS transistor Q3 are connected to GND; the first coil L1 and the The first positive pole DRIVE1+ and the second positive pole DRIVE2+ of the second coil L2 are connected to the drive circuit on the control board, and the first negative pole DRIVE1- and the second negative pole DRIVE2- of the first coil L1 and the second coil L2 are connected to the drive adapter board terminal Drive circuit;

The logic circuit at the drive adapter board side is composed of the first eight-to-one data selector U1, the fourth eight-to-one data selector U4, the edge D flip-flop U2 and the two-input AND gate U3, and the connection relationship is: the first eight to one The control terminal pins 11, 10 and 9 of the data selector U1 are respectively connected to the control logic output ports A0, A1 and A2 of the first controller, and the control terminal pins of the fourth eighth data selector U4 11. Pin 10 and pin 9 are respectively connected to the control logic output ports B0, B1, B2 of the second controller; the data input terminals of the first eight-to-one data selector U1 and the fourth eight-to-one data selector U4 D0～D4, D6 and D7 are connected to GND, and D5 is connected to VCC; the output pin 5 of the one-to-eight data selector U1 and the fourth one-to-eight data selector U4 are respectively connected to the two-input AND gate U3A and the two-input The input terminal of the AND gate U3B; pin 4 and pin 6 of the edge D flip-flop U2A are commonly connected to the control logic output terminal B3 of the second controller, and pin 14 and pin 16 of the edge D flip-flop U2B are commonly connected To the control logic output terminal A3 of the first controller, the output of the edge D flip-flop U2A is connected to an input pin 1 of the two-input AND gate U3A, and the output of the edge D flip-flop U2B is connected to an input of the two-input AND gate U3B Pin 5, pin 1 and pin 5 of the two-input AND gate U3 are pulled up to a high level through the seventh resistor R7 and the eighth resistor R8 respectively, and the output pin 3 of the two-input AND gate U3A is connected to the driver board The pin 2 of the driving circuit driving chip U5, the output pin 6 of the two-input AND gate U3B is connected to the pin 4 of the driving circuit driving chip U5 on the driving board end;

The control terminal A0, the control terminal A1, and the control terminal A2 of the first eight-choice data selector U1 are respectively connected to the IO pins of the main controller. When the three pins of the controller output 101, the D5 data lead The pin is strobed, U1 outputs high level, the PR and CLK pins of the edge D flip-flop U2A are connected to the B3 pin of the second controller, when the system works normally, B3 is low level, and the edge D flip-flop U2A outputs high Level, the output of U1 and U2A is connected to the coil drive selection chip U5 after passing through the two-input AND gate U3, and U5 outputs a high level to drive the MOS transistor Q2, and Q2 is turned on; the connecting wire of the actuator coil L1 is respectively connected to DRIVE1+ and DRIVE1- , the actuator coil L1 is controlled by the PWM signal of the controller 1; when the control loop 1 fails, the IO pin B3 of the second controller turns from low level to high level, and when the CLK pin of U2A has a rising When it is edged, the output pin Q is locked to be the same as the pin D, and the pin D is grounded, the edge ground trigger outputs a low level, and the two-input AND gate U3A outputs a low level, then the MOS transistor Q2 is cut off, and the control loop 1 is disconnected. Open, the passive cut-out of the fault circuit.

Pin 1 of the two-input AND gate U3A and pin 5 of U3B are pulled up to high level through pull-up resistors R7 and R8.

The drive circuit at the controller side is MOS transistor Q1 in the form of voltage turn-on, and the resistance value of voltage dividing resistors R7 and R4 is matched to the turn-on voltage of MOS transistor Q1 to prevent the turn-on voltage from being too high. A Zener diode Z1 is added to the circuit.

The MOS transistors Q2 and Q3 in the driving circuit of the driver adapter board are in and on when there is no fault.

The invention has the beneficial effects that: under normal working conditions, both coils can work independently; under fault conditions, the fault control loop can be passively cut out, fault isolation is realized, and continuous operation of the diesel engine without stopping is ensured under fault states. The core to realize the passive cut-out function of the fault loop is the edge D flip-flop and the data selector to select one out of eight. The latch function of the edge D flip-flop can ensure the reliable output of the fault control loop. The control circuit of the control transfer part is realized by analog devices, which has high reliability.

Description of drawings

Figure 1 is the drive circuit at the controller side;

Figure 2 is the logic circuit of the driver adapter board;

Figure 3 is the driving circuit of the drive adapter board;

Figure 4 Layout diagram of dual-machine hot backup system;

detailed description

The present invention will be further described below in conjunction with the accompanying drawings.

The invention provides a dual-machine hot backup electronic speed regulator actuator drive circuit, which is mainly composed of a controller end drive circuit part and a drive transfer control circuit. The drive circuit at the controller side includes optocoupler G1, MOS tube Q1, a Zener diode Z1, freewheeling diode D2, voltage dividing resistors R1, R4 and current limiting resistors R2, R3; the drive transfer control circuit includes MOS tube Q2, Q3, coil drive selection chip U5, diodes D1, D3, current limiting resistors R5, R9, two data selectors U1 and U4, an edge D flip-flop U2, a dual-input AND gate U3 and pull-up resistors R7, R8. The present invention proposes a diesel engine dual engine hot backup electronic governor actuator drive circuit, the input end of the optocoupler G1 is connected with the PWM signal of the single chip microcomputer, and the output end of the optocoupler G1 generates a 9V voltage control MOS through the voltage dividing resistors R1 and R4. The on-off of the tube Q1 and the on-off of the MOS transistors Q2 and Q3 are controlled by the drive enable signal generated by the data selector, the edge D flip-flop and the two-input AND gate through the coil drive selection chip. The circuit can realize the drive of the dual-coil actuator of the dual-machine hot-backup electronic governor, and can realize the independent work of the two coils of the actuator when there is no fault. When the single machine fails, the faulty machine is passively cut out, and the normal controller continues to work.

The invention designs a driving circuit of a dual-coil actuator for a dual-machine hot-backup electronic governor, which realizes simultaneous independent operation of the dual coils and passive cut-out of the faulty coil, while the normal coil continues to work, and realizes stable and continuous operation of the diesel engine without stopping in case of a fault operation, improving system reliability and availability.

The purpose of the present invention is achieved like this:

A redundant dual-coil actuator drive circuit for a dual-machine hot backup electronic speed regulator is characterized in that it is mainly composed of a controller end drive circuit part and a drive adapter board. The drive circuit of the controller includes optocoupler G1, MOS transistor Q1, Zener diode Z1, freewheeling diode D2, voltage dividing resistors R1, R4 and current limiting resistors R2, R3, and each controller has at least one controller terminal Drive circuit module; the drive adapter board includes two parts: a drive circuit and a logic control circuit, and the drive circuit at the end of the drive adapter board includes MOS transistors Q2, Q3, coil drive selection chip U5, diodes D1, D3, and a current limiting resistor R5, R9; the logic control circuit includes two eight-to-one data selectors U1 and U4, an edge D flip-flop U2, a two-input AND gate U3 and pull-up resistors R7 and R8.

The connection relationship of the drive circuit at the controller side is as follows: pin 1 of the optocoupler G1 and G2 is connected to VCC through R2 and R10 respectively, pin 2 of the optocoupler G1 is connected to the pulse width modulation signal input port PWM, and the optocoupler The pin 2 of coupling G2 is connected to the PWM signal output port of the microcontroller (see Figure 4). Pin 4 of optocoupler G1 and G2 is connected to +24V through voltage divider resistors R1 and R11 respectively, pin 3 of optocoupler G1 and G2 is connected to GND through voltage divider resistor R4 and R13 respectively, Zener diode Z1 and Z2 is connected in parallel with R4 and R13 to limit the gate voltage applied to the MOS tube. The optocouplers G1 and G2 are connected to the bases of the MOS tubes Q1 and Q4 through R3 and R12 respectively, and the source and drain of the MOS tubes The poles are respectively connected to 24V and the freewheeling diodes D2 and D4, and the other ends of the freewheeling diodes D2 and D4 are respectively connected to the driving anodes DRIVE1+ and DRIVE2+ of the coil L1 and the coil L2.

The connection relationship of the drive circuit on the drive adapter board is as follows: it mainly includes the drive selection chip TPS2812 and MOS transistors Q2 and Q3 (see Figure 3). The pin 2 and pin 4 of the driver selection chip TPS2812 are respectively connected to the two output pins 3 and 6 of the driver board logic circuit 2 input AND chip U3, and the pin 7 and pin 5 of the driver selection chip TPS2812 are respectively Connect to the bases of MOS transistors Q2 and Q3 through R5 and R9, the sources of MOS transistors Q2 and Q3 are respectively connected to 24V through diodes D1 and D3, and the sources of MOS transistors Q2 and Q3 are connected to the negative electrode of the coil drive On DRIVE1- and DRIVE2-, the drains of MOS transistors Q2 and Q3 are connected to GND. The positive poles DRIVE1+ and DRIVE2+ of the coil L1 and coil L2 of the dual-coil actuator are connected to the control board end drive circuit, and the negative poles DRIVE1- and DRIVE2- of the coil L1 and coil L2 are connected to the drive adapter board end drive circuit (see Figure 4) .

The logic circuit on the drive adapter board side is composed of two data selectors U1 and U4, edge D flip-flop U2 and two-input AND gate U3 (see Figure 2). The connection relationship is as follows: data selector The control terminal pin 11, pin 10 and pin 9 of U1 are connected to the control logic output ports A0, A1 and A2 of the controller 1, and the control terminal pin 11, pin 10 and pin 1 of the eight-choice data selector U4 Pin 9 is connected to the control logic output ports B0, B1 and B2 of the controller 2; the data input terminals D0-D4, D6 and D7 of the data selectors U1 and U4 are connected to GND, and D5 is connected to VCC. The output pins 5 of U1 and U4 of the eight-to-one data selector are respectively connected to the input terminals of the two-input AND gates U3A and U3B. Pin 4 and pin 6 of the edge D flip-flop U2A are commonly connected to the control logic output terminal B3 of the controller 2, and pins 14 and 16 of the edge D flip-flop U2B are commonly connected to the control logic of the controller 1 Output terminal A3, the output of the edge D flip-flop U2A is connected to an input pin 1 of the two-input AND gate U3A, the output of the edge D flip-flop U2B is connected to an input pin 5 of the two-input AND gate U3B, and the two-input AND gate Pin 1 and pin 5 of U3 are pulled up to a high level through resistors R7 and R8 respectively, and the output pin 3 of the two-input AND gate U3A is connected to the pin 2 of the driving circuit driver chip U5 on the driver board, and the two-input AND gate The output pin 6 of the gate U3B is connected to the pin 4 of the drive chip U5 of the driver board end drive circuit.

The double-coil actuator driving circuit of the dual-machine hot backup electronic governor is realized in this way: according to the connection relationship of the circuit, the three control terminals A0, A1 and A2 of the eight-choice data selector U1 are connected to the main controller respectively. On the IO pin, the connection relationship of the circuit (see Figure 2) and the truth table of the eight-to-one data selector (see Table 2) only when the three pins of the controller output 101, the D5 data pin is strobe, U1 will output a high level, the PR and CLK pins of the edge D flip-flop U2A are connected to the B3 pin of the controller 2, B3 is low when the system is working normally, and the edge D flip-flop U2A outputs a high level , the output of U1 and U2A is connected to the coil drive selection chip U5 after passing through the two-input AND gate U3, and U5 outputs a high level to drive the MOS transistor Q2, and Q2 is turned on. The connecting wires of the actuator coil L1 are respectively connected to DRIVE1+ and DRIVE1- (see Figure 4), and the working state of the actuator coil L1 is only controlled by the PWM signal of the controller 1. When the control loop 1 fails, the IO pin B3 of the controller 2 flips from low level to high level. According to the working characteristics of the edge D flip-flop (see Table 1), when the CLK pin of U2A has a rising edge Then the output pin Q is locked to be the same as the pin D, and the pin D is grounded, the edge ground trigger outputs a low level, and the two-input AND gate U3A outputs a low level, then the MOS transistor Q2 is cut off, and the control loop 1 is disconnected. Passive cut-out of faulty loops.

The dual-machine hot backup electronic speed controller double-coil actuator drive circuit also includes:

1. Pin 1 of the two-input AND gate U3A and pin 5 of U3B are pulled up to high level by pull-up resistors R7 and R8 to ensure that the system can work normally when only one controller is connected.

2. The drive circuit on the controller side is MOS transistor Q1 in the form of voltage opening. The resistance value of the voltage dividing resistors R7 and R4 is matched to the opening voltage of the MOS transistor Q1. In order to prevent the opening voltage from being too high, a Zener diode Z1 is added to the circuit. , to ensure the reliable opening of the MOS tube.

3. The MOS transistors Q2 and Q3 in the drive circuit of the drive adapter board are in and on when there is no fault. Use the standard selection, otherwise it may cause the MOS tube to burn out due to overheating.

The present invention will be described in more detail below in conjunction with FIGS. 1-4 , and Table 1 and Table 2. Table 1 is the truth table of the edge D flip-flop; Table 2 is the truth table of the eight-choice data selector.

Combined with Figures 1 to 4, the redundant dual-coil actuator drive circuit of the dual-machine hot backup electronic governor specifically includes the following parts:

The controller drive circuit is located on the controller (see Figure 4), where the MOS transistor Q1 is controlled by the PWM signal of the microcontroller. One controller of the dual-machine hot backup electronic governor has at least one drive circuit at the controller end. The drive control adapter board mainly includes the logic circuit at the drive adapter board end and the drive circuit at the drive adapter board end. A drive control adapter board contains two drivers and drives two coils. The drive adapter board is composed of four single-chip ordinary IO pin control. The drive adapter board is equivalent to adding a combination logic switch controlled by a single-chip microcomputer to the drive circuit of the coil. The function of the combination logic circuit is to realize the normally closed state of the switch under no fault, and passively cut out the fault circuit under the fault state. Now, the working process of the drive circuit will be described in detail when the control loop 2 fails.

When both the main and standby controllers are working normally, the two actuator coils work simultaneously. The positive and negative poles of the actuator are connected to DRIVE1+ and DRIVE1- respectively, and the coil will be energized only when the MOS tube Q1 at the controller end and the drive adapter board Q2 are both turned on. The controller generates a PWM signal and connects it to pin 2 of the optocoupler G1. Pin 1 of the optocoupler G1 is connected to VCC through the current limiting resistor R2. When the PWM signal is low, the optocoupler is turned on. According to the characteristics of the optocoupler, the optocoupler The connection between pin 3 and pin 4 of G1 is also conducted, and the resistance value of the resistor is configured according to the principle of voltage division, so that the voltage of pin 3 of the optocoupler G1 is greater than the turn-on voltage of the MOS tube, and the MOS tube is turned on. When the PWM is at a high level, the optocoupler cannot be turned on, the voltage of pin 3 of the optocoupler G1 is 0V, and the MOS transistor Q1 is cut off.

The MOS transistor Q2 of the drive adapter board is controlled by pin 2 and pin 4 of the drive enable terminal of the drive selection chip U5. When the drive enable terminal 2 pin inputs a high level, the 7 pin of the coil drive selection chip U5 outputs a 12V high voltage. Ping, MOS tube Q2 is turned on; when pin 2 of the drive enable terminal inputs a low level, pin 7 of the coil drive selection chip U5 outputs a low level of 0V, and the MOS tube Q2 is turned off; pin 2 of the drive enable terminal is connected to The output of the combinatorial logic circuit drives the turn-on and cut-off of the MOS transistor on the adapter board to be determined by the output of the combinatorial logic circuit.

The logic circuit of the drive adapter board is composed of eight data selectors U1, U4, edge D flip-flop U2 and two-input AND gate U3, the connection relationship of the logic circuit and the truth table of the eight data selector (see figure 2 and Table 2) it can be seen that only when the control pins A0, A1 and A2 of the eight-to-one data selector U1 input high level, low level, and high level respectively, that is, when the output of A0A1A2 is 101, the eight-to-one data Output 5 pin Y1 output of selector U1 is equal to input 14 pin D5. The 14-pin D5 of U1 is connected to VCC, so if and only when the control pin A0A1A2 of U1 inputs 101, U1 outputs a high level. The truth table of the edge D flip-flop is shown in Figure 4. When the 2-pin CLR of the edge D flip-flop U2 inputs a high level and the 6-pin PR inputs a low level, the 8-pin Q output is a high level. When the 4-pin CLK flips from a low level to a high-level rising edge, the output of the 8-pin Q will be locked to be equal to the input of the 3-pin D.

When both controller 1 and controller 2 are working normally, both coils are put into operation. At this time, the controller 1 is connected to the pin of A0A1A2 to output 101, and the pin of B3 outputs low level 0. According to the working principle of the logic circuit, this At this time, the data selector U1 outputs a high level by selecting one of eight, and the edge D flip-flop outputs U2A to output a high level, and then it can be seen from the truth table of the two-input AND gate that the pin 3 of U3 outputs a high level at this time, and the MOS tube Q2 When it is turned on, the coil L1 is controlled by the PWM signal of the drive circuit on the controller side. Similarly, the control pin A0A1A2 of the eight-choice data selector U4 corresponds to the IO pin B0B1B2 of the controller 2 to input 101, the A3 pin inputs a low level, the MOS transistor Q3 is turned on, and the working condition value of the coil L2 is affected by Controlled by the PWM signal of controller 2. Both coils are able to operate independently at the same time.

When a controller 2 loop fails, the L2 loop is required to stop working under the control of controller 1—passively cut out. Then only the IO pin A3 of the controller 1 needs to be flipped from low level to high level, and the 16-pin CLK of the edge D flip-flop has a rising edge. According to the working principle of the edge D flip-flop, the edge D flip-flop U2B The 13-pin Q output is locked at low level, the 6-pin output of the two-input AND gate U3B is low-level, and the MOS tube Q3 is cut off. At this time, regardless of the state of the B0B1B2 of the controller 2 and the PWM of the backup machine, the coil L2 Both stop working, and realize the passive cut-out of the control right of the faulty control loop.

Table 1

Table 2

Claims (5)

1. a diesel engine two-node cluster hot backup electronic governor actuator drive circuit, it is made up of controller end driving circuit section and driving keyset, described controller end drive circuit includes the first optocoupler (G1), first metal-oxide-semiconductor (Q1), first Zener diode (Z1), second fly-wheel diode (D2), the first divider resistance (R1), the 4th divider resistance (R4) and the second current-limiting resistance (R2), the 3rd current-limiting resistance (R3)；Described driving keyset includes drive circuit and logic control circuit two parts, described driving keyset end drive circuit includes that the second metal-oxide-semiconductor (Q2), the 3rd metal-oxide-semiconductor (Q3), the 5th coil drive select chip (U5), first diode (D1), the 3rd diode (D3), the 5th current-limiting resistance (R5), the 9th current-limiting resistance (R9)；Described logic control circuit includes that the one or eight selects a data selector (U1) and the four or eight to select a data selector (U4), second edge D flip-flop (U2), the three or two input and door (U3) and the 7th pull-up resistor (R7), the 8th pull-up resistor (R8)；It is characterized in that:

The pin 1 of the first optocoupler and the second optocoupler is connected on VCC by the second resistance (R2) and the tenth resistance (R10) respectively, the pin 2 of the first optocoupler (G1) is connected on pulse-width signal input port PWM, and the pin 2 of the second optocoupler (G2) is connected to the pwm signal delivery outlet of microcontroller；nullThe pin 4 of the first optocoupler (G1) and the second optocoupler (G2) is connected on+24V by the first divider resistance (R1) and the 11st divider resistance (R11) respectively，The pin 3 of the first optocoupler (G1) and (G2) is connected on GND by the 4th divider resistance (R4) and the 13rd divider resistance (R13) respectively，First Zener diode (Z1) and the second divider resistance (Z2) respectively with the 4th divider resistance (R4)、13rd divider resistance (R13) is in parallel，Limit the gate voltage being added on metal-oxide-semiconductor，First optocoupler (G1) and the second optocoupler (G2) are by being connected to the first metal-oxide-semiconductor (Q1) and the base stage of the 4th metal-oxide-semiconductor (Q4) by the 3rd resistance (R3) and the 12nd resistance (R12) respectively，First metal-oxide-semiconductor (Q1) and the former pole of the 4th metal-oxide-semiconductor (Q4)、Drain electrode is connected respectively on 24V voltage and the second fly-wheel diode (D2) and the 4th fly-wheel diode (D4)，The other end of the second fly-wheel diode (D2) and the 4th fly-wheel diode (D4) the most respectively with first coil (L1)、First driving positive pole (DRIVE1+) of the second coil (L2) drives positive pole (DRIVE2+) to be connected with second；

Drive the annexation of keyset end drive circuit: include driving selection chip TPS2812 and the second metal-oxide-semiconductor (Q2) and the 3rd metal-oxide-semiconductor (Q3)；nullDrive and select the pin 2 of chip TPS2812 and pin 4 to be connected respectively to drive plate logic circuit two input and the output pin 3 of door chip (U3) and pin 6，Drive and select the pin 7 of chip TPS2812 and pin 5 to be connected to the second metal-oxide-semiconductor (Q2) and the base stage of the 3rd metal-oxide-semiconductor (Q3) by the 5th resistance (R5) and the 9th resistance (R9) respectively，The source electrode of the second metal-oxide-semiconductor (Q2) and the 3rd metal-oxide-semiconductor (Q3) is connected to 24V voltage by the first diode (D1) and the 3rd diode (D3) respectively，The source electrode of the second metal-oxide-semiconductor (Q2) and the 3rd metal-oxide-semiconductor (Q3) is connected on the first negative pole (DRIVE1-) and second negative pole (DRIVE2-) of coil drive，The drain electrode of the second metal-oxide-semiconductor (Q2) and the 3rd metal-oxide-semiconductor (Q3) is connected to GND；The first coil (L1) of twin coil actuator and first positive pole (DRIVE1+) of the second coil (L2) and the second positive pole (DRIVE2+) are connected to control panel end drive circuit, and first negative pole (DRIVE1-) of first coil (L1) and the second coil (L2) and the second negative pole (DRIVE2-) are connected to drive keyset end drive circuit；

Keyset end logic circuit is driven to be selected a data selector (U1) and the four or eight to select a data selector (U4) by the one or eight, edge D flip-flop (U2) and two inputs form with door (U3), annexation is: the one or eight selects the control end pin 11 of a data selector (U1), pin 10 and pin 9 are connected respectively to the control logic output terminal mouth A0 of the first controller, A1, A2, four or the eight control end pin 11 selecting a data selector (U4), pin 10 and pin 9 are connected respectively to the control logic output terminal mouth B0 of second controller, B1, B2；One or eight selects a data selector (U1) and the four or eight to select data input pin D0～D4, D6 and D7 of a data selector (U4) to be connected to GND, D5 is connected to VCC；One or eight select a data selector (U1) and the four or eight to select the output pin 5 of a data selector (U4) to be connected respectively to two inputs inputs the input with door (U3B) with door (U3A) and two；nullThe pin 4 of edge D flip-flop (U2A) and pin 6 are commonly connected to the control logic output terminal (B3) of second controller，The pin 14 of edge D flip-flop (U2B) and pin 16 are then commonly connected to the control logic output terminal (A3) of the first controller，The output of edge D flip-flop (U2A) is connected to an input pin 1 of two inputs and door (U3A)，The output of edge D flip-flop (U2B) is connected to an input pin 5 of two inputs and door (U3B)，Two inputs are pulled upward to high level by the 7th resistance (R7) and the 8th resistance R8 respectively with pin 1 and the pin 5 of door U3，Two inputs are connected to drive the pin 2 of plate end drive circuit driving chip (U5) with the output pin 3 of door U3A，Two inputs are connected to drive the pin 4 of plate end drive circuit driving chip (U5) with the output pin 6 of door (U3B).

A kind of diesel engine two-node cluster hot backup electronic governor actuator drive circuit the most according to claim 1, it is characterized in that: the control end A0 of a data selector (U1) is selected in described the one or eight, control end A1, control end A2 and connect on the I/O pin of master controller respectively, when three pins of controller export 101, being strobed of D5 data pin, U1 exports high level, the PR of edge D flip-flop U2A and CLK pin connect the B3 pin of second controller, when system is working properly, B3 is low level, edge D flip-flop U2A exports high level, the output of U1 and U2A is connected to coil drive after two inputs with door U3 and selects chip U5, U5 output high level drives metal-oxide-semiconductor Q2, Q2 turns on；Actuator coil L1 connecting line is connected respectively to DRIVE1+ and DRIVE1-, and actuator coil L1 is controlled by the pwm signal of controller 1；Breaking down when controlling loop 1, the I/O pin B3 of second controller is high level by low level upset, when the CLK pin of U2A has a rising edge, then output pin Q is locked as identical with pin D, and pin D ground connection, ground, edge trigger output low level, two inputs and door U3A output low level, then metal-oxide-semiconductor Q2 cut-off, controls loop 1 and disconnects, passively cutting out of fault loop.

A kind of diesel engine two-node cluster hot backup electronic governor actuator drive circuit the most according to claim 1, it is characterised in that: two inputs are pulled up as high level by pull-up resistor R7 and R8 with 1 pin of door U3A and 5 pin of U3B.

A kind of diesel engine two-node cluster hot backup electronic governor actuator drive circuit the most according to claim 1, it is characterized in that: controller end drive circuit be metal-oxide-semiconductor Q1 be voltage open form, mate the cut-in voltage for metal-oxide-semiconductor Q1 by the resistance of divider resistance R7 and R4, prevent that cut-in voltage is too high with the addition of Zener diode Z1 on circuit.

A kind of diesel engine two-node cluster hot backup electronic governor actuator drive circuit the most according to claim 1, it is characterised in that: drive metal-oxide-semiconductor Q2 and Q3 in keyset end drive circuit be in when fault-free and turn on.