CN112701072B - Wafer processing apparatus and wafer defect evaluation method - Google Patents
Wafer processing apparatus and wafer defect evaluation method Download PDFInfo
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- CN112701072B CN112701072B CN202110317141.6A CN202110317141A CN112701072B CN 112701072 B CN112701072 B CN 112701072B CN 202110317141 A CN202110317141 A CN 202110317141A CN 112701072 B CN112701072 B CN 112701072B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
Abstract
The invention discloses a wafer processing device and a wafer defect evaluation method, wherein the wafer processing device comprises an electrolytic bath, a power supply, an electrolytic cathode, an electrolytic anode and a support, the electrolytic cathode, the electrolytic anode and the support are arranged in the electrolytic bath, the power supply supplies power to the electrolytic cathode and the electrolytic anode, the electrolytic cathode is arranged on the support, the electrolytic cathode arranged on the support can be in contact with at least two wafers, the electrolytic anode is not in contact with the wafers, an electrolyte solution can be contained in the electrolytic bath, and the electrolytic cathode, the electrolytic anode and the wafers are positioned in the electrolyte solution. The wafer processing device and the wafer defect evaluation method provided by the invention can effectively improve the processing quantity of the wafers to be tested, do not influence the copper deposition effect and the experimental conditions, and can ensure the accuracy of the experimental result.
Description
Technical Field
The invention relates to the technical field of wafer production and manufacturing, in particular to a wafer processing device and a wafer defect evaluation method.
Background
In the manufacturing process of semiconductor silicon wafers, the quality of the single Crystal silicon rod determines the quality of the silicon wafer, and thus, it is very important to improve the quality of the single Crystal silicon rod, and a number of grown-in defects are generated during the Crystal pulling process, which may be classified into Crystal Originated Particle (COP) defects, Flow Pattern Defects (FPD), Laser Scattering Tomography Defects (LSTD), and Direct Surface Oxide Defects (DSOD) according to various detection methods. The size of COP, FPD, LSTD, DSOD defects decreases in order. These defects have a serious adverse effect on the subsequent production of semiconductor devices from silicon wafers, and therefore, the reduction of the grown-in defects in the process of pulling a single crystal silicon rod is a key link for improving the quality of the silicon wafers.
With the rapid development of integrated circuits, the feature line width is reduced from the original 28nm to 7nm, and at present, the feature line width of components and devices adopted in the field of microelectronics is developing to a process below 2nm, which puts higher requirements on wafer substrates. This requires development of a method for evaluating the presence of void-type grown-in microdefects in large-diameter czochralski silicon to a smaller size. In the case of a cavity-type primary microdefect size of 20nm or less (below the detection limit of the Particle counter instrument), the DSOD detection method is the most effective and sensitive method for evaluating the cavity-type primary microdefects.
The DSOD test is a method for testing small-size COP distribution, and the DSOD detection method specifically comprises the following operations: carrying out high-temperature thermal oxidation on the prepared polished wafer to grow an oxide film with a specific thickness; etching the local oxide film on the back of the wafer by using HF acid to achieve the purpose of electric conduction; cleaning and drying the etched wafer; a dummy wafer (a debugging-level polished silicon wafer) is adopted to ensure that enough copper ions exist in the electrolyte solution; carrying out copper precipitation on the wafer to be evaluated; and finally, evaluating the wafer defects through the quantity and distribution of copper deposited on the wafer defect parts. Therefore, for small-sized grown-in defects, the accuracy of the DSOD detection result is of great significance to the evaluation of the wafer quality.
The existing wafer processing device comprises an electrolytic bath, an electrolytic anode (a pure copper plate) and an electrolytic cathode (a gold-plated plate) which are arranged in the electrolytic bath, when copper deposition is carried out on a wafer to be detected, firstly, the dummy wafer with a locally-removed back film is placed in the electrolytic bath (with the front side facing upwards), the front side of the dummy wafer is not in contact with the anode, the back side of the dummy wafer is tightly attached to the electrolytic cathode, the anode, the dummy wafer and the cathode are completely immersed in an electrolyte solution, external voltage is applied to the anode and the cathode, the electrolytic anode copper plate enables enough copper ions to be contained in the electrolyte solution, then the dummy wafer is taken out, the wafer to be detected is arranged in the same position of the dummy wafer in the electrolytic bath, and external voltage is applied to the anode and the cathode, so that copper is deposited on a defect part of the wafer to be detected.
However, the existing wafer processing device has a small number of wafers to be tested which can be processed by each electrolytic solution, and if the processing number of the wafers to be tested is increased, the copper deposition effect and the experimental conditions are affected, and the accuracy of the experimental result cannot be ensured.
Disclosure of Invention
The invention aims to provide a wafer processing device, which can effectively improve the processing quantity of wafers to be detected, does not influence the copper deposition effect and experimental conditions, and can ensure the accuracy of experimental results.
In order to achieve the purpose, the invention provides a wafer processing device which comprises an electrolytic bath, a power supply, an electrolytic cathode, an electrolytic anode and a support, wherein the electrolytic cathode, the electrolytic anode and the support are arranged in the electrolytic bath, the power supply supplies power to the electrolytic cathode and the electrolytic anode, the electrolytic cathode is arranged on the support, the electrolytic cathode arranged on the support can be in contact with at least two wafers, the electrolytic anode is not in contact with the wafers, an electrolyte solution can be contained in the electrolytic bath, and the electrolytic cathode, the electrolytic anode and the wafers are positioned in the electrolyte solution.
Preferably, the support comprises a boss mounted on the electrolytic cell, a groove is arranged on the upper surface of the boss, the wafer can be placed on the groove, the electrolytic cathode is placed on the upper surface of the boss and can be in contact with the wafer placed in the groove of the boss, and another wafer can be placed on the upper surface of the electrolytic cathode.
Preferably, a wafer accommodating groove is formed in the upper surface of the electrolytic cathode, and a wafer can be accommodated in the wafer accommodating groove.
Preferably, the support comprises a first connecting ring, a second connecting ring, a support rod and at least two mounting assemblies, the support rod is connected with the first connecting ring and the second connecting ring, each mounting assembly comprises a connecting rod, the outer end of each connecting rod is fixedly connected to the corresponding support rod, each mounting assembly is provided with an electrolytic cathode, each electrolytic cathode is mounted on the corresponding connecting rod, and each electrolytic cathode can be used for placing a wafer.
Preferably, the mounting assembly further comprises a clamping plate, the clamping plate is mounted on the supporting rod, and the wafer is placed between the connecting rod and the clamping plate.
Preferably, there are two of the electrolysis anodes, and the two electrolysis anodes are respectively arranged at the upper side and the lower side of the bracket.
Preferably, the electrolyte solution is methanol, ethanol, ultrapure water or isopropene; the electrolytic cell and the bracket are made of PFA or PTFE materials.
The wafer processing device is different from the prior art in that the electrolytic cathode is arranged on the support and can be in contact with at least two wafers, so that in the process of enabling enough copper ions to be in the electrolyte solution, a plurality of dummy wafers can be placed in each time, the time for the copper ions in the electrolyte solution to reach the preset threshold value can be effectively reduced, when copper deposition is carried out on the wafer to be detected, a plurality of wafers to be detected can be placed in the wafer processing device, and therefore the processing quantity of the wafers to be detected can be increased within the electrolyte use time range. Because the number of wafers to be tested which can be processed by each bath of electrolyte solution depends on the using time of the electrolyte solution and the copper ion content in the electrolyte solution, the using time of the electrolyte solution includes that enough copper ions are deposited from the dummy wafers to the defect parts of the wafers to be tested, if the using time of the previous process is long, the copper deposition cannot be continued to the defect parts of the wafers to be tested even if enough copper ions are in the solution in the next process, but the time exceeds the using time range of the electrolyte, because the electrolyte usually has volatility, the copper deposition effect and the experimental conditions can be influenced by the too long time, and the accuracy of the experimental result cannot be ensured. Therefore, the wafer processing device provided by the invention can effectively improve the processing quantity of the wafers to be tested, does not influence the copper deposition effect and the experimental conditions, and can ensure the accuracy of the experimental result.
Another objective of the present invention is to provide a method for evaluating wafer defects, which can effectively increase the number of wafers to be tested, and ensure the accuracy of experimental results.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
a wafer defect evaluation method is characterized by comprising the following steps:
s10, preparing a wafer to be tested and a dummy wafer;
s20, putting the dummy wafer into the wafer processing device to enable the electrolyte solution in the wafer processing device to have set copper ions, and then taking out the dummy wafer;
s30, placing the wafer to be detected into the wafer processing device, and carrying out copper precipitation on the defect part of the wafer to be detected;
and S40, taking out the wafer to be detected, and observing and evaluating the DSOD defects on the front surface of the wafer to be detected.
Preferably, in step S10, the preparing the wafer to be tested includes: preparing a bare wafer by using the single crystal silicon rod; carrying out heat treatment on the bare wafer at 950-1050 ℃ to grow an oxide film with the thickness of 100 and 1000 angstroms on the surface of the bare wafer; etching the local area oxide film on the back surface of the wafer by using 40% -60% of HF acid, washing the HF acid remained on the surface of the wafer by using deionized water, and drying by using an argon gun.
Preferably, in the step S20, the step of providing the electrolyte solution in the wafer processing apparatus with the set copper ions includes: the resistivity of the electrolyte solution is monitored in real time, and when the resistivity in the electrolyte solution rises to a set value, the electrolyte solution has set copper ions therein.
The wafer defect evaluation method provided by the invention can effectively improve the processing quantity of the wafers to be tested, and simultaneously ensure the accuracy of the experimental result.
Drawings
FIG. 1 is a schematic view of a wafer processing apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a wafer processing apparatus according to another embodiment of the present invention;
FIG. 3 is a schematic structural view (front view) of the bracket of FIG. 2;
FIG. 4 is a schematic structural view (top view) of the bracket of FIG. 2;
FIG. 5 is a schematic view of a wafer processing apparatus according to yet another embodiment of the present invention;
FIG. 6 is a schematic flow chart of a wafer defect evaluation method according to the present invention;
FIG. 7 is a diagram illustrating the result of detecting the grown-in defects in the wafer under test.
In the drawings, the components represented by the respective reference numerals are listed below:
1-an electrolytic cell; 2-a power supply; 3-an electrolyte solution; 4-an electrolytic anode; 5-boss; 6-a wafer; 7-an electrolytic cathode; 71-a connecting rod; 72-circular electrode; 81-support bar; 82-a first connecting ring; 83-second connecting ring; 84-card.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
The inventor finds that the quantity of wafers to be tested which can be processed by each bath of electrolyte solution in the wafer processing device depends on the using time of the electrolyte solution and the content of copper ions in the electrolyte solution, the using time of the electrolyte solution is from sufficient copper ions in the electrolyte solution to copper deposition at the defect part of the wafer to be tested by using a dummy wafer, if the previous process is long, the copper deposition at the defect part of the wafer to be tested cannot be continued even if sufficient copper ions are in the solution in the next process, but the time exceeds the range, because the electrolyte is generally volatile, the copper deposition effect and the experimental conditions are affected by too long time, and the accuracy of the experimental result cannot be ensured.
When the dummy wafers are adopted to enable the electrolyte solution to have set (enough) copper ions, if 1 dummy wafer is put into the electrolyte solution every time, the time is required to be about 30 minutes, sometimes, the second or third dummy wafer needs to be put into the electrolyte solution until the copper ions in the electrolyte solution reach the preset threshold value, and therefore the time is required to be 30 minutes to 60 minutes in the whole process of enabling the electrolyte solution to have enough copper ions. When copper is deposited on the defect part of the wafer to be detected, if 1 wafer to be detected is placed, the wafer to be detected needs to be used for about 10-30 minutes; since the electrolyte solution is used for a period of time generally not longer than 2 hours, only 1 to 3 wafers to be tested can be processed by the electrolyte solution per cell.
In the preset time, the dummy wafer is used to ensure that enough copper ions in the electrolyte solution take longer, so that the residual time of the subsequent working procedure is very short; the treatment efficiency is low, and a large amount of test requirements cannot be met; the number of wafers to be tested which can be processed by the electrolyte solution in each tank is small, if the processing number of the wafers to be tested is increased, the copper deposition effect and the experimental conditions are influenced, and the accuracy of the experimental result cannot be ensured; the liquid needs to be changed for many times in a large number of tests, the dummy wafer is reused for copper electrolysis and deposition of the wafer to be tested, the time consumption is long, and the cost is high.
Based on the technical problem, the invention provides a wafer processing device to solve the technical problem, in the preset time, the time for using a dummy wafer to enable enough copper ions in an electrolyte solution to be available can be shortened, enough time is provided for copper deposition of the defect part of the wafer to be tested, and the accuracy of an experimental result is ensured; meanwhile, the two processes can process a plurality of wafers each time, the time consumption of the two processes is shortened, the processing efficiency is improved, the replacement of electrolyte solution is reduced, and the cost and the experiment time are reduced.
Referring to fig. 1 as appropriate, the wafer processing apparatus according to the basic embodiment of the present invention includes an electrolytic bath 1, a power source 2, an electrolytic cathode 7, an electrolytic anode 4, and a support. The electrolytic tank 1 and the bracket can be made of PFA or PTFE materials. PFA is a copolymer of a small amount of perfluoropropyl perfluorovinyl ether with polytetrafluoroethylene; PTFE is a polymer compound obtained by polymerizing tetrafluoroethylene. The power supply 2 is arranged outside the electrolytic bath 1, and the power supply 2 can adopt a constant direct current power supply or an alternating current power supply. The electrolytic anode 4 is a pure copper plate, and the upper and lower surfaces of the electrolytic cathode 7 are all plated with gold plates.
The electrolysis anode 4, the electrolysis cathode 7 and the bracket are arranged in the electrolytic bath 1. The power supply 2 supplies power to the electrolysis cathode 7 and the electrolysis anode 4, and the power supply 2 is connected with the electrolysis cathode 7 and the electrolysis anode 4 through leads. The electrolytic cathode 7 is mounted on the support. The shelf location electrolysis negative pole 7 can with two piece at least wafers 6 contacts, promptly can directly or indirectly place two piece at least wafers 6 (dummy wafer or wafer that awaits measuring) on the support to every wafer 6 homoenergetic can contact with electrolysis negative pole 7. The electrolytic anode 4 is not in contact with the wafer 6, the electrolytic bath 1 can contain an electrolyte solution 3, and the electrolytic anode 4, the electrolytic cathode 7 and the wafer 6 are located in the electrolyte solution 3. The electrolyte solution may be methanol, ethanol, ultrapure water, isopropene or the like, and methanol is preferably used as the electrolyte solution in the present invention.
In use, the wafer processing apparatus provided in the above-described basic embodiment can directly or indirectly place two or more wafers 6 on the support, and each wafer 6 can be in contact with the electrolytic cathode. Because the amount of the wafers to be tested which can be processed by the electrolyte solution 3 in each tank depends on the using time of the electrolyte solution and the copper ion content in the electrolyte solution, the using time of the electrolyte solution includes that enough copper ions are deposited on the defect part of the wafer to be tested by using the dummy wafer, if the using time of the previous process is long, the copper deposition on the defect part of the wafer to be tested cannot be continued even if enough copper ions are in the solution in the next process, but the time exceeds the range, because the electrolyte usually has volatility, the copper deposition effect and the experimental condition can be influenced by too long time, and the accuracy of the experimental result cannot be ensured. In the embodiment, in the process of making there be enough copper ions in the electrolyte solution, multiple dummy wafers can be placed on the support, so that the time for the copper ions in the electrolyte solution 3 to reach the preset threshold value is effectively reduced, when copper deposition is performed on the wafer to be detected, multiple wafers to be detected can be placed on the support, copper deposition is performed on the multiple wafers to be detected, and therefore the processing number of the wafers to be detected can be increased within the long-term range of the electrolyte usage. Therefore, the wafer processing device provided by the invention can effectively improve the processing quantity of the wafers to be tested, does not influence the copper deposition effect and the experimental conditions, and can ensure the accuracy of the experimental result.
In addition to the above embodiments, as shown in fig. 1, a wafer processing apparatus according to an embodiment of the present invention includes an electrolytic bath 1, a power source 2, an electrolytic cathode 7, an electrolytic anode 4, and a holder. The electrolytic anode 4, the electrolytic cathode 7 and the bracket are arranged in the electrolytic tank 1, the power supply 2 supplies power to the electrolytic cathode 7 and the electrolytic anode 4, and the electrolytic cathode 7 is arranged on the bracket. The support comprises a boss 5 arranged on the electrolytic cell 1, a groove is arranged on the upper surface of the boss 5, the wafer 6 can be placed on the groove, the boss 5 can be of an annular integrated structure, and can also comprise a plurality of parts, and the plurality of parts are encircled to form an annular shape. The boss 5 can be fixed on the wall of the electrolytic tank 1, or a mounting table is arranged on the wall of the electrolytic tank 1, and the boss 5 is fixedly placed on the mounting table.
The electrolytic cathode 7 is placed on the upper surface of the boss 5 and can be in contact with the wafer 6 placed in the groove of the boss 5, and another wafer 6 can be placed on the upper surface of the electrolytic cathode 7. The electrolysis anode 4 is not in contact with the wafer 6, the electrolytic solution 3 can be contained in the electrolytic cell 1, the electrolysis anode 4, the electrolysis cathode 7 and the wafer 6 are located in the electrolytic solution 3, and the electrolytic solution 3 is methanol solution.
When the wafer processing device is used for placing the wafer 6, two dummy wafers or two wafers to be tested can be placed at one time, specifically, one dummy wafer or wafer to be tested can be placed in the groove on the boss 5 at first, the back (one surface with the oxidation film removed locally) of the dummy wafer or wafer to be tested faces upwards, the electrolytic cathode 7 is placed on the boss 5, the electrolytic cathode 7 is in close contact with the back of the dummy wafer or wafer to be tested placed on the boss 5 at the moment, then the other dummy wafer or wafer to be tested is placed on the electrolytic cathode 7, and the back of the dummy wafer or wafer to be tested faces downwards and is in close contact with the upper surface of the electrolytic cathode 7.
When the wafer processing device provided by the embodiment is used, two dummy wafers with oxide films partially removed from the back surfaces are firstly placed, then preset external voltage is applied to the electrolytic anode 4 and the electrolytic cathode 7, so that enough copper ions exist in the electrolyte solution 3, the resistivity of the electrolyte solution 3 is monitored in real time through a resistivity tester and other devices, and when the resistivity in the electrolyte solution reaches a critical value, the dummy wafers are taken out and naturally dried to observe the distribution quantity and the morphology of the DSOD on the front surfaces of the dummy wafers; then, 1 or 2 wafers to be detected with the oxide films partially removed on the back surfaces can be placed according to requirements, another preset external voltage is applied to the electrolytic anode 4 and the electrolytic cathode 7, copper ions are deposited on the defect parts of the wafers to be detected, the time is about 10-30 minutes when the time is needed, meanwhile, the resistivity of the electrolyte solution is monitored in real time, the resistivity of the electrolyte solution is not less than the resistivity of methanol, and otherwise, the copper deposition needs to be stopped. Wherein the total time of the two processes does not exceed the preset time, both conditions must be met, and the electrolyte solution needs to be replaced again.
In the process of using the dummy wafer to enable enough copper ions in the electrolyte solution, a pure copper plate (an electrolysis anode) electrolyzes the copper ions, the copper ions in the solution begin to increase, and copper deposition is carried out on the defect part of the dummy wafer, so that the content of the copper ions in the solution is increased to a critical value and then is kept stable or reduced, the content of the copper ions in the solution is evaluated by measuring the resistivity of the electrolyte solution, and the more the content of the copper ions is, the higher the resistivity of the electrolyte solution is; when copper deposits on the defect part of the wafer to be detected, copper ions in the electrolyte solution are gradually reduced, and the resistivity of the electrolyte solution is reduced.
In the present embodiment, the power supply 2 may adopt a constant direct current power supply or an alternating current power supply; the electrolytic anode 4 is a pure copper plate, and the upper and lower surfaces of the electrolytic cathode 7 are both gold-plated plates; the electrolyte solution 3 can also adopt solutions such as ethanol, ultrapure water or isopropene; the electrolytic cell 1 and the boss 5 may be made of PFA or PTFE.
In this embodiment, the two electrolysis anodes 4 are preferably two, the two electrolysis anodes 4 are respectively located at the upper side and the lower side of the electrolysis cathode 7, and the distance from the electrolysis anode 4 at the upper side to the upper surface of the wafer 6 at the upper side is equal to the distance from the electrolysis anode 4 at the lower side to the lower surface of the wafer 6 at the lower side, so that the same electric field is maintained from top to bottom, and the copper deposition effect of the upper wafer 6 and the lower wafer 6 is ensured to have better uniformity.
In addition to the above embodiment, it is preferable that, as shown in fig. 1, a wafer accommodating groove is formed on the upper surface of the electrolytic cathode 7, and the wafer 6 can be accommodated in the wafer accommodating groove.
As shown in FIG. 2, the present invention also provides a wafer processing apparatus, which comprises an electrolytic bath 1, a power supply 2, an electrolytic cathode 7, an electrolytic anode 4 and a support. The electrolytic anode 4, the electrolytic cathode 7 and the bracket are arranged in the electrolytic tank 1, the power supply 2 supplies power to the electrolytic cathode 7 and the electrolytic anode 4, and the electrolytic cathode 7 is arranged on the bracket.
As shown in fig. 3, the bracket includes a first connection ring 82, a second connection ring 83, a support rod 81, and at least two mounting assemblies, the support rod 81 connecting the first connection ring 82 and the second connection ring 83. Specifically, the first connection ring 82 and the second connection ring 83 are respectively located at the top and the bottom of the support rod 81, one side (outer side) of the lower surface of the first connection ring 82 and the upper surface of the second connection ring 83 away from the center of the circle is fixedly connected with the support rod 81, the first connection ring 82 and the second connection ring 83 are parallel to each other, and the support rod 81 is perpendicular to both the first connection ring 82 and the second connection ring 83. The support rods 81 may be multiple, preferably three, as shown in fig. 4 (x axis and y axis are shown in fig. 4), wherein one support rod 81 is located on the y axis passing through the center of the circle, and the other two support rods 81 are oppositely arranged about the y axis and located on the side of the x axis away from the first support rod 81.
The installation component comprises a connecting rod 71, the outer end of the connecting rod 71 is fixedly connected to the supporting rod 81, each installation component is provided with an electrolytic cathode 7, the electrolytic cathode 7 is installed on the connecting rod 71, and each electrolytic cathode 7 can be provided with a wafer 6. The number of the connecting rods 71 may be multiple, and preferably, as shown in fig. 4, the number of the connecting rods 71 is three, the outer end of each connecting rod 71 is fixed on one supporting rod 81, the upper surfaces of the three connecting rods 71 are on the same horizontal plane, and the electrolytic cathode 7 is fixed at the inner end of the three connecting rods 71. The electrolytic cathode 7 is preferably a circular electrode 72.
The electrolysis anode 4 is not in contact with the wafer 6, the electrolytic solution 3 can be contained in the electrolytic cell 1, the electrolysis anode 4, the electrolysis cathode 7 and the wafer 6 are located in the electrolytic solution 3, and the electrolytic solution 3 is methanol solution.
On the basis of the above embodiment, preferably, as shown in fig. 3, the mounting assembly further includes a clamping plate 84, the clamping plate 84 is mounted on the supporting rod 81, and the wafer 6 is placed between the connecting rod 71 and the clamping plate 84. The number of the clamping plates 84 may be multiple, preferably the same as that of the connecting rods 71, one clamping plate 84 is arranged above each connecting rod 71, one end of each clamping plate 84 is horizontally and fixedly connected with the inner side of the supporting rod 81, the other end of each clamping plate 84 extends inwards along the horizontal direction, and the distance between each clamping plate 84 and each connecting rod 71 is slightly larger than the thickness of the wafer 6, so that the wafer 6 can be better supported and clamped, and the wafer 6 is prevented from shaking.
In the present embodiment, the power supply 2 may adopt a constant direct current power supply or an alternating current power supply; the electrolytic anode 4 is a pure copper plate, and the upper and lower surfaces of the electrolytic cathode 7 are both gold-plated plates; the electrolyte solution 3 can also adopt solutions such as ethanol, ultrapure water or isopropene; the electrolytic bath 1, the support rod 81, the first connecting ring 82, the second connecting ring 83 and the clamping plate 84 can be made of PFA or PTFE. Wherein the diameter of the circular electrode is larger than the area of the back surface of the wafer, wherein the oxide film is partially removed; the number of the mounting assemblies is two, three, four or more, and the number of the mounting assemblies is determined according to the maximum number of wafers required to be placed by the wafer processing device. A lead is provided in the connecting rod 71; or made of conductive material, the surface of the connecting rod 71 is plated with gold, and a lead wire can be arranged in the supporting rod 81 and connected with the circular electrode 72 through the connecting rod 71.
Above-mentioned wafer processing apparatus can once place multiple dummy wafer or the wafer that awaits measuring as required when placing wafer 6, and every dummy wafer or the wafer that awaits measuring are placed on an electrolysis negative pole 7 (the upper surface of electrolysis negative pole can be on same horizontal plane with the upper surface of connecting rod, and the wafer contacts with connecting rod and electrolysis negative pole simultaneously promptly).
When the wafer processing device provided by the embodiment is used, 1 to 3 dummy wafers with oxide films partially removed from the back surfaces are firstly placed, then preset external voltage is applied to the electrolytic anode 4 and the electrolytic cathode 7, so that enough (set) copper ions are contained in the electrolyte solution, the resistivity of the electrolyte solution is monitored in real time through a resistivity tester and other devices, when the resistivity of the electrolyte solution reaches a critical value, the dummy wafers are taken out, and the distribution quantity and the morphology of the DSOD on the front surfaces of the dummy wafers are naturally dried and observed; and then placing 1-3 wafers to be detected with the oxide films partially removed on the back surfaces of the wafers to be detected according to the requirements, applying another preset external voltage to the electrolytic anode 4 and the electrolytic cathode 7 to enable copper ions to be deposited on the defect parts of the wafers to be detected for about 10-30 minutes, and simultaneously monitoring the resistivity of the electrolyte solution in real time, wherein the resistivity of the electrolyte solution is not less than that of methanol, otherwise, the copper deposition needs to be stopped. Wherein the total time of the two processes does not exceed the preset time, both conditions must be met, and the electrolyte solution needs to be replaced again.
In this embodiment, the number of the electrolysis anodes 4 may be one or two. As shown in fig. 2, when there is one electrolytic anode 4, the electrolytic anode 4 may be disposed on the upper side of the rack, and the distance from the electrolytic anode 4 to the electrolytic cathode 7 on the lower surface of each wafer layer is different, when there are three mounting assemblies, the thickness of the rack is about 15mm, and the copper deposition effect on each wafer layer is not greatly affected; if more layers (or more layers) of the mounting assembly are arranged, the copper deposition effect of each layer of wafer can be ensured to be consistent by applying voltages with different powers to the electrolytic anode 4 and each layer of electrolytic cathode 7.
In another embodiment of the present invention, as shown in fig. 5, the number of the electrolysis anodes 4 is two, and two electrolysis anodes 4 are respectively disposed at the upper and lower sides of the frame.
The invention also provides a wafer defect evaluation method, as shown in fig. 6, comprising the following steps:
s10, preparing a wafer to be tested and a dummy wafer;
wherein preparing the wafer to be tested comprises: preparing a bare wafer (polished wafer) by cutting, grinding, polishing and cleaning a silicon single crystal rod; carrying out heat treatment on the bare wafer at 950-1050 ℃ to grow an oxide film with the thickness of 100 and 1000 angstroms on the surface of the bare wafer; and etching the local area oxide film on the back surface of the wafer by using 40% -60% of HF acid (such as HF gas), wherein the wafer has conductivity, and the HF acid remained on the surface of the wafer is washed clean by using deionized water and dried by using an argon gun. The back side of the wafer is used for connecting with the electrolytic cathode.
Wherein the dummy wafer forms an oxide film through a heat treatment mode, HF acid is used for etching the oxide film of the local area on the back surface of the wafer, deionized water is used for washing the HF acid remained on the surface of the wafer, and an argon gun is used for drying the HF acid.
S20, placing the dummy wafer into the wafer processing device of any one of the embodiments, so that the electrolyte solution in the wafer processing device has set copper ions, and then taking out the dummy wafer;
wherein the step of enabling the electrolyte solution in the wafer processing device to have set copper ions comprises the following steps: the resistivity of the electrolyte solution is monitored in real time, with the copper ions set when the resistivity in the electrolyte solution rises to a set value (which may be experimentally determined, or is a maximum critical value).
During the specific operation of this step, the dummy wafer may be placed in the electrolytic cell 1, the back surface of the dummy wafer is in contact with the electrolytic cathode, an electrolyte solution (e.g., methanol solution) is injected into the electrolytic cell 1, the electrolytic anode 4 is completely placed in the electrolyte solution, the electrolytic anode 4 is not in contact with the upper surface of the dummy wafer, a preset external voltage is applied to the electrolytic anode 4 and the electrolytic cathode 7, so that sufficient copper ions are present in the electrolyte solution, the resistivity of the electrolyte solution is monitored in real time, and when the resistivity of the electrolyte solution reaches a critical value, the dummy wafer is taken out. After natural drying, the distribution quantity and the morphology of the DSOD on the front side of the dummy wafer can be observed.
In this step, the pure copper plate used as the electrolytic anode 4 is required to have high cleanliness by adding 1-10% of HNO to the pure copper plate3Cleaning in the solution to remove impurities on the surface of the pure copper plate, and then using deionized water to remove HNO remained on the surface of the wafer3Washing the solution and drying by using an argon gun; similarly, the gold-plated surface of the electrolytic cathode 7 needs to be periodically scrubbed by dust-free cloth soaked with isopropanol, so that the conductivity is improved; the electrolytic cell 1 was cleaned and then wiped dry with a dust-free cloth.
S30, placing the wafer to be detected into the wafer processing device, and carrying out copper precipitation on the defect part of the wafer to be detected;
specifically, at least 1 wafer to be detected with the oxide film partially removed on the back is placed according to the requirement, the back of the wafer to be detected is in contact with an electrolytic cathode 7, another preset external voltage is applied to an electrolytic anode 4 and the electrolytic cathode 7, copper ions are deposited on the defect part of the wafer to be detected, the time is about 10-30 minutes when the wafer to be detected needs to be used, meanwhile, the resistivity of an electrolyte solution needs to be monitored in real time, the resistivity of the electrolyte solution is not less than the resistivity of methanol, and otherwise, the copper deposition needs to be stopped.
And S40, taking out the wafer to be detected, and observing and evaluating the DSOD defects of the wafer to be detected.
Specifically, the wafer to be measured is taken out, and after the wafer is naturally dried, the distribution quantity and the morphology of the DSOD defects on the front surface of the wafer are observed through a microscope, a mapping graph (defect distribution) of the wafer defects can be observed through naked eyes, and as shown in fig. 7, the DSOD defects that can be seen are counted and counted through the microscope.
Comparing the mapping graph of the DSOD defect with the mapping graph measured by a Particle counter, wherein the mapping graph and the mapping graph are highly overlapped, and the DSOD method is used for evaluating the wafer defect with high accuracy.
The wafer defect evaluation method can count and evaluate the wafer defects, improve the processing efficiency and save the cost.
In summary, due to the adoption of the technical scheme, compared with the prior art, the invention has the following beneficial effects:
1. within a preset time, the duration of enabling the electrolyte solution to have enough (set) copper ions by using the dummy wafer is shortened, and enough time is provided for copper deposition of the defect part of the wafer to be detected.
2. The two processes can process a plurality of wafers each time, the time used by the two processes is shortened, and the processing efficiency is improved.
3. The replacement of electrolyte solution is reduced, and the cost and the experimental time are reduced.
4. The two procedures are shortened in use, electrolyte volatilization is reduced, the influence on the copper deposition effect is reduced, the experimental conditions are stabilized, and the accuracy of the experimental result is ensured.
In the description of the present invention, it is to be understood that the terms "inside", "outside", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the device referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "disposed," "connected," and the like are to be construed broadly and can include, for example, fixed connections, removable connections, integral connections, or the presence of intervening components. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and not to be construed as limiting the present invention, and those skilled in the art can make changes, modifications, substitutions and alterations to the above embodiments within the scope of the present invention.
Claims (6)
1. A wafer processing device is characterized by comprising an electrolytic bath (1), a power supply (2), an electrolytic cathode (7), an electrolytic anode (4) and a support, wherein the electrolytic cathode (7), the electrolytic anode (4) and the support are arranged in the electrolytic bath (1), the power supply (2) supplies power to the electrolytic cathode (7) and the electrolytic anode (4), the electrolytic cathode (7) is arranged on the support, the electrolytic cathode (7) arranged on the support can be contacted with two wafers (6), the support comprises a boss (5) arranged on the electrolytic bath (1), a groove is arranged on the upper surface of the boss (5), the wafers (6) can be arranged on the groove, the electrolytic cathode (7) is arranged on the upper surface of the boss (5) and can be contacted with the wafers (6) arranged in the groove of the boss (5), another wafer (6) can be placed on the upper surface of the electrolytic cathode (7), a wafer accommodating groove is formed in the upper surface of the electrolytic cathode (7), the wafer (6) can be accommodated in the wafer accommodating groove, the electrolytic anode (4) is not in contact with the wafer (6), the electrolytic solution (3) can be accommodated in the electrolytic tank (1), and the electrolytic cathode (7), the electrolytic anode (4) and the wafer (6) are located in the electrolytic solution (3).
2. The wafer processing apparatus according to claim 1, wherein there are two of the electrolytic anodes (4), and the two electrolytic anodes (4) are respectively disposed at an upper side and a lower side of the rack.
3. The wafer processing apparatus according to claim 2, wherein the electrolyte solution is methanol, ethanol, ultrapure water, or isopropene; the electrolytic tank (1) and the support are made of PFA or PTFE materials.
4. A wafer defect evaluation method is characterized by comprising the following steps:
s10, preparing a wafer to be tested and a debugging-level polished silicon wafer;
s20, placing the debugging-level polished silicon wafer into the wafer processing device according to any one of claims 1-3, so that the electrolyte solution in the wafer processing device has set copper ions, and then taking out the debugging-level polished silicon wafer;
s30, placing the wafer to be detected into the wafer processing device, and carrying out copper precipitation on the defect part of the wafer to be detected;
and S40, taking out the wafer to be detected, and observing and evaluating the DSOD defects of the wafer to be detected.
5. The wafer defect evaluation method of claim 4, wherein the step S10, the preparing the wafer to be tested comprises: preparing a bare wafer by using the single crystal silicon rod; carrying out heat treatment on the bare wafer at 950-1050 ℃ to grow an oxide film with the thickness of 100 and 1000 angstroms on the surface of the bare wafer; etching the local area oxide film on the back surface of the wafer by using 40% -60% of HF acid, washing the HF acid remained on the surface of the wafer by using deionized water, and drying by using an argon gun.
6. The wafer defect evaluation method according to claim 5, wherein the step of providing the electrolyte solution in the wafer processing apparatus with the predetermined copper ions in step S20 comprises: the resistivity of the electrolyte solution is monitored in real time, and when the resistivity in the electrolyte solution rises to a set value, the electrolyte solution has set copper ions therein.
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