CN112614780A - Wafer spike annealing monitoring method - Google Patents
Wafer spike annealing monitoring method Download PDFInfo
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- CN112614780A CN112614780A CN202011483367.5A CN202011483367A CN112614780A CN 112614780 A CN112614780 A CN 112614780A CN 202011483367 A CN202011483367 A CN 202011483367A CN 112614780 A CN112614780 A CN 112614780A
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- 238000000034 method Methods 0.000 title claims abstract description 38
- 238000000137 annealing Methods 0.000 title claims abstract description 36
- 238000012544 monitoring process Methods 0.000 title claims abstract description 35
- 238000009826 distribution Methods 0.000 claims abstract description 19
- 238000012545 processing Methods 0.000 claims abstract description 15
- 229910052736 halogen Inorganic materials 0.000 claims description 19
- 150000002367 halogens Chemical class 0.000 claims description 18
- 238000010438 heat treatment Methods 0.000 claims description 18
- 239000000523 sample Substances 0.000 claims description 15
- 238000010586 diagram Methods 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 claims description 3
- 239000000835 fiber Substances 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims description 3
- 238000012935 Averaging Methods 0.000 abstract 1
- 238000003672 processing method Methods 0.000 abstract 1
- 238000005259 measurement Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 125000005843 halogen group Chemical group 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67276—Production flow monitoring, e.g. for increasing throughput
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/24—Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
Abstract
The invention discloses a monitoring method for wafer spike annealing, which specifically comprises the following steps: placing the annealed wafer on a resistance value measuring device to measure the resistance of the wafer, wherein the resistance measuring method is linear scanning and a group of resistance value data which are symmetrical about the central line of the wafer are obtained; carrying out data processing on the resistance value data, wherein the data processing method is centrosymmetric addition and averaging; drawing a discrete distribution map according to the processed data, wherein the positions of deviation points are non-uniform annealing points so as to realize the monitoring of the annealing of the wafer, and the deviation points are points deviating from the integral trend of the discrete distribution map; the monitoring method aims to effectively monitor the uniformity of wafer annealing and adjust equipment according to monitoring data.
Description
Technical Field
The invention relates to the field of monitoring methods of semiconductor manufacturing processes, in particular to a monitoring method of wafer spike annealing.
Background
With the development of the semiconductor industry, integrated circuits are developed toward small size, high speed, and low power consumption. Particularly, as the feature size of semiconductor devices is scaled down, the lateral and longitudinal diffusion of the dopant elements after annealing is required to be reduced, and the junction depth is required to be shallow. In order to control the diffusion of the dopant element and obtain a shallow junction depth, a spike anneal is a commonly used anneal process. The peak annealing process is to rapidly raise the temperature of the wafer to 900-1200 ℃ by using a heated heat source and then rapidly lower the temperature, wherein the whole process lasts for about 1.5 seconds.
For the spike anneal process, the mainstream equipment in the industry uses a wafer ring to support the wafer, please refer to fig. 1, in which fig. 1 is a schematic diagram of the center point of the temperature distribution of the prior art ring (point O2) coinciding with the center point of the wafer (point O1). When the peak annealing process is executed, the mechanical arm firstly transmits the wafer to the target position of the supporting ring, the heating unit heats the front surface of the wafer, and meanwhile, the wafer supporting ring drives the wafer to rotate at a certain speed so as to ensure the uniformity of annealing.
However, factors that affect the temperature distribution of the ring are: the structure shape of the supporting ring, the structure shape of a transmission device driving the supporting ring to rotate, the annealing time of the wafer, the diameter of the wafer, the thickness of the wafer, the rotating speed of the supporting ring and the like, so that the temperature distribution rule of the supporting ring is changed along with different processing technologies, the central point of the temperature distribution is also changed along with different processing technologies, and when the central point of the wafer and the temperature distribution central point of the supporting ring deviate (as shown in figure 2), the situation that more heat is absorbed from one side of the edge of the wafer, and less heat is absorbed from the other side of the edge of the wafer is caused, and therefore, the situation that the heat loss of the edge of the wafer is asymmetric is caused.
Then, monitoring of wafer uniformity is particularly important. The currently popular uniformity monitoring method comprises the following steps: ion implantation-annealing-measuring the sheet resistance. The cavity heating assembly for the spike annealing is a halogen lamp group distributed in a zone ring shape. The temperature difference between different lamp areas of the cavity can be quickly and intuitively reflected by the linear scanning measurement of the square resistor, and the temperature difference is an important basis for adjusting the temperature of the probe, so that the effective monitoring of the uniformity of the linear scanning is particularly important.
The invention provides a monitoring method of linear scanning, which can effectively ensure the uniformity of peak annealing of a wafer.
Disclosure of Invention
The invention aims to provide a monitoring method for wafer spike annealing, which aims to effectively monitor the uniformity of wafer annealing and adjust equipment according to monitoring data.
In order to achieve the above and other related objects, the present invention provides a monitoring method for wafer spike annealing, which is characterized in that the monitoring method specifically comprises the following steps:
step S1: placing the annealed wafer on a resistance value measuring device to measure the resistance of the wafer, wherein the resistance measuring method is linear scanning and obtaining a group of resistance value data X1, X2... Xn-1 and Xn which are symmetrical about the central line of the wafer;
step S2: carrying out data processing on the resistance value data X1, X2.. (X1+ Xn)/2, (X2+ Xn-1)/2... (Xn-1+ X2)/2, (Xn + X1)/2;
step S3: and drawing a discrete distribution map according to the processed data, wherein the position of a deviation point is an annealing uneven point so as to realize the monitoring of the wafer annealing, and the deviation point is a point deviating from the integral trend of the discrete distribution map.
Preferably, the method further comprises the step S4: and adjusting the mechanical arm according to the deviation point in the discrete distribution diagram, changing the inclination of the wafer, and if the deviation point does not exist, not needing to be adjusted.
Preferably, a ceramic fiber gasket is arranged between the mechanical arm and the wafer.
Preferably, the spike annealing heating component of the wafer is a halogen lamp set.
Preferably, the number of the halogen lamp groups is multiple, and the multiple halogen lamp groups are distributed on the wafer into multiple heating lamp zones.
Preferably, the halogen lamp set in each of the plurality of heating lamp zones is controlled by a temperature control probe for changing the temperature of the halogen lamp set in the heating lamp zone.
Preferably, the method further comprises the step S4: and adjusting the temperature control probe according to the deviation point in the discrete distribution map so as to change the temperature of the halogen lamp group in the heating lamp zone corresponding to the deviation point, wherein the adjustment is not needed if no deviation point exists.
Preferably, the wafer spike annealing mode is annealing after the N-type lightly doped region is formed by N-type ion implantation.
Preferably, the wafer spike anneal temperature is 1050 ℃.
Preferably, a computer system for data processing and a circuit control board for controlling the robotic arm and the temperature controlled probe are included.
In summary, the present invention provides a method for performing centrosymmetric mirror processing on original measurement data of linear scanning, which can significantly eliminate the influence of interference factors, accurately reflect the temperature difference between different lamp regions of a cavity, and realize more effective monitoring of a key process; furthermore, the invention can accurately locate the abnormal position, namely the uneven point, in time according to the data discrete graph and adjust the corresponding position, and the adjusting method mainly comprises the steps of adjusting the wafer placement by the mechanical arm and adjusting the temperature of the lamp area by the temperature control probe; finally, the invention can also comprise a computer system and a circuit control board, the data processing is carried out through the computer system, and the control of the mechanical arm and the temperature control probe is realized through the circuit control board.
Drawings
FIG. 1 is a schematic view of a prior art carrier ring having a center point of temperature distribution (O2 point) coincident with a wafer center point (O1 point).
FIG. 2 is a schematic view of a prior art carrier ring having a temperature distribution center point (point O2) that is not coincident with a wafer center point (point O1).
FIG. 3 is a schematic diagram of wafer spike anneal monitoring and adjustment according to an embodiment of the present invention.
FIG. 4 is a schematic diagram of another wafer spike anneal monitoring and adjustment provided in accordance with an embodiment of the present invention.
FIG. 5 is a graph illustrating a spike anneal resistance dispersion profile for a wafer according to one embodiment of the present invention.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "upper", "lower", "left", "right", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Fig. 3 and 4 are schematic views illustrating monitoring and control of wafer spike annealing according to an embodiment of the present invention, and referring to fig. 3 and 4, the present invention provides a monitoring method of wafer spike annealing, which specifically includes the following steps:
step S1: placing the annealed wafer on a resistance value measuring device to measure the resistance of the wafer, wherein the resistance measuring method is linear scanning and obtaining a group of resistance value data X1, X2... Xn-1 and Xn which are symmetrical about the central line of the wafer;
step S2: carrying out data processing on the resistance value data X1, X2.. (X1+ Xn)/2, (X2+ Xn-1)/2... (Xn-1+ X2)/2, (Xn + X1)/2;
step S3: referring to fig. 5, a discrete distribution map is drawn according to the processed data, and the position of the deviation point is an annealing non-uniform point, so as to monitor the annealing of the wafer.
The monitoring, data processing and analysis of the wafer spike annealing can adjust the equipment according to the analysis of the data, so that the uniformity of the wafer spike annealing is realized.
For example, the following steps can be included: and adjusting the mechanical arm according to the deviation point in the discrete distribution diagram, changing the inclination of the wafer, and if the deviation point does not exist, not needing to be adjusted. A ceramic fiber pad is typically disposed between the robot arm and the wafer.
In addition, for the spike annealed heating element of the wafer, which is generally a halogen lamp set, the number of the halogen lamp sets is multiple, and the multiple halogen lamp sets can be distributed on the wafer into multiple heating lamp zones, so that the halogen lamp set in each heating lamp zone in the multiple heating lamp zones is controlled by a temperature control probe, and the temperature control probe is used for changing the temperature of the halogen lamp set in the heating lamp zone.
Then the next adjustment step may be included: and adjusting the temperature control probe according to the deviation point in the discrete distribution map so as to change the temperature of the halogen lamp group in the heating lamp zone corresponding to the deviation point, wherein the adjustment is not needed if no deviation point exists. The wafer spike annealing mode is generally annealing after an N-type lightly doped region is formed by N-type ion implantation, and the wafer spike annealing temperature is 1050 ℃.
For better data processing and equipment adjustment control, the system generally further comprises a computer system and a circuit control board, wherein the computer system is used for data processing, and the circuit control board is used for controlling the mechanical arm and the temperature control probe.
The invention has the advantages that the central symmetry mirror processing is carried out on the original measurement data of the linear scanning, the influence of interference factors can be obviously eliminated, the temperature difference between different lamp regions of the cavity can be accurately reflected, and the more effective monitoring of the key process can be realized; furthermore, the invention can accurately locate the abnormal position, namely the uneven point, in time according to the data discrete graph and adjust the corresponding position, and the adjusting method mainly comprises the steps of adjusting the wafer placement by the mechanical arm and adjusting the temperature of the lamp area by the temperature control probe; finally, the invention can also comprise a computer system and a circuit control board, the data processing is carried out through the computer system, and the control of the mechanical arm and the temperature control probe is realized through the circuit control board.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example" or "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. And the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A monitoring method for wafer spike annealing is characterized by comprising the following steps:
step S1: placing the annealed wafer on a resistance value measuring device to measure the resistance of the wafer, wherein the resistance measuring method is linear scanning and obtaining a group of resistance value data X1, X2... Xn-1 and Xn which are symmetrical about the central line of the wafer;
step S2: carrying out data processing on the resistance value data X1, X2.. (X1+ Xn)/2, (X2+ Xn-1)/2... (Xn-1+ X2)/2, (Xn + X1)/2;
step S3: and drawing a discrete distribution map according to the processed data, wherein the position of a deviation point is an annealing uneven point so as to realize the monitoring of the wafer annealing, and the deviation point is a point deviating from the integral trend of the discrete distribution map.
2. The wafer spike anneal monitoring method of claim 1, further comprising step S4: and adjusting the mechanical arm according to the deviation point in the discrete distribution diagram, changing the inclination of the wafer, and if the deviation point does not exist, not needing to be adjusted.
3. The wafer spike annealing monitoring method of claim 2 wherein a ceramic fiber shim is disposed between the robot and the wafer.
4. The wafer spike anneal monitoring method of claim 1, wherein the spike anneal heating elements of the wafer are halogen lamp sets.
5. The wafer spike anneal monitoring method of claim 4, wherein the number of the halogen lamp sets is plural, and the plural halogen lamp sets are distributed over the wafer into plural heating lamp zones.
6. The wafer spike anneal monitoring method of claim 5, wherein the halogen lamp sets in each of the plurality of heating lamp zones are controlled by a temperature control probe configured to vary the temperature of the halogen lamp sets in the heating lamp zones.
7. The wafer spike anneal monitoring method of claim 6, further comprising step S4: and adjusting the temperature control probe according to the deviation point in the discrete distribution map so as to change the temperature of the halogen lamp group in the heating lamp zone corresponding to the deviation point, wherein the adjustment is not needed if no deviation point exists.
8. The wafer spike anneal monitoring method of claim 1, wherein the wafer spike anneal is performed by an anneal after N-type ion implantation to form N-type lightly doped regions.
9. The method for monitoring wafer spike anneal of claim 8, wherein the wafer spike anneal temperature is 1050 ℃.
10. The wafer spike annealing monitoring method of any one of claims 2 to 9 comprising a computer system for data processing and a circuit control board for controlling the robot arm and the temperature controlled probe.
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| CN202011483367.5A CN112614780A (en) | 2020-12-16 | 2020-12-16 | Wafer spike annealing monitoring method |
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