CN105609451A - Method for eliminating first ten-wafer effect of flash annealing machine - Google Patents
Method for eliminating first ten-wafer effect of flash annealing machine Download PDFInfo
- Publication number
- CN105609451A CN105609451A CN201610173408.8A CN201610173408A CN105609451A CN 105609451 A CN105609451 A CN 105609451A CN 201610173408 A CN201610173408 A CN 201610173408A CN 105609451 A CN105609451 A CN 105609451A
- Authority
- CN
- China
- Prior art keywords
- wafer
- board
- pieces
- flash
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
Abstract
The invention discloses a method for eliminating the first ten-wafer effect of a flash annealing machine. The method comprises the following steps: S1, arranging a first wafer into a process chamber; S2, heating the first wafer via a flashlight above, and preheating the first wafer at a first temperature via a halogen lamp below; S3, idling the flash annealing machine, and continuously preheating the first wafer at a second temperature via the halogen lamp; S4, arranging a second wafer into the process chamber; and S5, heating the second wafer via the flashlight above, and preheating the second wafer at the first temperature via the halogen lamp below. According to the method, when the flash annealing machine is idle, the halogen lamp is continuously adopted for preheating at the second temperature, and the energy generated by the second temperature of preheating is 50-100% of the energy generated by preheating the second wafer with the halogen lamp at the first temperature, so that the process environment in the chamber can be stabilized, the product yield can be improved and the waste of human resources can be avoided.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, relate in particular to a kind of flash anneal board head ten that eliminatesThe method of piece effect.
Background technology
After traditional ion implantation technology, conventionally all can adopt annealing process come activator impurity and repair fromSon injects the damage that substrate wafer is caused. But, along with being reduced to 40/28, silicon-based devices characteristic size receivesRice, the enhancing of integrated level and complexity, particularly super shallow junction is stricter to the DIFFUSION CONTROLLED of doped chemical,Only use traditional samming annealing (second level) and spike annealing (approximately 1000 milliseconds) can not expireThe requirement of foot heat budget (ThermalBudget), thus cmos device performance affected.
In order to realize the diffusion that reduces impurity in activator impurity, need more advanced annealing technologySupport. The appearance of flash anneal (FlashAnneal, FLA) technology and develop into address the above problem and carrySupply the direction that can select. Flash anneal is to use flash lamp to the crystal column surface heating of glisteningThe Millisecond annealing process of annealing conventionally coordinates spike annealing to use together in super shallow junction annealing process.Spike annealing can activator impurity, but uses after flash anneal technique, and the activity ratio of impurity can obtain againTo improving. Meanwhile, the excessive temperature difference of crystal column surface and wafer rear also can cause huge stress and warpage,And likely cause wafer to break.
In order to reduce the temperature difference of crystal column surface and wafer rear, existing flash anneal board design is at crystalline substanceHigh temperature flash lamp is placed in circle top, below wafer, places and preheats Halogen lamp LED. When annealing machine bench is in the spare timeWhen configuration state, described high temperature flash lamp and described in preheat Halogen lamp LED and be closed condition, processing chamber isCold conditions. In the time that board comes into operation state from idle state, described processing chamber due to annealing operation meeting fromIt is hot that cold conditions gradually becomes, and before hot atmosphere is stable, approximately has the actual annealing temperature meeting of nearly ten pieces of wafersBe affected, cause square resistance resistance and uniformity to occur significantly drift, between sheet and sheet, repeatability existsOn device, cannot accept.
Normally, the technical scheme that industry may adopt is as follows, scheme one: for example, at a box wafer numberBe in the product of 25 pieces, use false sheet (DummyWafer) to fill the position of front 10 pieces of wafers; SideCase two: if board exceedes the scheduled time standby time,, before production, use 10 pieces of debugging falseSheet (SeasoningDummy) carries out preheating. Apparently, such scheme certainly will cause production capacity and manpower moneyThe waste in source, increases production cost.
Seek one and can steady and continuous produce, and process stabilizing, flash anneal process that yield rate is highBecome one of those skilled in the art's technical problem urgently to be resolved hurrily.
Therefore the problem existing for prior art, this case designer relies on the industry experience for many years of being engaged in,Active research improvement, so there has been a kind of method of eliminating the first ten pieces of effects of flash anneal board of the present invention.
Summary of the invention
The present invention be directed in prior art, traditional flash anneal board certainly will be made in the time carrying out annealing processBecome the waste of production capacity and human resources, increasing the defects such as production cost provides a kind of flash anneal board of eliminatingThe method of first ten pieces of effects.
For realizing the present invention's object, the invention provides a kind of flash anneal board first ten pieces of effects eliminatedMethod, a kind of method of eliminating the first ten pieces of effects of flash anneal board, described elimination flash anneal board headThe method of ten pieces of effects, comprising:
Execution step S1: will wait that first wafer of annealing is arranged in processing chamber;
Execution step S2: heat by the flash lamp being arranged on described the first crystal column surface,Preheat with the first temperature by the Halogen lamp LED that is arranged on face under described the first wafer rear.
Alternatively, the method for the first ten pieces of effects of described elimination flash anneal board, comprising:
Performed step S1: will wait that first wafer of annealing is arranged in processing chamber;
Execution step S2: heat by the flash lamp being arranged on described the first crystal column surface,Preheat with the first temperature by the Halogen lamp LED that is arranged on face under described the first wafer rear;
Execution step S3: described flash anneal board is idle, and described Halogen lamp LED continues to enter with the second temperatureRow preheats;
Execution step S4: will wait that second wafer of annealing is arranged in processing chamber;
Execution step S5: heat by the flash lamp being arranged on described the second crystal column surface,Carry out the first temperature and preheat by being arranged on the Halogen lamp LED of face under described the second wafer rear.
Alternatively, described the first wafer has completed ion implantation technology.
Alternatively, idle t >=10min standby time of described flash anneal board.
Alternatively, the time that described flash lamp heats is the arbitrary digital value in 2~50 milliseconds.
Alternatively, the temperature that described flash lamp heats is the arbitrary digital value in 1000~1250 DEG C.
Alternatively, to carry out pre-warmed the first temperature be the arbitrary numeral in 600~800 DEG C to described Halogen lamp LEDValue.
Alternatively, described Halogen lamp LED at flash anneal board when idle, described in the second temperature of preheatingThe Halogen lamp LED that the energy that degree produces is described the second wafer preheats institute's produce power with the first temperature50%~100%.
In sum, the present invention eliminates the method for the first ten pieces of effects of flash anneal board, by described halogenLamp, continues to preheat with the second temperature at described flash anneal board when idle, and described pre-The energy that the second temperature of heating produces is that the Halogen lamp LED of described the second wafer adds in advance with the first temperatureHeat institute is energy-producing 50%~100%, not only can stable cavity chamber processes environment, and improve productYield, avoids the waste of human resources.
Brief description of the drawings
Figure 1 shows that the present invention eliminates the method for the first ten pieces of effects of flash anneal board;
Figure 2 shows that the present invention eliminates the method for the first ten pieces of effects of flash anneal board with standby time.
Detailed description of the invention
By describe in detail the invention technology contents, structural feature, reached object and effect, underFace is in connection with embodiment and coordinate accompanying drawing to be described in detail.
After traditional ion implantation technology, conventionally all can adopt annealing process come activator impurity and repair fromSon injects the damage that substrate wafer is caused. But, along with being reduced to 40/28, silicon-based devices characteristic size receivesRice, the enhancing of integrated level and complexity, particularly super shallow junction is stricter to the DIFFUSION CONTROLLED of doped chemical,Only use traditional samming annealing (second level) and spike annealing (approximately 1000 milliseconds) can not expireThe requirement of foot heat budget (ThermalBudget), thus cmos device performance affected.
In order to realize the diffusion that reduces impurity in activator impurity, need more advanced annealing technologySupport. The appearance of flash anneal (FlashAnneal, FLA) technology and develop into address the above problem and carrySupply the direction that can select. Flash anneal is to use flash lamp to the crystal column surface heating of glisteningThe Millisecond annealing process of annealing conventionally coordinates spike annealing to use together in super shallow junction annealing process.Spike annealing can activator impurity, but uses after flash anneal technique, and the activity ratio of impurity can obtain againTo improving. Meanwhile, the excessive temperature difference of crystal column surface and wafer rear also can cause huge stress and warpage,And likely cause wafer to break.
In order to reduce the temperature difference of crystal column surface and wafer rear, existing board design is to put above waferSet high warm flash lamp, below wafer, place and preheat Halogen lamp LED. When board is during in idle state, instituteState high temperature flash lamp and described in preheat Halogen lamp LED and be closed condition, processing chamber is cold conditions. At boardWhen come into operation state from idle state, processing chamber is because annealing operation meeting gradually becomes hot from cold conditions,Before hot atmosphere is stable, approximately there is the actual annealing temperature of nearly 10 pieces of wafers to be affected, cause squareThere is significantly drift in resistance and uniformity, between sheet and sheet, repeatability cannot be accepted on device.
Normally, the technical scheme that industry may adopt is as follows, scheme one: for example, at a box wafer numberBe in the product of 25 pieces, use false sheet (DummyWafer) to fill the position of front 10 pieces of wafers; SideCase two: if board exceedes the scheduled time standby time,, before production, use 10 pieces of debugging falseSheet (SeasoningDummy) carries out preheating. Apparently, such scheme certainly will cause production capacity and manpower moneyThe waste in source, increases production cost.
Refer to Fig. 1, Figure 1 shows that the present invention eliminates the method for the first ten pieces of effects of flash anneal board. InstituteState the method for eliminating the first ten pieces of effects of flash anneal board, comprising:
Execution step S1: will wait that first wafer of annealing is arranged in processing chamber;
Execution step S2: heat by the flash lamp being arranged on described the first crystal column surface,Preheat with the first temperature by the Halogen lamp LED that is arranged on face under described the first wafer rear.
As detailed description of the invention, without limitation, described the first wafer has completed ion implantation technology.The time that described flash lamp heats is the arbitrary digital value in 2~50 milliseconds, and described flash lamp carries outThe temperature of heating is the arbitrary digital value in 1000~1250 DEG C. Described Halogen lamp LED carries out pre-warmedOne temperature is the arbitrary digital value in 600~800 DEG C.
In order to disclose more intuitively the present invention's technical scheme, highlight the present invention's beneficial effect, existing combinationDetailed description of the invention is example, the present invention is eliminated the first ten pieces of effects of flash anneal board method principle andOperation describes.
In detailed description of the invention, first wafer of enumerating out of the ordinary is for treating for the first time the wafer of PROCESS FOR TREATMENT, andTwo wafers are for treating for the second time the wafer of PROCESS FOR TREATMENT, and process and described second at described the first wafer processBetween wafer process is processed, described flash anneal board has t standby time. , described the first wafer itPROCESS FOR TREATMENT is prior to the PROCESS FOR TREATMENT of described wafer, and processes and described second at described the first wafer processBetween wafer process is processed, described flash anneal board has t standby time. Wherein, described in, treat technique placeThe first wafer of reason and the quantity of the second wafer, priority processing sequence etc., only for enumerating, should not be considered as thisThe restriction of invention technical scheme.
Refer to Fig. 2, and continue to consult Fig. 1, Figure 2 shows that the present invention eliminates the flash of light with standby timeThe method of the first ten pieces of effects of annealing machine bench. The method of the first ten pieces of effects of described elimination flash anneal board, bagDraw together:
Execution step S1: will wait that first wafer of annealing is arranged in processing chamber;
Execution step S2: heat by the flash lamp being arranged on described the first crystal column surface,Preheat with the first temperature by the Halogen lamp LED that is arranged on face under described the first wafer rear;
Execution step S3: described flash anneal board is idle, and described Halogen lamp LED continues to enter with the second temperatureRow preheats;
Execution step S4: will wait that second wafer of annealing is arranged in processing chamber;
Execution step S5: heat by the flash lamp being arranged on described the second crystal column surface,Carry out the first temperature and preheat by being arranged on the Halogen lamp LED of face under described the second wafer rear.
As detailed description of the invention, preferably, t >=10min standby time that described flash anneal board is idle.Described the first wafer has completed ion implantation technology. The time that described flash lamp heats is 2~50 millisecondsInterior arbitrary digital value, the temperature that described flash lamp heats is the arbitrary number in 1000~1250 DEG CWord value. It is the arbitrary digital value in 600~800 DEG C that described Halogen lamp LED carries out pre-warmed the first temperature.Described Halogen lamp LED at flash anneal board when idle, described in the energy that produces of the second temperature of preheatingThat amount is that the Halogen lamp LED of described the second wafer preheats with the first temperature is energy-producing 50%~100%。
As those skilled in the art, hold intelligibly, described Halogen lamp LED is at described flash anneal board placeWhen idle, continue to preheat with the second temperature, and described in the second temperature of preheating produceThat the Halogen lamp LED that energy is described the second wafer preheats with the first temperature is energy-producing 50%~100%, not only can stable cavity chamber processes environment, and improve product yield, avoid human resourcesWaste.
In sum, the present invention eliminates the method for the first ten pieces of effects of flash anneal board, by described halogenLamp, continues to preheat with the second temperature at described flash anneal board when idle, and described pre-The energy that the second temperature of heating produces is that the Halogen lamp LED of described the second wafer adds in advance with the first temperatureHeat institute is energy-producing 50%~100%, not only can stable cavity chamber processes environment, and improve productYield, avoids the waste of human resources.
Those skilled in the art all should be appreciated that, in the situation that not departing from the spirit or scope of the present invention, and canSo that the present invention is carried out to various modifications and variations. Thereby, if any amendment or modification fall into appended rightIn the protection domain of claim and equivalent time, think that the present invention contains these amendments and modification.
Claims (8)
1. a method of eliminating the first ten pieces of effects of flash anneal board, is characterized in that, described elimination is dodgedThe method of the first ten pieces of effects of photo-annealing board, comprising:
Execution step S1: will wait that first wafer of annealing is arranged in processing chamber;
Execution step S2: heat by the flash lamp being arranged on described the first crystal column surface,Preheat with the first temperature by the Halogen lamp LED that is arranged on face under described the first wafer rear.
2. the method for the first ten pieces of effects of elimination flash anneal board as claimed in claim 1, its feature existsIn, the method for the first ten pieces of effects of described elimination flash anneal board, comprising:
Execution step S1: will wait that first wafer of annealing is arranged in processing chamber;
Execution step S2: heat by the flash lamp being arranged on described the first crystal column surface,Preheat with the first temperature by the Halogen lamp LED that is arranged on face under described the first wafer rear;
Execution step S3: described flash anneal board is idle, and described Halogen lamp LED continues to enter with the second temperatureRow preheats;
Execution step S4: will wait that second wafer of annealing is arranged in processing chamber;
Execution step S5: heat by the flash lamp being arranged on described the second crystal column surface,Carry out the first temperature and preheat by being arranged on the Halogen lamp LED of face under described the second wafer rear.
3. the method for the first ten pieces of effects of elimination flash anneal board as claimed in claim 2, its feature existsIn, described the first wafer has completed ion implantation technology.
4. the method for the first ten pieces of effects of elimination flash anneal board as claimed in claim 2, its feature existsIn, t >=10min standby time that described flash anneal board is idle.
5. the method for the first ten pieces of effects of elimination flash anneal board as claimed in claim 2, its feature existsIn, the time that described flash lamp heats is the arbitrary digital value in 2~50 milliseconds.
6. the method for the first ten pieces of effects of elimination flash anneal board as claimed in claim 2, its feature existsIn, the temperature that described flash lamp heats is the arbitrary digital value in 1000~1250 DEG C.
7. the method for the first ten pieces of effects of elimination flash anneal board as claimed in claim 2, its feature existsIn, it is the arbitrary digital value in 600~800 DEG C that described Halogen lamp LED carries out pre-warmed the first temperature.
8. the method for the first ten pieces of effects of elimination flash anneal board as claimed in claim 2, its feature existsIn, described Halogen lamp LED at flash anneal board when idle, described in the second temperature of preheating produceThe energy Halogen lamp LED that is described the second wafer preheat with the first temperature energy-producing 50%~100%。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610173408.8A CN105609451B (en) | 2016-03-24 | 2016-03-24 | A kind of method for eliminating the first ten pieces of effects of flash anneal board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610173408.8A CN105609451B (en) | 2016-03-24 | 2016-03-24 | A kind of method for eliminating the first ten pieces of effects of flash anneal board |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105609451A true CN105609451A (en) | 2016-05-25 |
CN105609451B CN105609451B (en) | 2018-03-30 |
Family
ID=55989266
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610173408.8A Active CN105609451B (en) | 2016-03-24 | 2016-03-24 | A kind of method for eliminating the first ten pieces of effects of flash anneal board |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105609451B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112614780A (en) * | 2020-12-16 | 2021-04-06 | 上海华力微电子有限公司 | Wafer spike annealing monitoring method |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101308667A (en) * | 2007-04-11 | 2008-11-19 | 希捷科技有限公司 | Apparatus with increased magnetic anisotropy and related method |
US20110171365A1 (en) * | 2008-09-12 | 2011-07-14 | Sumitomo Chemical Company, Limited | Method for modifying a transparent electrode film |
CN102427025A (en) * | 2011-08-17 | 2012-04-25 | 上海华力微电子有限公司 | Method for manufacturing DRAM (dynamic random access memory) of gate-last 2 transistor |
CN102427063A (en) * | 2011-07-22 | 2012-04-25 | 上海华力微电子有限公司 | Method of suppressing short-channel effect of CMOS (Complementary Metal Oxide Semiconductor) |
JP2015088223A (en) * | 2013-10-28 | 2015-05-07 | ウシオ電機株式会社 | Double end short arc flash lamp |
-
2016
- 2016-03-24 CN CN201610173408.8A patent/CN105609451B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101308667A (en) * | 2007-04-11 | 2008-11-19 | 希捷科技有限公司 | Apparatus with increased magnetic anisotropy and related method |
US20110171365A1 (en) * | 2008-09-12 | 2011-07-14 | Sumitomo Chemical Company, Limited | Method for modifying a transparent electrode film |
CN102427063A (en) * | 2011-07-22 | 2012-04-25 | 上海华力微电子有限公司 | Method of suppressing short-channel effect of CMOS (Complementary Metal Oxide Semiconductor) |
CN102427025A (en) * | 2011-08-17 | 2012-04-25 | 上海华力微电子有限公司 | Method for manufacturing DRAM (dynamic random access memory) of gate-last 2 transistor |
JP2015088223A (en) * | 2013-10-28 | 2015-05-07 | ウシオ電機株式会社 | Double end short arc flash lamp |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112614780A (en) * | 2020-12-16 | 2021-04-06 | 上海华力微电子有限公司 | Wafer spike annealing monitoring method |
Also Published As
Publication number | Publication date |
---|---|
CN105609451B (en) | 2018-03-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10159112B2 (en) | Wafer holder with tapered region | |
JP2019504493A5 (en) | Substrate doping method, semiconductor device doping method, and substrate doping system | |
WO2003096386A3 (en) | Methods for forming low resistivity, ultrashallow junctions with low damage | |
WO2009075124A1 (en) | Semiconductor device manufacturing method and semiconductor device | |
US7629275B2 (en) | Multiple-time flash anneal process | |
CN105609451A (en) | Method for eliminating first ten-wafer effect of flash annealing machine | |
TW200707551A (en) | Method and apparatus for manufacturing semiconductor wafer | |
CN103227245A (en) | Manufacturing method of PN node of P-type pseudo-single crystal silicon solar cell | |
US8232114B2 (en) | RTP spike annealing for semiconductor substrate dopant activation | |
JP2011166060A5 (en) | Semiconductor device manufacturing method, substrate processing method, substrate processing apparatus and program | |
JP2009529245A5 (en) | ||
CN107742612B (en) | Wafer annealing treatment equipment and annealing treatment method | |
CN105185691A (en) | Method for eliminating first sheet effect | |
TW200603207A (en) | Method for manufacturing semiconductor device (Ⅱ) | |
CN105977153B (en) | Ultra-shallow junctions method for annealing | |
CN101207020B (en) | Method for forming ultra-shallow junction | |
CN103050387B (en) | The ion injection method at the silicon back side | |
TWI623041B (en) | Method and apparatus for processing workpieces | |
CN104810261A (en) | Double-side annealing method and device of semiconductor silicon chip | |
CN104925793A (en) | Method for removing GaN-based compounds on surface of graphite disc | |
JP2017220526A5 (en) | ||
CN103500704A (en) | Ion implantation method for back face of wafer | |
CN102915916A (en) | Semiconductor device and forming method thereof | |
CN106158604B (en) | A kind of phosphorus diffusion method | |
TW201723681A (en) | Photoresist removal apparatus for semiconductor chips comprising a lamp heater arranged at a top of a processing chamber to directly heat a surface of a chip- for removing photoresist |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |