CN112543158A - 64B/66B转换的serdes架构 - Google Patents

64B/66B转换的serdes架构 Download PDF

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Publication number
CN112543158A
CN112543158A CN202011504058.1A CN202011504058A CN112543158A CN 112543158 A CN112543158 A CN 112543158A CN 202011504058 A CN202011504058 A CN 202011504058A CN 112543158 A CN112543158 A CN 112543158A
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CN
China
Prior art keywords
pcs
pma
module
data
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202011504058.1A
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English (en)
Chinese (zh)
Inventor
李宁
宣学雷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Ziguang Tongchuang Electronics Co ltd
Shenzhen Pango Microsystems Co Ltd
Original Assignee
Shenzhen Ziguang Tongchuang Electronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Ziguang Tongchuang Electronics Co ltd filed Critical Shenzhen Ziguang Tongchuang Electronics Co ltd
Priority to CN202011504058.1A priority Critical patent/CN112543158A/zh
Publication of CN112543158A publication Critical patent/CN112543158A/zh
Priority to KR1020237017733A priority patent/KR20230093046A/ko
Priority to PCT/CN2021/082551 priority patent/WO2022126895A1/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
CN202011504058.1A 2020-12-18 2020-12-18 64B/66B转换的serdes架构 Pending CN112543158A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202011504058.1A CN112543158A (zh) 2020-12-18 2020-12-18 64B/66B转换的serdes架构
KR1020237017733A KR20230093046A (ko) 2020-12-18 2021-03-24 64B/66B 변환의 serdes 아키텍처
PCT/CN2021/082551 WO2022126895A1 (zh) 2020-12-18 2021-03-24 64B/66B转换的serdes架构

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011504058.1A CN112543158A (zh) 2020-12-18 2020-12-18 64B/66B转换的serdes架构

Publications (1)

Publication Number Publication Date
CN112543158A true CN112543158A (zh) 2021-03-23

Family

ID=75019055

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011504058.1A Pending CN112543158A (zh) 2020-12-18 2020-12-18 64B/66B转换的serdes架构

Country Status (3)

Country Link
KR (1) KR20230093046A (ko)
CN (1) CN112543158A (ko)
WO (1) WO2022126895A1 (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113904756A (zh) * 2021-10-15 2022-01-07 深圳市紫光同创电子有限公司 基于10Gbase-R协议的以太网系统
WO2022126895A1 (zh) * 2020-12-18 2022-06-23 深圳市紫光同创电子有限公司 64B/66B转换的serdes架构

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6650638B1 (en) * 2000-03-06 2003-11-18 Agilent Technologies, Inc. Decoding method and decoder for 64b/66b coded packetized serial data
CN101610134A (zh) * 2009-07-10 2009-12-23 中兴通讯股份有限公司 64b/66b编解码装置及实现64b/66b编解码的方法
US20150381338A1 (en) * 2014-06-30 2015-12-31 International Business Machines Corporation Latency-optimized physical coding sublayer
CN109962754A (zh) * 2019-02-15 2019-07-02 深圳市紫光同创电子有限公司 适配64b/66b编码的pcs发送装置、接收装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9736086B1 (en) * 2011-04-29 2017-08-15 Altera Corporation Multi-function, multi-protocol FIFO for high-speed communication
CN105681018B (zh) * 2016-01-14 2019-01-15 深圳市紫光同创电子有限公司 数据发送、接收方法和装置及pcs发送和接收设备
US10742782B2 (en) * 2017-05-26 2020-08-11 Xilinx, Inc. Time stamping network device
CN109002409A (zh) * 2017-06-07 2018-12-14 深圳市中兴微电子技术有限公司 一种位宽变换装置及方法
CN112543158A (zh) * 2020-12-18 2021-03-23 深圳市紫光同创电子有限公司 64B/66B转换的serdes架构

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6650638B1 (en) * 2000-03-06 2003-11-18 Agilent Technologies, Inc. Decoding method and decoder for 64b/66b coded packetized serial data
CN101610134A (zh) * 2009-07-10 2009-12-23 中兴通讯股份有限公司 64b/66b编解码装置及实现64b/66b编解码的方法
US20150381338A1 (en) * 2014-06-30 2015-12-31 International Business Machines Corporation Latency-optimized physical coding sublayer
CN109962754A (zh) * 2019-02-15 2019-07-02 深圳市紫光同创电子有限公司 适配64b/66b编码的pcs发送装置、接收装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
十二点过九分: "10G以太网接口（二）：接口的基本结构", 《知乎HTTPS://ZHUANLAN.ZHIHU.COM/P/97792312》 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022126895A1 (zh) * 2020-12-18 2022-06-23 深圳市紫光同创电子有限公司 64B/66B转换的serdes架构
CN113904756A (zh) * 2021-10-15 2022-01-07 深圳市紫光同创电子有限公司 基于10Gbase-R协议的以太网系统
CN113904756B (zh) * 2021-10-15 2023-11-07 深圳市紫光同创电子有限公司 基于10Gbase-R协议的以太网系统

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Publication number Publication date
WO2022126895A1 (zh) 2022-06-23
KR20230093046A (ko) 2023-06-26

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