CN112310023A - 晶片结构及其制造方法 - Google Patents

晶片结构及其制造方法 Download PDF

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CN112310023A
CN112310023A CN202010745335.1A CN202010745335A CN112310023A CN 112310023 A CN112310023 A CN 112310023A CN 202010745335 A CN202010745335 A CN 202010745335A CN 112310023 A CN112310023 A CN 112310023A
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substrate
wafer structure
sidewall
layer
conductive
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赖俊谚
陈家湘
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XinTec Inc
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XinTec Inc
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Abstract

一种晶片结构及其制造方法，该晶片结构包括第一基板、第二基板、导电通道与重布线层。第一基板具有第一倾斜侧壁。第二基板位于第一基板的下表面上，且具有上部与下部。下部凸出上部。上部位于第一基板与下部之间。上部具有第二倾斜侧壁，且第一倾斜侧壁与第二倾斜侧壁的斜率大致相同。导电通道位于下部中。重布线层从第一基板的上表面依序沿第一倾斜侧壁与第二倾斜侧壁延伸至第二基板的下部的上表面，且电性连接导电通道。本发明的晶片结构深宽比可有效降低。此外，由于重布线层是在第一倾斜侧壁与第二倾斜侧壁上延伸，因此第一基板的厚度与第二基板的厚度不影响深宽比，对于设计上来说有所助益。

Description

晶片结构及其制造方法
技术领域
本发明有关于一种晶片结构与一种晶片结构的制造方法。
背景技术
晶片结构可具有堆叠的晶片，且此晶片结构的上表面与下表面可能需与其他装置电性连接，因此在晶片结构的上表面与下表面可先形成裸露导电垫的通孔，接着便可分别在晶片结构的上表面与下表面形成电性连接导电垫的重布线层，以于后续制程电性连接其他装置。前述晶片结构的上表面为上层晶片的上表面，下表面为下层晶片的下表面。此外，上层晶片的导电垫位于上层晶片的下表面，下层晶片的导电垫位于下层晶片的上表面，可在接合制程中电性连接不同晶片的导电垫。
然而，通孔的深宽比(Aspect ratio)与晶片的厚度有关。当选用的晶片厚时，通孔的深宽比大(例如大于2)，重布线层在转折处容易断线。如此一来，晶片结构所包括的晶片厚度将会有所局限，不利于设计。此外，通孔的深宽比大，虽然可采用激光钻孔的方式形成，但也容易对导电垫造成损伤。
发明内容
本发明的一技术态样为一种晶片结构。
根据本发明一实施方式，一种晶片结构包括第一基板、第二基板、导电通道与重布线层。第一基板具有第一倾斜侧壁。第二基板位于第一基板的下表面上，且具有上部与下部。下部凸出上部。上部位于第一基板与下部之间。上部具有第二倾斜侧壁，且第一倾斜侧壁与第二倾斜侧壁的斜率大致相同。导电通道位于下部中。重布线层从第一基板的上表面依序沿第一倾斜侧壁与第二倾斜侧壁延伸至第二基板的下部的上表面，且电性连接导电通道。
在本发明一实施方式中，上述晶片结构还包括接合层。接合层位于第一基板与第二基板之间，且接合层的侧面接触重布线层。
在本发明一实施方式中，上述第一基板、第二基板与接合层定义出空腔。
在本发明一实施方式中，上述接合层具有倾斜侧面。晶片结构还包括绝缘层。绝缘层位于导电通道与第二基板之间、第二基板的下表面上、重布线层与第一基板之间、第一基板的上表面上、第一倾斜侧壁上、接合层的倾斜侧面上及第二倾斜侧壁上。
在本发明一实施方式中，上述接合层具有倾斜侧面。晶片结构还包括表面保护层。表面保护层位于第一基板的上表面上、重布线层上、第一倾斜侧壁上、接合层的倾斜侧面上、第二倾斜侧壁上及第二基板的下部上。
在本发明一实施方式中，上述第一基板具有导电垫，且导电垫的侧壁接触重布线层。
在本发明一实施方式中，上述晶片结构还包括接合层。接合层位于第一基板与第二基板之间，且第一基板的导电垫位于接合层上。
在本发明一实施方式中，上述第二基板具有导电垫，且导电垫的侧壁接触重布线层。
在本发明一实施方式中，上述晶片结构还包括接合层。接合层位于第一基板与第二基板之间，且接合层位于第二基板的导电垫上。
在本发明一实施方式中，上述第一基板与第二基板各具有导电垫，晶片结构还包括接合层。接合层位于两导电垫与重布线层之间。
在本发明一实施方式中，上述重布线层为阶梯状。
在本发明一实施方式中，上述重布线层具有两水平部与倾斜部，倾斜部的两端分别邻接两水平部。
在本发明一实施方式中，上述重布线层的两水平部分别位于第一基板的上表面与下部的上表面，倾斜部位于第一倾斜侧壁与第二倾斜侧壁上。
在本发明一实施方式中，上述在下部的上表面上的水平部接触导电通道的上表面。
本发明的一技术态样为一种晶片结构的制造方法。
根据本发明一实施方式，一种晶片结构的制造方法包括在第一基板上接合第二基板；形成开口于第二基板中；形成导电通道于第二基板的开口中；形成沟槽于第一基板与第二基板中，使导电通道从沟槽裸露，第一基板具有第一倾斜侧壁，第二基板具有第二倾斜侧壁，且第一倾斜侧壁与第二倾斜侧壁的斜率大致相同；以及形成重布线层，其从第一基板的上表面依序沿第一倾斜侧壁与第二倾斜侧壁延伸至第二基板的下部的上表面，且电性连接导电通道。
在本发明一实施方式中，上述导电通道是以电镀或化学镀的方式形成。
在本发明一实施方式中，上述晶片结构的制造方法还包括形成导电通道后，接合第二基板于载体。
在本发明一实施方式中，上述晶片结构的制造方法还包括形成重布线层后，从第二基板移除载体。
在本发明一实施方式中，上述沟槽是以刀具切割第一基板与第二基板的方式形成。
在本发明一实施方式中，上述晶片结构的制造方法还包括形成该重布线层后，沿沟槽切割第二基板，其中依照第二基板切割的厚度，第二基板的侧壁形状为直立状或阶梯状。
在本发明上述实施方式中，由于第一基板与第二基板接合后，可于第一基板与第二基板中形成沟槽，因此第二基板的下部中的导电通道可从沟槽裸露，且沟槽的形成可一并产生第一基板的第一倾斜侧壁与第二基板的第二倾斜侧壁。如此一来，后续形成的重布线层可从第一基板的上表面依序沿第一倾斜侧壁与第二倾斜侧壁延伸至第二基板的下部的上表面，进而电性连接导电通道。本发明的晶片结构的导电通道只位于第二基板的下部中，深宽比可有效降低。此外，由于重布线层是在第一倾斜侧壁与第二倾斜侧壁上延伸，因此第一基板的厚度与第二基板的厚度不影响深宽比，对于设计上来说有所助益。
附图说明
图1绘示根据本发明一实施方式的晶片结构的剖面图。
图2绘示根据本发明另一实施方式的晶片结构的剖面图。
图3绘示根据本发明一实施方式的第二基板接合于第一基板后的剖面图。
图4绘示图3的第二基板形成导电通道后的剖面图。
图5绘示图4的第二基板接合于载体后的剖面图。
图6绘示图5的第一基板与第二基板中形成沟槽后的剖面图。
图7绘示图6的第一基板与第二基板上形成重布线层后的剖面图。
图8绘示图7的第二基板切割后的剖面图。
图9绘示根据本发明一实施方式的晶片结构的剖面图。
其中，附图中符号的简单说明如下：
100、100a、100b：晶片结构；110：第一基板；111：下表面；112：上表面；113：第一倾斜侧壁；116：导电垫；117：侧壁；120：第二基板；121：下表面；122：上表面；123：第二倾斜侧壁；124：上部；125：下部；126：导电垫；127：侧壁；128：上表面；130：导电通道；132：焊垫部；140：重布线层；142a、142b：水平部；144：倾斜部；146：焊垫部；150、150a：接合层；160：绝缘层；170：表面保护层；205：暂时接合层；210：载体；C：空腔；L：线；O：开口；T：沟槽；θ1、θ2：钝角。
具体实施方式
以下将以图式揭露本发明的多个实施方式，为明确说明，许多实务上的细节将在以下叙述中一并说明。然而，应了解到，这些实务上的细节不应用以限制本发明。也就是说，在本发明部分实施方式中，这些实务上的细节是非必要的。此外，为简化图式起见，一些已知惯用的结构与元件在图式中将以简单示意的方式绘示。
图1绘示根据本发明一实施方式的晶片结构100的剖面图。晶片结构100包括第一基板110、第二基板120、导电通道130与重布线层140。第一基板110具有相对的下表面111与上表面112，且具有邻接下表面111与上表面112的第一倾斜侧壁113。第二基板120位于第一基板110的下表面111上，且具有上部124与下部125。第二基板120的下部125凸出上部124，且下部125的宽度大于上部124。第二基板120的上部124位于第一基板110与第二基板120的下部125之间。第二基板120的上部124具有第二倾斜侧壁123，且第一倾斜侧壁113与第二倾斜侧壁123的斜率大致相同。
导电通道130位于第二基板120的下部125中。重布线层140从第一基板110的上表面112依序沿第一倾斜侧壁113与第二倾斜侧壁123延伸至第二基板120的下部125的上表面128，且电性连接导电通道130。
在本实施方式中，第一基板110与第二基板120的材质可以包含硅，可具有感测装置或内部线路。导电通道130的材质可以包含铜，可采用电镀或化学镀(包括种子层溅镀及线路设计所需黄光制程)的方式形成。重布线层140的材质可以包含铝或铜，可采用溅镀方式形成。此外，重布线层140还可包括在第一基板110的上表面112上的焊垫部146。晶片结构100还可包括在第二基板120的下表面121上的焊垫部132。焊垫部132与焊垫部146可用来设置导电结构(如锡球)或电性连接其他电子装置(如电路板、晶片等)，因此晶片结构100具有双面电性连接的功效。
由于晶片结构100的重布线层140可从第一基板110的上表面112依序沿第一倾斜侧壁113与第二倾斜侧壁123延伸至第二基板120的下部125的上表面128，进而电性连接导电通道130，因此重布线层140不受传统通孔的宽深比影响。本发明的晶片结构100的导电通道130只位于第二基板120的下部125中，其深宽比可有效降低。此外，由于重布线层140是在第一倾斜侧壁113与第二倾斜侧壁123上延伸，因此第一基板110的厚度与第二基板120的厚度不影响深宽比，对于设计上来说有所助益。举例来说，设计者可选用较厚的第一基板110的与第二基板120而能避免重布线层140断线。
在本实施方式中，重布线层140为阶梯状。具体而言，重布线层140具有两水平部142a、142b与倾斜部144，倾斜部144的两端分别邻接两水平部142a、142b。倾斜部144与水平部142a之间夹钝角θ1，且倾斜部144与水平部142b之间夹钝角θ2。相似地，第一基板110的上表面112与第一倾斜侧壁113之间夹钝角θ1，且第二基板120的第二倾斜侧壁123与下部125的上表面128之间夹钝角θ2。
重布线层140的两水平部142a、142b分别位于第一基板110的上表面112与下部125的上表面128，倾斜部144位于第一倾斜侧壁113与第二倾斜侧壁123上。在第二基板120的下部125的上表面128上的水平部142b接触导电通道130的上表面。经由上述设计，重布线层140与导电通道130可将信号从晶片结构100的上侧传输到下侧，或从晶片结构100的下侧传输到上侧，且重布线层140不易断裂。
在本实施方式中，晶片结构100还包括接合层150。接合层150位于第一基板110的下表面111与第二基板120的上表面122之间，且接合层150的侧面接触重布线层140。
应了解到，已叙述过的元件连接关系、材料与功效将不再重复赘述，合先叙明。在以下叙述中，将说明其他形式的晶片结构。
图2绘示根据本发明另一实施方式的晶片结构100a的剖面图。晶片结构100a包括第一基板110、第二基板120、导电通道130、重布线层140与接合层150a。与图1实施方式不同的地方在于，第一基板110、第二基板120与接合层150a定义出空腔C，且第一基板110具有导电垫116，第二基板120具有导电垫126。导电垫116的侧壁117与导电垫126的侧壁127接触重布线层140。此外，第一基板110的导电垫116位于接合层150a上，且接合层150a位于第二基板120的导电垫126上。如此一来，接合层150a位于两导电垫116、126与重布线层140之间。
在本实施方式中，由于第一基板110的导电垫116与第二基板120的导电垫126可利用重布线层140电性连接，因此可选用无导电材料的接合层150a，不仅可降低成本，对于材料的选用更具弹性。
在以下叙述中，将详细说明图1的晶片结构100的制造方法。
图3绘示根据本发明一实施方式的第二基板120接合于第一基板110后的剖面图。图4绘示图3的第二基板120形成导电通道130后的剖面图。同时参阅图3与图4，首先，可利用接合层150于第一基板110上接合第二基板120，使接合层150位于第一基板110与第二基板120之间。接着，可形成开口O于第二基板120中。在形成开口O后，可采用电镀的方式于第二基板120的开口O中形成导电通道130，并在第二基板120上形成焊垫部132，如图4所示。
图5绘示图4的第二基板120接合于载体210后的剖面图。同时参阅图4与图5，待导电通道130形成后，可将图4的结构翻转180度，并利用暂时接合层205(Temporary bondinglayer)将第二基板120接合于载体210。载体210可于后续切割制程提供支撑力。暂时接合层205可利用照光、浸泡、或高温方式使其粘性消失，但并不以上述方式为限。在其他实施方式中，若第一基板110与第二基板120有足够厚度，接合载体210的步骤可以省略。
图6绘示图5的第一基板110与第二基板120中形成沟槽T后的剖面图。待接合载体210后，可于第一基板110与第二基板120中形成沟槽T，使导电通道130从沟槽T裸露。沟槽T形成后，第一基板110具有第一倾斜侧壁113，第二基板120具有第二倾斜侧壁123，且第一倾斜侧壁113与第二倾斜侧壁123的斜率大致相同。在本实施方式中，沟槽T是以刀具切割第一基板110与第二基板120的方式形成。在其他实施方式中，沟槽T也可采蚀刻方式形成。
图7绘示图6的第一基板110与第二基板120上形成重布线层140后的剖面图。接着，可形成具有水平部142a、142b与倾斜部144的重布线层140，其从第一基板110的上表面112依序沿第一倾斜侧壁113与第二倾斜侧壁123延伸至第二基板120的下部125的上表面128，使得重布线层140可电性连接导电通道130。导电通道130只位于第二基板120的下部125，深宽比可有效降低。此外，由于重布线层140是在第一倾斜侧壁113与第二倾斜侧壁123上延伸，因此第一基板110的厚度与第二基板120的厚度不影响深宽比，对于设计上来说有所助益。
图8绘示图7的第二基板120切割后的剖面图。同时参阅图7与图8，待形成重布线层140后，可从第二基板120的下表面121移除载体210及暂时接合层205。接着，可沿沟槽T(也就是沿线L)切割第二基板120，而得到多个晶片结构100。此外，可依照第二基板120所需切割的厚度，使第二基板120的侧壁形状为直立状(如图8所示)或阶梯状(如下部125也具有倾斜侧壁123的结构)。晶片结构100的详细结构可参阅图1，不重复赘述。
图9绘示根据本发明一实施方式的晶片结构100b的剖面图。晶片结构100b包括第一基板110、第二基板120、导电通道130与重布线层140。与图1实施方式不同的地方在于晶片结构100b还包括绝缘层160与表面保护层170。绝缘层160位于导电通道130与第二基板120之间、第二基板120的下表面121上、重布线层140与第一基板110之间、第一基板110的上表面112上、第一倾斜侧壁113上、接合层150的倾斜侧面上及第二倾斜侧壁123上。此外，表面保护层170位于第一基板110的上表面112上、重布线层140上、第一倾斜侧壁113上、接合层150的倾斜侧面上、第二倾斜侧壁123上及第二基板120的下部125上。在本实施方式中，表面保护层170覆盖绝缘层160。
绝缘层160存在与否依照第一基板110与第二基板120的材质导电与否决定，如图1的晶片结构100不需绝缘层160。表面保护层170是否存在与后续封装方式不同及导线(如重布线层140)保护需求有关，如图1的晶片结构100不需表面保护层170。
以上所述仅为本发明较佳实施例，然其并非用以限定本发明的范围，任何熟悉本项技术的人员，在不脱离本发明的精神和范围内，可在此基础上做进一步的改进和变化，因此本发明的保护范围当以本申请的权利要求书所界定的范围为准。

Claims (20)

1.一种晶片结构，其特征在于，包括：
第一基板，具有第一倾斜侧壁；
第二基板，位于该第一基板的一下表面上，且具有上部与下部，其中该下部凸出该上部，该上部位于该第一基板与该下部之间，该上部具有第二倾斜侧壁，且该第一倾斜侧壁与该第二倾斜侧壁的斜率大致相同；
导电通道，位于该下部中；以及
重布线层，从该第一基板的上表面依序沿该第一倾斜侧壁与该第二倾斜侧壁延伸至该第二基板的该下部的上表面，且电性连接该导电通道。
2.根据权利要求1所述的晶片结构，还包括：
接合层，位于该第一基板与该第二基板之间，且该接合层的侧面接触该重布线层。
3.根据权利要求2所述的晶片结构，其中该第一基板、该第二基板与该接合层定义出空腔。
4.根据权利要求2所述的晶片结构，该接合层具有倾斜侧面，该晶片结构还包括：
绝缘层，位于该导电通道与该第二基板之间、该第二基板的下表面上、该重布线层与该第一基板之间、该第一基板的该上表面上、该第一倾斜侧壁上、该接合层的该倾斜侧面上及该第二倾斜侧壁上。
5.根据权利要求2所述的晶片结构，该接合层具有倾斜侧面，该晶片结构还包括：
表面保护层，位于该第一基板的该上表面上、该重布线层上、该第一倾斜侧壁上、该接合层的该倾斜侧面上、该第二倾斜侧壁上及该第二基板的该下部上。
6.根据权利要求1所述的晶片结构，其中该第一基板具有导电垫，且该导电垫的侧壁接触该重布线层。
7.根据权利要求6所述的晶片结构，还包括：
接合层，位于该第一基板与该第二基板之间，且该第一基板的该导电垫位于该接合层上。
8.根据权利要求1所述的晶片结构，其中该第二基板具有导电垫，且该导电垫的侧壁接触该重布线层。
9.根据权利要求8所述的晶片结构，还包括：
接合层，位于该第一基板与该第二基板之间，且该接合层位于该第二基板的该导电垫上。
10.根据权利要求1所述的晶片结构，其中该第一基板与该第二基板各具有导电垫，该晶片结构还包括：
接合层，位于该两导电垫与该重布线层之间。
11.根据权利要求1所述的晶片结构，其中该重布线层为阶梯状。
12.根据权利要求1所述的晶片结构，其中该重布线层具有两水平部与倾斜部，该倾斜部的两端分别邻接该两水平部。
13.根据权利要求12所述的晶片结构，其中该重布线层的该两水平部分别位于该第一基板的该上表面与该下部的该上表面，该倾斜部位于该第一倾斜侧壁与该第二倾斜侧壁上。
14.根据权利要求12所述的晶片结构，其中在该下部的该上表面上的该水平部接触该导电通道的上表面。
15.一种晶片结构的制造方法，其特征在于，包括：
在第一基板上接合第二基板；
形成开口于该第二基板中；
形成导电通道于该第二基板的该开口中；
形成沟槽于该第一基板与该第二基板中，使该导电通道从该沟槽裸露，该第一基板具有第一倾斜侧壁，该第二基板具有第二倾斜侧壁，且该第一倾斜侧壁与该第二倾斜侧壁的斜率大致相同；以及
形成重布线层，其从该第一基板的上表面依序沿该第一倾斜侧壁与该第二倾斜侧壁延伸至该第二基板的下部的上表面，且电性连接该导电通道。
16.根据权利要求15所述的晶片结构的制造方法，其中该导电通道是以电镀或化学镀的方式形成。
17.根据权利要求15所述的晶片结构的制造方法，还包括：
形成该导电通道后，接合该第二基板于载体。
18.根据权利要求17所述的晶片结构的制造方法，还包括：
形成该重布线层后，从该第二基板移除该载体。
19.根据权利要求15所述的晶片结构的制造方法，其中该沟槽是以刀具切割该第一基板与该第二基板的方式形成。
20.根据权利要求15所述的晶片结构的制造方法，还包括：
形成该重布线层后，沿该沟槽切割该第二基板，其中依照该第二基板切割的厚度，该第二基板的侧壁形状为直立状或阶梯状。
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