CN112185931A - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN112185931A
CN112185931A CN202010630657.1A CN202010630657A CN112185931A CN 112185931 A CN112185931 A CN 112185931A CN 202010630657 A CN202010630657 A CN 202010630657A CN 112185931 A CN112185931 A CN 112185931A
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China
Prior art keywords
redistribution structure
conductive
drain
source
insulating layer
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CN202010630657.1A
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English (en)
Inventor
O.布兰克
G.内鲍尔
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Infineon Technologies Austria AG
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Infineon Technologies Austria AG
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Publication of CN112185931A publication Critical patent/CN112185931A/zh
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Abstract

公开了一种半导体器件。在一些实施例中，半导体器件包括半导体管芯，半导体管芯包括具有源极电极、漏极电极和栅极电极的竖向晶体管器件，半导体管芯具有第一表面和位于第一表面上的金属化结构。金属化结构包括在第一表面上的第一导电层、在第一导电层上的第一绝缘层、在第一绝缘层上的第二导电层、在第二导电层上的第二绝缘层和在第二绝缘层上的第三导电层。第三导电层包括耦合到源极电极的至少一个源极焊盘、耦合到漏极电极的至少一个漏极焊盘以及耦合到栅极电极的至少一个栅极焊盘。

Description

半导体器件
背景技术
用于功率应用的常见的晶体管器件包括Si CoolMOS®、Si功率MOSFET和Si绝缘栅双极晶体管(IGBT)。诸如晶体管器件的半导体器件通常被提供在封装中。封装可以包括提供外部接触的基底或引线框，外部接触被用于将电子组件安装到诸如印刷电路板的再分配板上。封装还包括从晶体管器件到基底或引线框的内部电连接以及覆盖半导体器件和内部电连接的塑料模制化合物。
为了在晶体管导通时实现低的漏极到源极电阻RDS(on)，竖向晶体管器件包括在相对的表面上的漏极电极和源极电极。然而，由于将漏极和漏极接触放置在与其上放置有源极接触的表面相对的表面上，必须将电连接供给到器件的两侧。因此，对于使用晶片级芯片尺度封装技术的封装来说竖向晶体管器件更有挑战性。
US 2013/0277735 A1公开了包括竖向晶体管的晶片级芯片大小封装的示例，该竖向晶体管具有布置在公共侧上的源极接触、漏极接触和栅极接触。贯穿的硅通孔被用于将漏极区电耦合到定位在相对的表面上的漏极接触。
然而，进一步的改进将是合期望的以允许芯片大小封装用于具有甚至更低的RDSon的竖向晶体管器件。
发明内容
在一些实施例中，半导体器件包括半导体管芯，该半导体管芯包括具有源极电极、漏极电极和栅极电极的竖向晶体管器件，该半导体管芯具有第一表面和位于该第一表面上的金属化结构。金属化结构包括在第一表面上的第一导电层、在第一导电层上的第一绝缘层、在第一绝缘层上的第二导电层、在第二导电层上的第二绝缘层和在第二绝缘层上的第三导电层。第三导电层包括耦合到源极电极的至少一个源极焊盘、耦合到漏极电极的至少一个漏极焊盘和耦合到栅极电极的至少一个栅极焊盘。
半导体器件包括适合于将晶体管器件电耦合到电路板和/或外部电路和/或外部负载的焊盘，从而半导体器件可以被描述为封装。由于焊盘位于半导体管芯的主表面上，因此半导体器件可以被描述为芯片大小或芯片尺度封装。
在一些实施例中，金属化结构包括多于三个的导电层，并且绝缘层被布置在导电层中的每个之间。
在一些实施例中，在半导体管芯内提供多于一个的器件，从而可以提供更复杂的电路，例如半桥电路。在一些实施例中，在半导体管芯中提供多于一个的晶体管器件，从而可以提供更复杂的电路，例如半桥电路。在这些实施例中，半导体器件也可以被称为模块。
源极电极和漏极电极提供了晶体管器件的功率电极，并且可以更一般地表示为第一功率电极和第二功率电极。在一些实施例中，源极电极和源极焊盘可以分别被表示为第一功率电极和第一功率焊盘，并且漏极电极和漏极焊盘分别被表示为第二功率电极和第二功率焊盘。
在一些实施例中，第一导电层包括耦合到源极电极的第一源极再分配结构、耦合到漏极电极的第一漏极再分配结构以及耦合到栅极电极的第一栅极再分配结构。第一源极再分配结构包括多个分立的第一导电区。第一漏极再分配结构包括多个分立的第二导电区，其在横向上定位在第一源极再分配结构的第一分立导电区之间并且在横向上与第一源极再分配结构的第一分立导电区间隔开。
在一些实施例中，第一漏极再分配结构的多个分立的第二导电区被通过第二导电层电耦合在一起，并且第一源极再分配结构的多个分立的第一导电区被通过第三再分配结构电耦合在一起。
替换地，第一漏极再分配结构的多个分立的第二导电区被通过第三导电层电耦合在一起，并且第一源极再分配结构的多个分立的第一导电区被通过第二再分配结构电耦合在一起。
更宽泛地，被耦合到第一功率电极的分立导电区在金属化结构的如下的导电层中在横向上彼此电耦合：所述导电层与金属化结构的对被耦合到第二功率电极的分立导电部分进行电耦合的导电层不同。由于绝缘层被布置在导电层中的每个之间，因此这种布置使得耦合到第一功率电极的分立导电区之间的横向连接能够被定位为在竖向上在耦合到第二功率电极的分立导电区之间的横向连接上方，因此允许减小由晶体管器件的电极与由焊盘提供的外部接触之间的再分配结构占据的面积。在一些实施例中，晶体管器件的电极与由焊盘提供的外部接触之间的再分配结构被完全地提供在半导体管芯的其中形成晶体管器件的区域内。
在一些实施例中，第一漏极再分配结构的分立的第二导电区是细长的并且具有条带形状。
在一些实施例中，第一源极再分配结构的分立的第一导电区是细长的并且具有条带形状。
在一些实施例中，半导体器件进一步包括从第一表面延伸到半导体管芯中的一个或多个导电通孔。所述一个或多个导电通孔被电耦合到位于半导体管芯内的掺杂的漏极区以及电耦合到半导体管芯的第一表面上的第一漏极再分配结构。
在一些实施例中，竖向晶体管器件包括被划分为多个单元场区的有源区。至少一个被耦合到漏极电极的导电通孔位于相邻的单元场区之间。导电通孔可以具有细长的条带形状。
竖向晶体管器件可以包括两个细长的导电通孔，其实质上彼此平行地延伸并且位于相邻的单元场区之间。两个细长导电通孔在不同的横向位置处耦合到漏极电极。两个细长的导电通孔电耦合到第一漏极分配结构的第二分立导电区中的公共的导电区。
在一些实施例中，第一绝缘层被布置在第一源极再分配结构和第一漏极再分配结构上并且在横向上布置在第一源极再分配结构和第一漏极再分配结构之间。在一些实施例中，第一绝缘层包括暴露出第一源极再分配结构的第一分立导电区的经限定的部分的第一开口以及暴露出第一漏极再分配结构的第二分立导电区的经限定的部分的第二开口。
多个第一开口可以位于单个第一分立导电区上，并且可以针对每个第二分立导电区提供单个第二开口。
在一些实施例中，第二导电层包括被电耦合到第一源极再分配结构的第二源极再分配结构以及被电耦合到第一漏极再分配结构的第二漏极再分配结构。第二源极再分配结构被布置在第一绝缘层的第一开口内，并且包括多个第一导电岛状部，所述多个第一导电岛状部被布置在第一源极再分配结构的第一导电区上。第二漏极再分配结构被布置在第一绝缘层的第二开口中，并且还在横向上被定位在第二源极再分配结构的第一导电岛状部之间并且在横向上与第二源极再分配结构的第一导电岛状部间隔开。第二漏极再分配结构可以在横向上围绕第二源极再分配结构的第一导电岛状部。
在一些实施例中，第二漏极再分配结构将第一漏极再分配结构的第二导电区彼此电耦合。
在一些实施例中，第二漏极再分配结构被布置成在竖向上在第一漏极再分配结构上方并且在竖向上在第一源极再分配结构的被第一绝缘层覆盖的部分上方。
在一些实施例中，第二绝缘层被布置在第二源极再分配结构上和并且被布置在第二漏极再分配结构上，并且具有暴露出第二源极再分配结构的第一导电岛状部的经限定的区的第三开口和暴露出第二漏极再分配结构的经限定的区的至少一个第四开口。单个第三开口可以位于每个第一导电岛状部上。
在一些实施例中，第三导电层包括电耦合到第二源极再分配结构的第三源极再分配结构和电耦合到第二漏极再分配结构的第三漏极再分配结构。在一些实施例中，第三源极再分配结构被布置在第三开口中，并且将第二源极再分配结构的第一导电岛状部彼此电耦合。第三源极再分配结构在第二漏极再分配结构的被由第二绝缘层覆盖的部分上方延伸。第三漏极再分配结构被布置在第四开口中，并且包括在横向上与第三源极再分配结构间隔开的第二导电岛状部。
在一些实施例中，多个第四开口被提供在第二绝缘层中，每个第四开口暴露出第二漏极再分配结构的经限定的区。在一些实施例中，第三漏极再分配结构包括在横向上彼此间隔开并且与第三源极再分配结构间隔开的多个第二导电岛状部。
在一些实施例中，第三漏极再分配结构的每个第二导电岛状部具有大于第四开口的横向大小的横向大小，使得每个第二导电岛状部在第二源极再分配结构的被由第二绝缘层覆盖的部分上方延伸。
在一些实施例中，导电通孔、第一漏极再分配结构、第一源极再分配结构和第一栅极再分配结构包括钨，第一绝缘层包括聚酰亚胺，第二漏极再分配结构、第二源极再分配结构由AlCu合金形成，第二绝缘层包括聚酰亚胺，并且第三漏极再分配结构和第三源极再分配结构由Cu形成。
钨是有用的，因为其可以被用于在竖向方向上填充半导体器件中的通孔以形成导电通孔，并且可以被沉积在诸如第一表面的侧表面上，以提供第一源极再分配结构、第一漏极再分配结构和第一栅极再分配结构。铝铜合金是有用的，因为其具有更低的电阻。Cu是有用的，因为其形成用于由第三导电层提供的焊盘的可焊接的表面。
第三导电层的外表面可以具有可焊接的外表面。在一些实施例中，源极焊盘、漏极焊盘和栅极焊盘具有可焊接的外表面。可焊接的外表面可以是由第三导电层的材料提供的，或者可以是由布置在第三导电层上的附加层提供的。
在一些实施例中，半导体器件进一步包括被布置在第三导电层上的环氧树脂层。在一些实施例中，环氧树脂层包括暴露出第三源极再分配层的一部分并且限定源极焊盘的至少一个第五开口、暴露出第三漏极再分配结构的第二导电岛状部的一部分并且限定漏极焊盘的至少一个第六开口、以及限定栅极焊盘的至少一个第七开口。
在一些实施例中，半导体器件进一步包括在源极焊盘、漏极焊盘和栅极焊盘上的焊料。
在一些实施例中，半导体管芯包括与第一侧相对的第二侧，第二侧是电无源的和/或包括第三绝缘层或者是裸露的。
在一些实施例中，半导体管芯包括与第一侧相对的第二侧，第二侧被电耦合到漏极和/或包括第二金属化层。
在一些实施例中，半导体器件进一步包括在第一表面和第二表面之间延伸的侧面，其中侧面是裸露的，或者钝化层或绝缘层被布置在侧面上。
在一些实施例中，竖向晶体管器件包括有源区，并且半导体管芯的第一表面的面积小于晶体管器件的有源区的130%或者小于晶体管器件的有源区的120%。有源区可以被限定为半导体管芯中的源极注入区的区域。半导体管芯的第一表面的区域由半导体管芯的侧面限定而没有任何附加封装。
本领域技术人员在阅读以下的详细描述并且查看随附附图时将认识到附加的特征和优点。
附图说明
附图的元素未必相对于彼此成比例。同样的参考标号指明对应的相似部分。各种所图示的实施例的特征可以被组合，除非它们彼此排斥。示例性实施例被描绘在附图中并且在随后的描述中被详述。
图1图示根据实施例的包括晶体管器件和金属化结构的半导体器件的示意性横截面视图。
图2图示金属化结构的第一导电层的示意性平面视图。
图3图示位于图2的第一导电层上的金属化结构的第一绝缘层的示意性平面视图。
图4图示位于图3的第一绝缘层上的金属化结构的第二导电层的示意性平面视图。
图5图示第二导电层和下面的第一导电层的示意性平面视图。
图6图示位于第二绝缘层上的第三导电层的示意性平面视图，该第二绝缘层进而位于图4的第二导电层上。
图7图示图6的第三导电层和图4的第二导电层的示意性平面视图。
图8图示位于图7的第三导电层上的环氧树脂层的示意性平面视图。
图9图示被部分地切除的半导体器件的立体图，其图示晶体管器件的晶体管单元和金属化结构。
图10图示封装占位区的示意图。
具体实施方式
在以下的详细描述中，参照随附附图，随附附图形成在此的一部分，并且在附图中通过图示方式示出其中可以实践本发明的具体实施例。在这方面，参照被描述的(多个)图的定向使用诸如"顶部"、"底部"、"前面"、"后面"、"先头"、"末尾"等的方向术语。因为实施例的组件可以被以许多不同的定向定位，所以方向术语被用于说明目的而绝不是进行限制。要理解在不脱离本发明的范围的情况下可以利用其它实施例并且可以作出结构或逻辑上的改变。下面的对发明的详细描述不是在限制的意义上取得的，并且本发明的范围由所附权利要求限定。
下面将解释许多示例性实施例。在这种情况下，在各图中，相同的结构特征由相同或相似的参考标号标识。在本描述的上下文中，"横向"或"横向方向"应当被理解为表示一般地平行于半导体材料或半导体本体的横向延伸行进的方向或延伸。因此横向方向一般地平行于这些表面或侧延伸。与此相对，术语"竖向"或"竖向方向"被理解为表示一般地垂直于这些表面或侧并且因此垂直于横向方向行进的方向。因此竖向方向在半导体材料或半导体本体的厚度方向上行进。
如在本说明书中采用的那样，当诸如层、区或基底的元素被称为在另一元素"上"或者延伸"到另一元素上"时，其可以直接在另一元素上或直接延伸到另一元素上，或者也可以存在居中的元素。相反，当元素被称为"直接在另一元素上"或"直接延伸到"另一元素上时，不存在居中的元素。
如在本说明书中采用的那样，当元素被称为"连接"或"耦合"到另一元素时，其可以直接连接或耦合到另一元素或者可以存在居中的元素。相反，当元素被称为"直接连接"或"直接耦合"到另一元素时，不存在居中的元素。
在诸如功率MOSFET的竖向晶体管器件中，电流典型地从芯片的顶部侧(源极)流动到芯片的背侧(漏极)，或者芯片被倒装并且电流反过来流动。在封装的最终的占位区中，所有三个管脚(源极、栅极、漏极)仅位于一侧处。为了允许所有的管脚位于单侧上，将芯片放置到诸如S3O8、SSO8、TO220或DirectFET封装的封装中。在这些封装中，从晶体管器件的两个相对的侧到封装的基底和引线框的重新布线以及包封消耗空间。典型地，封装的占位区与能够被放置在封装中的最大芯片大小相比具有两倍的大小。
在此描述的实施例提供了一种用于诸如功率MOSFET的竖向晶体管器件的芯片尺度封装，其不要求分离的封装处理。在此描述的芯片尺度封装不使用金属罐并且不具有对于金属罐或管芯焊盘的管芯附接。使用三个或更多个金属化层来直接在芯片上实现重新布线。所有的外部接触(例如接触焊盘、金属凸块、焊料凸块或焊料球)被放置在芯片的前侧上并且是到客户的面板的接口。可以在晶片级处理源极、栅极和漏极的外部接触，例如接触焊盘、金属凸块、焊料凸块或焊料球。
这种布置使得器件的占位区和芯片大小能够是几乎相同的，不需要分离的封装处理，由于用于重新布线的Si区域非常小并且Si区域成本低于标准封装成本，因此实现封装成本降低。附加地，避免了管芯附接劣化的风险，可以根据客户需要或可靠性需要来选取芯片厚度，封装+Si基底电阻低，并且可以通过对于金属化结构的布局改变来容易地适配占位区和接触布局。
在一些实施例中，由于漏极电极在最终产品中位于半导体管芯内而不是形成半导体管芯的背表面，因此避免了背侧薄化技术和/或背侧金属化。
图1图示根据实施例的半导体器件20的示意性横截面视图。半导体器件20包括半导体管芯21，半导体管芯21包括竖向晶体管器件22。竖向晶体管器件22例如可以是MOSFET或IGBT。竖向晶体管器件22具有源极电极23、漏极电极24和栅极电极25，它们的每个在图1中被单纯地示意性地指示为块，以便将源极电极23、漏极电极24和栅极电极25中的每个图示为功能元件。源极电极23和漏极电极24之间的漂移路径是竖向的，并且实质上垂直于半导体管芯21的第一主表面26。漏极电极24可以是由被定位为在竖向上在源极电极23之上的掺杂的漏极区来提供的。漏极区可以位于半导体管芯21的与第一主表面26相对的第二主表面27处，或者可以位于半导体管芯21内并且与第二主表面27间隔开，如在图1中示出那样。
半导体器件20进一步包括位于半导体管芯21的第一表面26上的金属化结构28。金属化结构28以如下这一顺序包括位于第一表面26上的第一导电层29、位于第一导电层29上的第一绝缘层30、位于第一绝缘层30上的第二导电层31、位于第二导电层31上的第二绝缘层32、以及位于第二绝缘层32上的第三导电层33。第三导电层33包括电耦合到源极电极23的至少一个源极焊盘34、电耦合到漏极电极24的至少一个漏极焊盘35、以及电耦合到栅极电极25的至少一个栅极焊盘36。
源极焊盘34、漏极焊盘35和栅极焊盘36被布置在半导体管芯21的第一表面26上，并且因此在半导体器件20的公共侧上。由于源极焊盘34、栅极焊盘36和漏极焊盘35能够用作为用于晶体管器件22的外部接触，因此半导体器件20可以被称为封装。由于半导体器件20的总面积并不比半导体管芯21大太多，因此半导体器件20可以被称为芯片大小封装或芯片尺度封装。
竖向晶体管器件22包括有源区，该有源区描述晶体管器件22的贡献于晶体管器件22的功率开关功能的区域。在一些实施例中，半导体管芯120的第一表面26的面积小于晶体管器件22的有源区的130%或甚至小于晶体管器件22的有源区的120%，或者至多为晶体管器件的有源区的110%。晶体管器件22的有源区被限定为源极注入区的区域。半导体管芯120的第一表面26的区域由半导体管芯120的侧面限定。
在其中源极焊盘34、漏极焊盘35和栅极焊盘36提供半导体器件20的外部接触的实施例中，这些焊盘的最外表面可以包括允许焊料润湿并且附着到相应的焊盘的可焊接材料。在一些实施例中，焊料37位于源极焊盘34、漏极焊盘35和栅极焊盘36中的每个上。在其它实施例中，可以包括不同于焊料的金属的接触凸块或焊料球可以位于焊盘34、35、36中的每个上。进一步的焊料层可以位于金属凸块上。
半导体器件20的占位区的横向面积和半导体管芯21的横向面积几乎相同，因为提供半导体器件20的外部接触的金属化结构28位于半导体管芯21的第一表面26上。因此避免了使用分离的封装处理。可以通过修改金属化结构28的各层的图案(例如第二绝缘层32和第三导电层33中的开口)来将接触焊盘34、35、36的布置适配于特定的应用。
提供源极焊盘34、漏极焊盘35和栅极焊盘36的第三导电层33可以由铜形成，第二导电层可以由铝铜合金形成，并且第一导电层29可以由钨形成。在一些实施例中，第一导电层进一步包括附加的一个或多个层，例如Ti子层和TiN子层，在其上沉积钨层以便增加对于半导体材料的粘附和电接触。在一些实施例中，第一绝缘层30和第二绝缘层32这两者都由聚酰亚胺形成。
在一些实施例中，半导体管芯21的第二侧27是电无源的并且不用于电连接。在这些实施例中，半导体管芯21的第二表面不是由形成漏极电极24的掺杂的半导体区形成的。在一些实施例中，半导体管芯21的第二侧27可以是在晶片级形成的掺杂的基底或层堆叠，但是其不用于电连接。在一些实施例中，第二侧27包括位于半导体管芯21上的进一步的一个或多个金属层。第三绝缘层可以位于半导体管芯21的第二主表面27上。第三绝缘层可以是环氧树脂层或环氧树脂箔。在一些实施例中，第二主表面27可以是裸露的并且由半导体管芯21的材料(例如硅)形成。
在一些未图示的实施例中，第二金属化层位于第二主表面27上，第二主表面27是电浮置的并且例如形成用于附接热沉的方便的表面。
在其它实施例中，半导体器件20的第二表面27可以被电耦合到漏极24并且由掺杂的漏极区形成。在一些实施例中，第二金属化结构位于半导体管芯21的第二主表面27上并且被耦合到漏极电极24。
半导体管芯21进一步包括在半导体管芯21的第一主表面26和第二主表面27之间延伸的侧面39。侧面39可以是裸露的并且由半导体管芯21的半导体材料形成，或者一个或多个钝化层或绝缘层可以被布置在侧面39上。
金属化结构28在源极电极23和源极焊盘34之间、在漏极电极24和漏极焊盘35之间以及在栅极电极25和栅极焊盘36之间形成导电再分配结构。金属化结构28包括在竖向上被通过一个或多个绝缘层交错开的最少三个导电层。在一些实施例中，金属化结构28仅包括三个导电层29、31、33和两个绝缘层30、32。在其它实施例中，金属化结构28可以进一步包括附加的导电层和绝缘层。与半导体管芯20接触的最低的导电层可以包括钨，并且提供焊盘的最外导电层可以由铜形成。一些或所有的绝缘层可以包括聚酰亚胺。
图9示出包括金属化结构28的半导体器件20的横截面立体图，并且还更详细地图示晶体管器件22。
竖向晶体管器件22可以具有一定的设计以使得其有源区40被划分成多个单元场区41。参照图9的立体图，每个单元场区41可以包括由台面43分离开的多个沟槽42。沟槽42从第一主表面26延伸到半导体管芯21的本体中。每个沟槽42可以包括场板。沟槽42可以是细长的并且实质上彼此平行地延伸。单元场区的每个单元包括沟槽42和台面43。在每个单元中，台面43包括由掺杂的源极区形成的源极电极23，其位于被利用相反的导电类型掺杂的本体区上。在一些实施例中，栅极电极40位于每个沟槽42内，并且位于场板42上并且与其电绝缘。在其它实施例中，栅极电极位于栅极沟槽中，栅极沟槽位于台面43中并且延伸通过源极区和本体区并且与源极区和本体区电绝缘。晶体管器件22进一步包括形成漏极电极24的掺杂的漏极区，漏极电极24与沟槽42的底部间隔开并且可以是在整个有源区40上连续的。漏极电极24和第一主表面26之间的竖向电连接由位于半导体管芯中的至少一个导电通孔44形成。导电通孔44延伸进入第一主表面26直到掺杂的漏极区24。导电通孔44在横向上被布置在相邻的单元场区41之间。在一些实施例中，两个导电通孔44位于相邻的单元场区41之间。
附加地参照图2，图2图示第一导电层29的位于半导体管芯21的第一主表面26上的部分的示意性平面视图。第一导电层29包括电耦合到源极电极23的第一源极再分配结构45、电耦合到漏极电极24的第一漏极再分配结构46、以及电耦合到栅极电极25的第一栅极再分配结构47。第一源极再分配结构45、第一漏极再分配结构46和第一栅极再分配结构47实质上共面并且在横向上彼此间隔开并且彼此电绝缘，从而第一导电层29的三个再分配结构中的每个可以被电连接到不同的电位。
第一源极再分配结构45包括位于单元场区41的沟槽42上的多个分立的第一导电区48。可以针对每个单元场区41提供一个第一导电区48。各第一分立导电区48在横向上彼此间隔开并且可以具有实质上彼此平行地延伸的条带的形式。第一漏极再分配结构46包括多个第二分立导电区49，每个第二分立导电区49位于两个相邻的第一分立导电区48之间。每个第二分立导电区49位于一个或多个导电通孔44上并且被电耦合到一个或多个导电通孔44，一个或多个导电通孔44进而被电耦合到与漏极电极24。每个第二分立导电区49在横向上与第一导电区48间隔开。每个第二导电区49可以具有细长的条带状的结构并且实质上平行于第一分立导电区48延伸。
如在图2的平面视图中看到那样，第一栅极再分配结构47可以被定位为朝向第一主表面26的外周边缘并且包括栅极流道50，栅极流道50实质上垂直于第一分立导电区48和第二分立导电区49延伸，并且延伸到更大面积的栅极焊盘部分51中。在一些实施例中，栅极焊盘51位于第一主表面26的角部处。
在一些实施例中，第二分立导电区49'中的至少一些被中断并且包括两个或更多个在横向上分离的区段53，各区段53被位于两个相邻的区段53之间的间隙52间隔开。第一分立导电区48'延伸通过间隙52并且被定位为相邻于各区段53的两个相对的横向侧。
参照图9的部分横截面视图，第二分立导电区49可以被形成为形成导电通孔44的导电材料。在一些实施例中，第一源极再分配结构45的第一分立导电区48、第一漏极再分配结构46的第二分立导电区49、第一栅极再分配结构47以及导电通孔44由钨形成。该相同的材料可以是在同一沉积步骤中形成的。
第一漏极再分配结构46和第一源极再分配结构45的每个包括在横向上分离的多个分立导电区。为了将每个单元场区41中的源极电极彼此电耦合并且与源极焊盘34电耦合，多个第一分立导电区48被借助于上方的金属化结构28的导电层之一彼此电耦合。相似地，为了将导电通孔44与第一漏极再分配结构46的第二分立导电区49彼此耦合并且还与漏极焊盘24耦合，导电通孔44和第一漏极再分配结构46的第二分立导电区49被通过上方的金属化结构28的导电层之一彼此电耦合。
在一些实施例中，在耦合到源极电极23的各第一分立导电区48之间的电连接和在耦合到漏极电极24的各第二分立导电区49之间的电连接被形成在金属化结构28的不同的导电层中。
例如，在一些实施例中，各第二分立导电区49被通过第二导电层31彼此电耦合，并且各第一分立导电区48被通过第三导电层33彼此电耦合。替换地，各第二分立导电区49被借助于第三导电层33彼此电耦合，并且各第一分立导电区48被通过第二导电层31彼此电耦合。
通过在金属化结构28的不同的导电层中为两个功率电极(即源极电极和漏极电极)提供横向连接，可以在相应的层内的分立导电区之间形成更大面积的电连接。附加地，特定的电极类型(例如在不同的单元场区41中的源极电极)之间的电连接可以被定位为在竖向上在另外的类型的电极(例如漏极电极和耦合到漏极电极的导电通孔)之间的电连接上方。因此，可以在更小的横向区域内形成在源极电极23和源极焊盘34之间以及在漏极电极24和漏极焊盘35之间的低电阻再分配结构。这进而允许半导体器件20的总面积被保持为更小并且尽可能相似于晶体管器件22的被要求提供器件的合期望的导通电阻的有源区40。不要求被简单地用于金属化结构和电气再分配结构的附加区域。因此，半导体器件20的面积和占位区可以被保持得小。
图3图示金属化结构28的用于图2的晶体管第一导电层29的第一绝缘层30的示意性平面视图。第一绝缘层30被定位为在横向上在第一源极再分配结构45和第一漏极再分配结构46之间，并且因此在第一分立导电区48和第二分立导电区49之间。第一绝缘层30还位于第一分立导电区48和第二分立导电区49上并且至少部分地覆盖第一分立导电区48和第二分立导电区49。第一绝缘层30还在栅极再分配结构47上以及在栅极再分配结构47与第一分立导电区48和第二分立导电区49之间延伸。
第一绝缘层30包括第一开口54，第一开口54位于第一源极再分配结构45的第一分立导电区48上，以使得第一再分配结构45的第一导电区48的经限定的部分在开口54的底部处暴露出。第一绝缘层30进一步包括第二开口55，其暴露出第一漏极再分配结构46的第二分立导电区49的经限定的部分。
第一开口54可以实质上在横向上小于第一分立导电区48的横向延伸以使得在单个分立导电区48上两个或更多个第一开口54被定位为在横向上彼此相邻并且被彼此间隔开。每个第二开口55可以具有实质上对应于条带状的第二导电区49的横向形状，并且可以暴露出仅略小于下面的第二分立导电区49的横向延伸的预限定区。第一绝缘层30进一步包括被定位为在横向上在中断的第二分立导电区49'的区段53之间的第一开口54'。第一开口54'大于其它的第一开口54。在一些实施例中，第一开口54'可以具有H形状或I形状，以使得纵向部分实质上垂直于条带状的第二开口55延伸，并且横向部分实质上平行于条带状的第二开口55延伸。第一绝缘层30包括进一步的开口56，其位于栅极再分配结构47的预限定部分上并且暴露出该预限定部分，并且可以除了栅极焊盘部分51的一部分之外还暴露出栅极流道50的至少一部分。进一步的开口56的横向形状可以实质上对应于下面的第一栅极再分配结构47的横向形状。
图4图示金属化结构28的位于图3的第一绝缘层30上的第二导电层31的示意图。第二导电层31包括电耦合到第一源极再分配结构45的第二源极再分配结构57以及电耦合到第一漏极再分配结构46的第二漏极再分配结构58。第二源极再分配结构57与第二漏极再分配结构58被横向地布置并且彼此间隔开，并且是实质上共平面的。
在一些实施例中，第二导电层31还包括第二栅极再分配结构62，第二栅极再分配结构62位于第一栅极再分配结构47上并且具有与第一栅极再分配结构47的横向形状相对应的横向形状。例如，第二栅极再分配结构62可以包括对应的栅极流道部分63和栅极接触部分64。
第二源极再分配结构57位于第一绝缘层30的第一开口54中。第二源极再分配结构57包括多个第一导电岛状部59，多个第一导电岛状部59被布置在第一源极再分配结构45的第一分立导电区48上。第一导电岛状部59中的每个的横向延伸可以是由第一开口54的横向延伸限定的。
第二漏极再分配结构58被布置在第一绝缘层30的第二开口55中并且还在第二开口55之间以及在第二分立导电区49之间延伸。第二漏极再分配结构还在横向上位于第二再分配结构57的第一导电岛状部59之间并且在横向上与第二再分配结构57的第一导电岛状部59间隔开。第二漏极再分配结构58在横向上围绕第二源极再分配结构57的第一导电岛状部59。第二漏极再分配结构58因此将下面的第一漏极再分配结构46的第二分立导电区49彼此电耦合，因为其位于暴露出第二导电区49的第二开口55中的每个中并且在第一绝缘层30的上表面60上的第二开口55之间延伸。位于半导体管芯20内的单元场区41之间的导电通孔44现在被借助于第二漏极再分配结构58彼此电耦合。漏极电极24被通过在横向上间隔开的多个竖向电连接电耦合到单个导电层58。
第二漏极再分配结构58在第一源极再分配结构45之上横向地延伸并且通过居中的第一绝缘层30与下方的第一源极再分配结构45电绝缘。在第二导电层31中，各种单元场区41的源极电极23仍然彼此电分离，因为第二再分配结构57仅包括位于下方的第一源极再分配结构的分立的第一导电区48中的每个上方的第一导电岛状部59。第二源极再分配结构57的第一导电岛状部59可以被认为位于形成在连续的第二漏极再分配结构58中的窗口61中。第一导电岛状部59在横向上与窗口61的侧面间隔开。窗口61可以具有与第一导电岛状部59的横向形状共形的横向形状。
在一些实施例中，第二漏极再分配结构58可以具有栅格形式，其中一个第一导电岛状部59位于栅格的每个开口的中心。
图5图示由实线示出的位于下面的以虚线示出的第一导电层29上的第二导电层31的示意性平面视图。在图5中未示出位于第一导电层29和第二导电层31之间的第一绝缘层30。
从图5的叠覆的平面视图可以看出，第二漏极再分配结构58在包括第一漏极再分配结构46的中断的第二导电区49'的分离的区段53的第二导电区49上方延伸并且在横向上在该第二导电区49之间延伸，因此将分立的第二导电区49电耦合在一起。第二漏极再分配结构58还在第一源极再分配结构45的第一分立导电区48上方延伸，由此其被通过居中的第一绝缘层30与第一分立导电区48电绝缘。第二漏极再分配结构58包括暴露出第一分立导电区48中的每个的预限定区的多个窗口61。形成第二源极再分配结构57的第一导电岛状部59位于这些窗口61内并且在横向上与周围的第二漏极再分配结构58间隔开。
在一些实施例中，第二导电层31包括第二栅极再分配结构62，第二栅极再分配结构62位于第一栅极再分配结构47上并且具有与第一栅极再分配结构47的横向形状相对应的横向形状。例如，第二栅极再分配结构62可以包括对应的栅极流道部分63和栅极接触部分64。
图6图示利用实线示出的位于被利用虚线指示的第二绝缘层32上的第三导电层33的示意性平面视图。
第二绝缘层32被布置在第二源极再分配结构57上以及被布置在第二漏极再分配结构58上，并且还位于它们之间的空间中，即位于第一导电岛状部59和第二漏极再分配结构58中的窗口61之间的间隙中。第二绝缘层32包括第三开口65和一个或多个第四开口66，第三开口65中的每个暴露出第二源极再分配结构57的第一导电岛状部59的经限定的区，第四开口66中的每个暴露出第二漏极再分配结构58的经限定的区。第二绝缘层32还可以包括进一步的开口67，其暴露出第二栅极再分配结构62的预限定部分并且特别是暴露出栅极焊盘部分64的预限定部分。
第三开口65可以是横向地布置的，以使得一个第三开口65位于第一导电岛状部59中的一个的上方并且可以具有实质上对应于第一导电岛状部59的横向形状的横向形状。然而，位于H形状的导电岛状部59'上方的第三开口65'可以具有不同于下面的第一导电岛状部59'的横向形状的横向形状。例如，第三开口65'可以具有简单的矩形形式并且仅位于第一导电岛状部59'的一个纵向条上。
第三导电层33包括电耦合到第二源极再分配结构57的第三源极再分配结构68以及电耦合到第二漏极再分配结构58的第三漏极再分配结构69。第三源极再分配结构68被用于将第二再分配结构57的第一导电岛状部59彼此电耦合。第三源极再分配结构68被布置在第三开口65中，并且在第一导电岛状部59之间延伸并且在第二漏极再分配结构58上方延伸。在其中第三源极再分配结构68位于第二漏极再分配结构58上并且在第二漏极再分配结构58上方延伸的区域中，第三源极再分配结构68被通过居中的第二绝缘层32与下面的第二漏极再分配结构58电绝缘。第三源极再分配结构68可以实质上覆盖半导体管芯21的整个第一表面26，除了被由第三漏极再分配结构69和提供栅极焊盘71的栅极再分配结构70占据的区之外。
第三漏极再分配结构69被布置在第二绝缘层32的第四开口66中，并且包括在横向上与第三再分配结构68间隔开的至少一个第二导电岛状部72。第三源极再分配结构68包括在横向上围绕第二导电岛状部72并且与其间隔开的窗口73。在其中第三漏极再分配结构包括多个第二导电岛状部72的实施例中，每个第二导电岛状部72位于第三源极再分配结构68的窗口73中，第二导电岛状部72可以在横向上彼此间隔开。
图7图示位于图4的第二导电层31上的图6的第三导电层33的示意性平面视图。
第二导电岛状部72可以具有如下的横向大小和形状：其大于下面的第二绝缘层32中的第四开口66并且在下面的第二漏极再分配结构58的邻近的部分之上延伸。在一些实施例中，第二导电岛状部72还在下面的第二源极再分配结构57的第一导电岛状部59的至少一部分(例如，第一导电岛状部59'的部分)之上延伸。在这些实施例中，第二导电岛状部72被通过第二绝缘层32的居中部分与下面的第一导电岛状部59'电绝缘。
对于其中金属化结构28的第三导电层33提供接触焊盘的实施例而言，例如在其中金属化结构28包括具有两个居中的绝缘层的三个导电层的实施例中，第二导电岛状部72在第一主表面26的区域内的横向形状、延伸和横向位置可以实质上对应于半导体器件20的占位区。
图8图示位于图7的第三导电层33上的环氧树脂层74的示意性平面视图。环氧树脂层74由实线指示并且下面的第三导电层33由虚线指示。
环氧树脂层74提供下面的第三导电层33的电绝缘和钝化，在一些实施例中，环氧树脂可以被另外的合适的材料替代。环氧树脂层74可以完全覆盖第三导电层33，并且包括暴露出第三源极再分配结构68的预限定部分的至少一个第五开口75。第三源极再分配结构68的被暴露出的部分提供用于半导体器件20的源极焊盘76。环氧树脂层74进一步包括暴露出第三漏极再分配结构69的第二导电岛状部72的至少一部分的至少一个第六开口77，从而第六开口77限定封装占位区的漏极焊盘78。第六开口77的横向延伸可以略小于第二导电岛状部72的横向延伸，从而环氧树脂层74位于第二导电岛状部72的外周区上并且覆盖第二导电岛状部72的外周区。环氧树脂层74进一步包括第七开口79，第七开口79位于第三栅极再分配结构70上方并且限定栅极焊盘80。
图9图示被部分地切除的半导体器件20的立体图，并且图示晶体管器件22的晶体管单元和单元场区41以及金属化结构28。
图10图示可以被用于图1的半导体器件20的封装占位区的示意图。封装占位区包括由形成在半导体管芯的第一表面26上的金属化结构28的最外导电层形成的焊盘34、35、36。
占位区的外部接触焊盘可以是以规则的栅格图案布置的。在一些实施例中，诸如在图10中图示的，半导体器件20具有包括至少一行漏极接触焊盘78和至少一行源极接触焊盘76的封装占位区。漏极焊盘的行和源极焊盘的行可以交替。栅极接触焊盘80可以被定位并且与源极接触焊盘76的行对准。栅极接触焊盘80可以被布置在半导体器件20的第一表面26的角部中。
焊料或金属凸块(可选地具有在金属凸块上的焊料涂层)或者焊料球可以被定位在每个接触焊盘76、78、80上。
提供了一种芯片尺度半导体器件，其包括竖向晶体管器件和金属化结构，其中，通过在半导体管芯内的至少一个导电通孔和包括被布置在第一表面上的三个或更多个导电层的漏极再分配结构来提供从漏极区到第一表面的竖向导电再分配结构。相对的第二表面可以是电无源的并且由于其不需要被接触用于漏极再分配结构因此不形成漏极区的一部分。这使得半导体管芯的厚度能够是可变的，并且还使得第二表面能够被更容易地用于其它目的(因为第二表面是电无源的)。例如，第二表面可以被用作为用于热沉的接触表面或者被用于产品标记，例如由激光射入到第二表面中。
半导体管芯内的被电耦合到漏极电极的多个导电通孔在横向上彼此间隔开。导电通孔之间的横向电连接被提供在金属化结构的与金属化结构的最下面的导电层在竖向上间隔开的导电层中。
在横向上间隔开的源极电极之间的横向电连接被提供在金属化结构的如下的导电层中：该导电层与金属化结构的最下面的导电层竖向地间隔开，并且不同于金属化结构的被用于连接导电通孔的导电层并且在竖向上与该导电层间隔开。在一些实施例中，金属化结构的最外导电层被用于电连接源极电极。
这种在半导体管芯的主表面上并且一个在另一个上地堆叠两个功率电极之间的横向连接的布置避免了针对分离的封装处理的需要并且使得器件的占位区和管芯大小能够几乎相同，因此提供了可以在晶片级制备的芯片大小的封装。
为了容易描述而使用了诸如"下方"、"之下"、"下部"、"上方"和"上部"等的空间相对的术语以解释一个元素相对于第二元素的定位。这些术语意图涵盖器件的除了与在各图中描绘的那些相比不同的定向之外的不同的定向。进一步地，诸如"第一"、"第二"等的术语还被用于描述各种元素、区、区段等，并且也不意图进行限制。贯穿于描述，同样的术语指代同样的元素。
如在此使用的那样，术语"具有"、"包含"、"包括"、和"包括有"等是开放式术语，其指示所声明的元素或特征的存在但是不排除附加的元素或特征。量词"一"、"一个"和指代词"该"意图包括复数以及单数，除非上下文另外清楚地指示。要理解的是，除非另外具体地注明，否则在此描述的各种实施例的特征可以被彼此组合。
虽然已经在此图示并且描述了具体实施例，但是本领域普通技术人员将领会的是，各种各样的替换的和/或等同的实现可以在不脱离本发明的范围的情况下代替所示出和描述的具体实施例。本申请意图覆盖在此讨论的具体实施例的任何适配或变化。因此，意图的是本发明仅受权利要求及其等同物限制。

Claims (15)

1.一种半导体器件，包括：
半导体管芯，其包括具有源极电极、漏极电极和栅极电极的竖向晶体管器件，半导体管芯具有第一表面；
金属化结构，其位于第一表面上，金属化结构包括在第一表面上的第一导电层、在第一导电层上的第一绝缘层、在第一绝缘层上的第二导电层、在第二导电层上的第二绝缘层、以及在第二绝缘层上的第三导电层，
其中，第三导电层包括耦合到源极电极的至少一个源极焊盘、耦合到漏极电极的至少一个漏极焊盘、以及耦合到栅极电极的至少一个栅极焊盘。
2.根据权利要求1所述的半导体器件，其中，第一导电层包括耦合到源极电极的第一源极再分配结构、耦合到漏极电极的第一漏极再分配结构、以及耦合到栅极电极的第一栅极再分配结构，
其中，第一源极再分配结构包括多个分立的第一导电区，
其中，第一漏极再分配结构包括多个分立的第二导电区，所述多个分立的第二导电区在横向上被定位在第一源极再分配结构的第一分立导电区之间并且在横向上与第一源极再分配结构的第一分立导电区间隔开。
3.根据权利要求2所述的半导体器件，其中
第一漏极再分配结构的多个分立的第二导电区被通过第二导电层电耦合在一起，以及
第一源极再分配结构的多个分立的第一导电区被通过第三再分配结构电耦合在一起。
4.根据权利要求2或3所述的半导体器件，其中，第一漏极再分配结构的分立的第二导电区具有条带形状。
5.根据权利要求2至4之一所述的半导体器件，进一步包括从第一表面延伸到半导体管芯中的一个或多个导电通孔，
其中，所述一个或多个导电通孔被电耦合到位于半导体管芯内的掺杂的漏极区以及被电耦合到半导体管芯的第一表面上的第一漏极再分配结构。
6.根据权利要求5所述的半导体器件，其中，竖向晶体管器件包括被划分成多个单元场区的有源区，
其中，实质上彼此平行地延伸的两个细长的导电通孔被定位在相邻的单元场区之间，并且被电耦合到第一漏极分配结构的第二分立导电区中的公共的导电区。
7.根据权利要求2至6之一所述的半导体器件，其中，第一绝缘层被布置在第一源极再分配结构和第一漏极再分配结构上并且被布置为在横向上在第一源极再分配结构和第一漏极再分配结构之间，
其中，第一绝缘层包括
第一开口，其暴露出第一源极再分配结构的第一分立导电区的经限定的部分，以及
第二开口，其暴露出第一漏极再分配结构的第二分立导电区的经限定的部分。
8.根据权利要求7所述的半导体器件，其中，第二导电层包括电耦合到第一源极再分配结构的第二源极再分配结构以及电耦合到第一漏极再分配结构的第二漏极再分配结构，
其中，第二源极再分配结构被布置在第一绝缘层的第一开口中，并且包括被布置在第一源极再分配结构的第一导电区上的多个第一导电岛状部，以及
其中，第二漏极再分配结构被布置在第一绝缘层的第二开口中并且在横向上被定位在第二源极再分配结构的第一导电岛状部之间并且在横向上与第二源极再分配结构的第一导电岛状部间隔开，其中，第二漏极再分配结构在横向上围绕第二源极再分配结构的第一导电岛状部。
9.根据权利要求8所述的半导体器件，其中，第二漏极再分配结构将第一漏极再分配结构的第二导电区彼此电耦合。
10.根据权利要求8或9所述的半导体器件，其中，第二漏极再分配结构被布置为在竖向上在第一漏极再分配结构上方并且在竖向上在第一源极再分配结构的被第一绝缘层覆盖的部分上方。
11.根据权利要求10所述的半导体器件，其中，第二绝缘层被布置在第二源极再分配结构上和并且被布置在第二漏极再分配结构上，并且具有暴露出第二源极再分配结构的第一导电岛状部的经限定的区的第三开口以及暴露出第二漏极再分配结构的经限定的区的至少一个第四开口。
12.根据权利要求11所述的半导体器件，其中，第三导电层包括电耦合到第二源极再分配结构的第三源极再分配结构以及电耦合到第二漏极再分配结构的第三漏极再分配结构，
其中，第三源极再分配结构被布置在第三开口中并且将第二源极再分配结构的第一导电岛状部彼此电耦合，其中，第三源极再分配结构在第二漏极再分配结构的被第二绝缘层覆盖的部分上方延伸，
其中，第三漏极再分配结构被布置在第四开口中，并且包括在横向上与第三源极再分配结构间隔开的至少一个第二导电岛状部。
13.根据权利要求12所述的半导体器件，其中，第三漏极再分配结构的第二导电岛状部的每个具有横向大小以使得每个第二导电岛状部在第二源极再分配结构的被第二绝缘层覆盖的部分上方延伸。
14.根据权利要求11至13之一所述的半导体器件，
其中，导电通孔、第一漏极再分配结构、第一源极再分配结构和第一栅极再分配结构包括钨，
其中，第一绝缘层包括聚酰亚胺，
其中，第二漏极再分配结构，第二源极再分配结构由AlCu合金形成，
其中，第二绝缘层包括聚酰亚胺，
其中，第三漏极再分配结构和第三源极再分配结构由Cu形成。
15.根据权利要求1至14之一所述的半导体器件，进一步包括被布置在第三导电层上的环氧树脂层，其中环氧树脂层包括：
至少一个第五开口，其暴露出第三源极再分配层的一部分并且限定源极焊盘，
至少一个第六开口，其暴露出第三漏极再分配结构的第二导电岛状部的一部分并且限定漏极焊盘，以及
至少一个第七开口，其限定栅极焊盘。
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